forked from Minki/linux
MIPS: SNI: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2206/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void)
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return status;
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}
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static inline void unmask_a20r_irq(unsigned int irq)
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static inline void unmask_a20r_irq(struct irq_data *d)
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{
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set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
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set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
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irq_enable_hazard();
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}
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static inline void mask_a20r_irq(unsigned int irq)
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static inline void mask_a20r_irq(struct irq_data *d)
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{
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clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
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clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
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irq_disable_hazard();
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}
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static void end_a20r_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
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a20r_ack_hwint();
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unmask_a20r_irq(irq);
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}
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}
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static struct irq_chip a20r_irq_type = {
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.name = "A20R",
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.ack = mask_a20r_irq,
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.mask = mask_a20r_irq,
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.mask_ack = mask_a20r_irq,
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.unmask = unmask_a20r_irq,
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.end = end_a20r_irq,
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.irq_mask = mask_a20r_irq,
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.irq_unmask = unmask_a20r_irq,
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};
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/*
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@ -194,33 +194,24 @@ static struct pci_controller sni_controller = {
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.io_map_base = SNI_PORT_BASE
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};
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static void enable_pcimt_irq(unsigned int irq)
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static void enable_pcimt_irq(struct irq_data *d)
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{
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unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
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unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);
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*(volatile u8 *) PCIMT_IRQSEL |= mask;
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}
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void disable_pcimt_irq(unsigned int irq)
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void disable_pcimt_irq(struct irq_data *d)
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{
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unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
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unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));
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*(volatile u8 *) PCIMT_IRQSEL &= mask;
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}
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static void end_pcimt_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_pcimt_irq(irq);
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}
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static struct irq_chip pcimt_irq_type = {
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.name = "PCIMT",
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.ack = disable_pcimt_irq,
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.mask = disable_pcimt_irq,
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.mask_ack = disable_pcimt_irq,
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.unmask = enable_pcimt_irq,
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.end = end_pcimt_irq,
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.irq_mask = disable_pcimt_irq,
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.irq_unmask = enable_pcimt_irq,
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};
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/*
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@ -156,33 +156,24 @@ static struct pci_controller sni_pcit_controller = {
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.io_map_base = SNI_PORT_BASE
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};
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static void enable_pcit_irq(unsigned int irq)
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static void enable_pcit_irq(struct irq_data *d)
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{
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u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
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u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
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*(volatile u32 *)SNI_PCIT_INT_REG |= mask;
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}
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void disable_pcit_irq(unsigned int irq)
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void disable_pcit_irq(struct irq_data *d)
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{
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u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
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u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
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*(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
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}
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void end_pcit_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_pcit_irq(irq);
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}
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static struct irq_chip pcit_irq_type = {
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.name = "PCIT",
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.ack = disable_pcit_irq,
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.mask = disable_pcit_irq,
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.mask_ack = disable_pcit_irq,
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.unmask = enable_pcit_irq,
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.end = end_pcit_irq,
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.irq_mask = disable_pcit_irq,
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.irq_unmask = enable_pcit_irq,
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};
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static void pcit_hwint1(void)
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@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave;
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#define cached_master_mask (rm200_cached_irq_mask)
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#define cached_slave_mask (rm200_cached_irq_mask >> 8)
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static void sni_rm200_disable_8259A_irq(unsigned int irq)
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static void sni_rm200_disable_8259A_irq(struct irq_data *d)
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{
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unsigned int mask;
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unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
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unsigned long flags;
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irq -= RM200_I8259A_IRQ_BASE;
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mask = 1 << irq;
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raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
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rm200_cached_irq_mask |= mask;
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@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq)
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raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
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}
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static void sni_rm200_enable_8259A_irq(unsigned int irq)
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static void sni_rm200_enable_8259A_irq(struct irq_data *d)
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{
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unsigned int mask;
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unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
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unsigned long flags;
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irq -= RM200_I8259A_IRQ_BASE;
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mask = ~(1 << irq);
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raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
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rm200_cached_irq_mask &= mask;
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@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq)
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* first, _then_ send the EOI, and the order of EOI
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* to the two 8259s is important!
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*/
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void sni_rm200_mask_and_ack_8259A(unsigned int irq)
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void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
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{
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unsigned int irqmask;
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unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE;
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unsigned long flags;
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irq -= RM200_I8259A_IRQ_BASE;
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irqmask = 1 << irq;
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raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
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/*
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@ -285,9 +282,9 @@ spurious_8259A_irq:
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static struct irq_chip sni_rm200_i8259A_chip = {
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.name = "RM200-XT-PIC",
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.mask = sni_rm200_disable_8259A_irq,
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.unmask = sni_rm200_enable_8259A_irq,
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.mask_ack = sni_rm200_mask_and_ack_8259A,
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.irq_mask = sni_rm200_disable_8259A_irq,
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.irq_unmask = sni_rm200_enable_8259A_irq,
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.irq_mask_ack = sni_rm200_mask_and_ack_8259A,
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};
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/*
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@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void)
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#define SNI_RM200_INT_START 24
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#define SNI_RM200_INT_END 28
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static void enable_rm200_irq(unsigned int irq)
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static void enable_rm200_irq(struct irq_data *d)
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{
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unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
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unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
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*(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
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}
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void disable_rm200_irq(unsigned int irq)
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void disable_rm200_irq(struct irq_data *d)
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{
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unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
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unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
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*(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
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}
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void end_rm200_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_rm200_irq(irq);
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}
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static struct irq_chip rm200_irq_type = {
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.name = "RM200",
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.ack = disable_rm200_irq,
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.mask = disable_rm200_irq,
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.mask_ack = disable_rm200_irq,
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.unmask = enable_rm200_irq,
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.end = end_rm200_irq,
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.irq_mask = disable_rm200_irq,
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.irq_unmask = enable_rm200_irq,
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};
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static void sni_rm200_hwint(void)
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