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ARM i.MX6q: Link system reset controller (SRC) to IPU in DT

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Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Philipp Zabel
2013-03-28 17:35:20 +01:00
committed by Shawn Guo
parent 41c0434288
commit 09ebf36659
2 changed files with 3 additions and 0 deletions
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1
arch/arm/boot/dts/imx6q.dtsi
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@@ -335,6 +335,7 @@
interrupts = <0 8 0x4 0 7 0x4>; interrupts = <0 8 0x4 0 7 0x4>;
clocks = <&clks 133>, <&clks 134>, <&clks 137>; clocks = <&clks 133>, <&clks 134>, <&clks 137>;
clock-names = "bus", "di0", "di1"; clock-names = "bus", "di0", "di1";
resets = <&src 4>;
}; };
}; };
}; };

2
arch/arm/boot/dts/imx6qdl.dtsi
View File

@@ -523,6 +523,7 @@
compatible = "fsl,imx6q-src"; compatible = "fsl,imx6q-src";
reg = <0x020d8000 0x4000>; reg = <0x020d8000 0x4000>;
interrupts = <0 91 0x04 0 96 0x04>; interrupts = <0 91 0x04 0 96 0x04>;
#reset-cells = <1>;
}; };
gpc: gpc@020dc000 { gpc: gpc@020dc000 {
@@ -822,6 +823,7 @@
interrupts = <0 6 0x4 0 5 0x4>; interrupts = <0 6 0x4 0 5 0x4>;
clocks = <&clks 130>, <&clks 131>, <&clks 132>; clocks = <&clks 130>, <&clks 131>, <&clks 132>;
clock-names = "bus", "di0", "di1"; clock-names = "bus", "di0", "di1";
resets = <&src 2>;
}; };
}; };
}; };