drm/amdgpu: add soc15 common ip block support for renoir
This patch adds common ip support for renoir. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -637,6 +637,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
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case CHIP_VEGA10:
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case CHIP_VEGA10:
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case CHIP_VEGA12:
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case CHIP_VEGA12:
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case CHIP_RAVEN:
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case CHIP_RAVEN:
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case CHIP_RENOIR:
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vega10_reg_base_init(adev);
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vega10_reg_base_init(adev);
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break;
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break;
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case CHIP_VEGA20:
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case CHIP_VEGA20:
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@@ -1133,6 +1134,11 @@ static int soc15_common_early_init(void *handle)
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adev->pg_flags = 0;
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adev->pg_flags = 0;
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adev->external_rev_id = adev->rev_id + 0x32;
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adev->external_rev_id = adev->rev_id + 0x32;
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break;
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break;
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case CHIP_RENOIR:
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adev->cg_flags = 0;
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adev->pg_flags = 0;
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adev->external_rev_id = adev->rev_id + 0x91;
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break;
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default:
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default:
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/* FIXME: not supported yet */
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/* FIXME: not supported yet */
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return -EINVAL;
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return -EINVAL;
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