PCI updates for v3.8:
PCI: Reduce Ricoh 0xe822 SD card reader base clock frequency to 50MHz PCI: Remove spurious error for sriov_numvfs store and simplify flow PCI: Add PCIe Link Capability link speed and width names PCI/PM: Do not suspend port if any subordinate device needs PME polling PCI: Work around Stratus ftServer broken PCIe hierarchy (fix DMI check) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJQ5HnVAAoJEPGMOI97Hn6zprgP/1we4RhVaXLRnmLyc9OpS97Z 9KZUU/rsMQ/RYstdNFV30JOypMFL1BlK7jpLR14gjSgCulKK9etvjBTwiV26Rfor n/LWru4CWUtGUH/2c4IwuN0FKxfU7W4GxuVfKi3uACh7yJRwKgxZhFKLLb4OZ/T0 A1CiIktdpZhH5A8+WdoSkZSsfQPuUA6UVKQleEQh/qJl9qgxwEDLsdj5fIZLsFUB Fo3bbusq2X+pHU0uuBIzrheSUeSmxXzeZcte8JxTEEwB/Gdsn24lJ39MK5PHAaOE gSVC7HDi+vNCICZhi7H93musPczL1TqeyMZQWSa/rj7KV836kG+Phz61SmsXTxyR VpfnEZOx7GreErpBuLKrOVslXJl1TBc/ZiiLd5SBUlO4ZClAssPcevtUexCR3xr6 eHoSYMtwblW/vgJ3rn/PD8SgksZVJsd6+JAlVbC53XAdeJuEheCdEU7HnQZ3ZQRF 6wpWOBfIxdSQM4AukncNjUSTQpVjNFoEXNcPBCamazDz9NgRIcrnBAd/94+AVD0t WQpoU0HDP6h00pK8Ls3Fsv23qbfPDPP9i6zhSGlv5Q9Sz5T8b178j8h7tkUgtPy/ vxAtwUgFwz5cxE053lrht0JEQUikv99VcUJKrQc17g6GIMenh4duXrxF1I1EERXD fcVZNas3SrnLSKfsVwws =Ehs+ -----END PGP SIGNATURE----- Merge tag '3.8-pci-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Some fixes for v3.8. They include a fix for the new SR-IOV sysfs management support, an expanded quirk for Ricoh SD card readers, a Stratus DMI quirk fix, and a PME polling fix." * tag '3.8-pci-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Reduce Ricoh 0xe822 SD card reader base clock frequency to 50MHz PCI/PM: Do not suspend port if any subordinate device needs PME polling PCI: Add PCIe Link Capability link speed and width names PCI: Work around Stratus ftServer broken PCIe hierarchy (fix DMI check) PCI: Remove spurious error for sriov_numvfs store and simplify flow
This commit is contained in:
commit
080a62e2ce
@ -434,7 +434,8 @@ static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
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.callback = set_scan_all,
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.callback = set_scan_all,
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.ident = "Stratus/NEC ftServer",
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.ident = "Stratus/NEC ftServer",
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.matches = {
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ftServer"),
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DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
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DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
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},
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},
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},
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},
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{}
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{}
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@ -422,77 +422,60 @@ static ssize_t sriov_numvfs_show(struct device *dev,
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}
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}
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/*
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/*
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* num_vfs > 0; number of vfs to enable
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* num_vfs > 0; number of VFs to enable
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* num_vfs = 0; disable all vfs
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* num_vfs = 0; disable all VFs
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*
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*
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* Note: SRIOV spec doesn't allow partial VF
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* Note: SRIOV spec doesn't allow partial VF
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* disable, so its all or none.
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* disable, so it's all or none.
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*/
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*/
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static ssize_t sriov_numvfs_store(struct device *dev,
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static ssize_t sriov_numvfs_store(struct device *dev,
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struct device_attribute *attr,
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struct device_attribute *attr,
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const char *buf, size_t count)
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const char *buf, size_t count)
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{
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct pci_dev *pdev = to_pci_dev(dev);
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int num_vfs_enabled = 0;
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int ret;
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int num_vfs;
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u16 num_vfs;
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int ret = 0;
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u16 total;
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if (kstrtoint(buf, 0, &num_vfs) < 0)
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ret = kstrtou16(buf, 0, &num_vfs);
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return -EINVAL;
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if (ret < 0)
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return ret;
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if (num_vfs > pci_sriov_get_totalvfs(pdev))
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return -ERANGE;
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if (num_vfs == pdev->sriov->num_VFs)
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return count; /* no change */
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/* is PF driver loaded w/callback */
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/* is PF driver loaded w/callback */
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if (!pdev->driver || !pdev->driver->sriov_configure) {
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if (!pdev->driver || !pdev->driver->sriov_configure) {
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dev_info(&pdev->dev,
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dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
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"Driver doesn't support SRIOV configuration via sysfs\n");
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return -ENOSYS;
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return -ENOSYS;
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}
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}
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/* if enabling vf's ... */
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total = pci_sriov_get_totalvfs(pdev);
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/* Requested VFs to enable < totalvfs and none enabled already */
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if ((num_vfs > 0) && (num_vfs <= total)) {
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if (pdev->sriov->num_VFs == 0) {
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num_vfs_enabled =
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pdev->driver->sriov_configure(pdev, num_vfs);
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if ((num_vfs_enabled >= 0) &&
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(num_vfs_enabled != num_vfs)) {
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dev_warn(&pdev->dev,
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"Only %d VFs enabled\n",
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num_vfs_enabled);
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return count;
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} else if (num_vfs_enabled < 0)
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/* error code from driver callback */
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return num_vfs_enabled;
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} else if (num_vfs == pdev->sriov->num_VFs) {
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dev_warn(&pdev->dev,
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"%d VFs already enabled; no enable action taken\n",
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num_vfs);
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return count;
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} else {
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dev_warn(&pdev->dev,
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"%d VFs already enabled. Disable before enabling %d VFs\n",
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pdev->sriov->num_VFs, num_vfs);
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return -EINVAL;
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}
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}
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/* disable vfs */
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if (num_vfs == 0) {
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if (num_vfs == 0) {
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if (pdev->sriov->num_VFs != 0) {
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/* disable VFs */
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ret = pdev->driver->sriov_configure(pdev, 0);
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ret = pdev->driver->sriov_configure(pdev, 0);
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return ret ? ret : count;
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if (ret < 0)
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} else {
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return ret;
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dev_warn(&pdev->dev,
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return count;
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"All VFs disabled; no disable action taken\n");
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return count;
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}
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}
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}
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dev_err(&pdev->dev,
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/* enable VFs */
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"Invalid value for number of VFs to enable: %d\n", num_vfs);
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if (pdev->sriov->num_VFs) {
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dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
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pdev->sriov->num_VFs, num_vfs);
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return -EBUSY;
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}
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return -EINVAL;
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ret = pdev->driver->sriov_configure(pdev, num_vfs);
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if (ret < 0)
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return ret;
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if (ret != num_vfs)
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dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
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num_vfs, ret);
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return count;
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}
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}
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static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
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static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
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@ -134,10 +134,28 @@ static int pcie_port_runtime_resume(struct device *dev)
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return 0;
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return 0;
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}
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}
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static int pci_dev_pme_poll(struct pci_dev *pdev, void *data)
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{
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bool *pme_poll = data;
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if (pdev->pme_poll)
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*pme_poll = true;
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return 0;
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}
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static int pcie_port_runtime_idle(struct device *dev)
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static int pcie_port_runtime_idle(struct device *dev)
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{
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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bool pme_poll = false;
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/*
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* If any subordinate device needs pme poll, we should keep
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* the port in D0, because we need port in D0 to poll it.
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*/
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pci_walk_bus(pdev->subordinate, pci_dev_pme_poll, &pme_poll);
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/* Delay for a short while to prevent too frequent suspend/resume */
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/* Delay for a short while to prevent too frequent suspend/resume */
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pm_schedule_suspend(dev, 10);
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if (!pme_poll)
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pm_schedule_suspend(dev, 10);
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return -EBUSY;
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return -EBUSY;
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}
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}
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#else
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#else
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@ -2725,7 +2725,7 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
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if (PCI_FUNC(dev->devfn))
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if (PCI_FUNC(dev->devfn))
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return;
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return;
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/*
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/*
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* RICOH 0xe823 SD/MMC card reader fails to recognize
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* RICOH 0xe822 and 0xe823 SD/MMC card readers fail to recognize
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* certain types of SD/MMC cards. Lowering the SD base
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* certain types of SD/MMC cards. Lowering the SD base
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* clock frequency from 200Mhz to 50Mhz fixes this issue.
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* clock frequency from 200Mhz to 50Mhz fixes this issue.
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*
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*
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@ -2736,7 +2736,8 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
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* 0xf9 - Key register for 0x150
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* 0xf9 - Key register for 0x150
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* 0xfc - key register for 0xe1
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* 0xfc - key register for 0xe1
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*/
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*/
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if (dev->device == PCI_DEVICE_ID_RICOH_R5CE823) {
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if (dev->device == PCI_DEVICE_ID_RICOH_R5CE822 ||
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dev->device == PCI_DEVICE_ID_RICOH_R5CE823) {
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pci_write_config_byte(dev, 0xf9, 0xfc);
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pci_write_config_byte(dev, 0xf9, 0xfc);
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pci_write_config_byte(dev, 0x150, 0x10);
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pci_write_config_byte(dev, 0x150, 0x10);
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pci_write_config_byte(dev, 0xf9, 0x00);
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pci_write_config_byte(dev, 0xf9, 0x00);
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@ -2763,6 +2764,8 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
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}
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE822, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE822, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
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#endif /*CONFIG_MMC_RICOH_MMC*/
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#endif /*CONFIG_MMC_RICOH_MMC*/
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@ -1568,6 +1568,7 @@
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#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476
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#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476
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#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478
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#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478
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#define PCI_DEVICE_ID_RICOH_R5C822 0x0822
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#define PCI_DEVICE_ID_RICOH_R5C822 0x0822
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#define PCI_DEVICE_ID_RICOH_R5CE822 0xe822
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#define PCI_DEVICE_ID_RICOH_R5CE823 0xe823
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#define PCI_DEVICE_ID_RICOH_R5CE823 0xe823
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#define PCI_DEVICE_ID_RICOH_R5C832 0x0832
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#define PCI_DEVICE_ID_RICOH_R5C832 0x0832
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#define PCI_DEVICE_ID_RICOH_R5C843 0x0843
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#define PCI_DEVICE_ID_RICOH_R5C843 0x0843
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@ -458,6 +458,8 @@
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#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
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#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
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#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
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#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
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#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
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#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
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#define PCI_EXP_LNKCAP_SLS_2_5GB 0x1 /* LNKCAP2 SLS Vector bit 0 (2.5GT/s) */
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#define PCI_EXP_LNKCAP_SLS_5_0GB 0x2 /* LNKCAP2 SLS Vector bit 1 (5.0GT/s) */
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#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
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#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
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#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
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#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
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#define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */
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#define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */
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