mmc: sdhci: Define ADMA descriptor structure
Define the ADMA descriptor structure instead of using manual offsets and casts. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -448,23 +448,18 @@ static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
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static void sdhci_adma_write_desc(void *desc, u32 addr, int len, unsigned cmd)
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static void sdhci_adma_write_desc(void *desc, u32 addr, int len, unsigned cmd)
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{
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{
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__le32 *dataddr = (__le32 __force *)(desc + 4);
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struct sdhci_adma2_32_desc *dma_desc = desc;
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__le16 *cmdlen = (__le16 __force *)desc;
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/* SDHCI specification says ADMA descriptors should be 4 byte
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dma_desc->cmd = cpu_to_le16(cmd);
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* aligned, so using 16 or 32bit operations should be safe. */
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dma_desc->len = cpu_to_le16(len);
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dma_desc->addr = cpu_to_le32(addr);
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cmdlen[0] = cpu_to_le16(cmd);
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cmdlen[1] = cpu_to_le16(len);
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dataddr[0] = cpu_to_le32(addr);
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}
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}
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static void sdhci_adma_mark_end(void *desc)
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static void sdhci_adma_mark_end(void *desc)
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{
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{
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u8 *dma_desc = desc;
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struct sdhci_adma2_32_desc *dma_desc = desc;
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dma_desc[0] |= ADMA2_END;
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dma_desc->cmd |= cpu_to_le16(ADMA2_END);
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}
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}
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static int sdhci_adma_table_pre(struct sdhci_host *host,
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static int sdhci_adma_table_pre(struct sdhci_host *host,
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@ -2297,23 +2292,20 @@ static void sdhci_adma_show_error(struct sdhci_host *host)
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{
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{
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const char *name = mmc_hostname(host->mmc);
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const char *name = mmc_hostname(host->mmc);
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void *desc = host->adma_table;
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void *desc = host->adma_table;
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__le32 *dma;
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__le16 *len;
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u8 attr;
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sdhci_dumpregs(host);
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sdhci_dumpregs(host);
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while (true) {
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while (true) {
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dma = (__le32 *)(desc + 4);
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struct sdhci_adma2_32_desc *dma_desc = desc;
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len = (__le16 *)(desc + 2);
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attr = *(u8 *)desc;
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DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
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DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
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name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr);
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name, desc, le32_to_cpu(dma_desc->addr),
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le16_to_cpu(dma_desc->len),
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le16_to_cpu(dma_desc->cmd));
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desc += host->desc_sz;
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desc += host->desc_sz;
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if (attr & ADMA2_END)
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if (dma_desc->cmd & cpu_to_le16(ADMA2_END))
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break;
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break;
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}
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}
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}
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}
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@ -272,6 +272,13 @@
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/* ADMA2 32-bit DMA alignment */
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/* ADMA2 32-bit DMA alignment */
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#define SDHCI_ADMA2_32_ALIGN 4
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#define SDHCI_ADMA2_32_ALIGN 4
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/* ADMA2 32-bit descriptor */
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struct sdhci_adma2_32_desc {
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__le16 cmd;
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__le16 len;
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__le32 addr;
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} __packed __aligned(SDHCI_ADMA2_32_ALIGN);
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#define ADMA2_TRAN_VALID 0x21
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#define ADMA2_TRAN_VALID 0x21
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#define ADMA2_NOP_END_VALID 0x3
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#define ADMA2_NOP_END_VALID 0x3
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#define ADMA2_END 0x2
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#define ADMA2_END 0x2
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