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Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (42 commits)
  [ARM] Fix tosa build error
  [ARM] 3610/1: Make reboot work on Versatile
  [ARM] 3609/1: S3C24XX: defconfig update for s3c2410_defconfig
  [ARM] 3591/1: Anubis: IDE device definitions
  [ARM] Include asm/hardware.h not asm/arch/hardware.h
  [ARM] 3594/1: Poodle: Add touchscreen support + other updates
  [ARM] 3564/1: sharpsl_pm: Abstract some machine specific parameters
  [ARM] 3561/1: Poodle: Correct the MMC/SD power control
  [ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds
  [ARM] 3599/1: AT91RM9200 remove global variables
  [ARM] 3607/1: AT91RM9200 misc fixes
  [ARM] 3605/1: AT91RM9200 Power Management
  [ARM] 3604/1: AT91RM9200 New boards
  [ARM] 3603/1: AT91RM9200 remove old files
  [ARM] 3592/1: AT91RM9200 Serial driver update
  [ARM] 3590/1: AT91RM9200 Platform devices support
  [ARM] 3589/1: AT91RM9200 DK/EK board update
  [ARM] 3588/1: AT91RM9200 CSB337/637 board update
  [ARM] 3587/1: AT91RM9200 hardware headers
  [ARM] 3586/1: AT91RM9200 header update
  ...
This commit is contained in:
Linus Torvalds 2006-06-20 17:52:36 -07:00
commit 050335db2a
101 changed files with 9668 additions and 666 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

108
arch/arm/Kconfig
View File

@ -93,15 +93,49 @@ choice
prompt "ARM system type"
default ARCH_VERSATILE
config ARCH_AAEC2000
bool "Agilent AAEC-2000 based"
select ARM_AMBA
help
This enables support for systems based on the Agilent AAEC-2000
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select ARM_AMBA
select ICST525
help
Support for ARM's Integrator platform.
config ARCH_REALVIEW
bool "ARM Ltd. RealView family"
select ARM_AMBA
select ICST307
help
This enables support for ARM Ltd RealView boards.
config ARCH_VERSATILE
bool "ARM Ltd. Versatile family"
select ARM_AMBA
select ARM_VIC
select ICST307
help
This enables support for ARM Ltd Versatile board.
config ARCH_AT91RM9200
bool "Atmel AT91RM9200"
help
Say Y here if you intend to run this kernel on an Atmel
AT91RM9200-based board.
config ARCH_CLPS7500
bool "Cirrus-CL-PS7500FE"
bool "Cirrus CL-PS7500FE"
select TIMER_ACORN
select ISA
help
Support for the Cirrus Logic PS7500FE system-on-a-chip.
config ARCH_CLPS711X
bool "CLPS711x/EP721x-based"
bool "Cirrus Logic CLPS711x/EP721x-based"
help
Support for Cirrus Logic 711x/721x based boards.
@ -135,12 +169,22 @@ config ARCH_FOOTBRIDGE
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
config ARCH_INTEGRATOR
bool "Integrator"
select ARM_AMBA
select ICST525
config ARCH_NETX
bool "Hilscher NetX based"
select ARM_VIC
help
Support for ARM's Integrator platform.
This enables support for systems based on the Hilscher NetX Soc
config ARCH_H720X
bool "Hynix HMS720x-based"
select ISA_DMA_API
help
This enables support for systems based on the Hynix HMS720x
config ARCH_IMX
bool "IMX"
help
Support for Motorola's i.MX family of processors (MX1, MXL).
config ARCH_IOP3XX
bool "IOP3xx-based"
@ -178,6 +222,11 @@ config ARCH_L7200
If you have any questions or comments about the Linux kernel port
to this board, send e-mail to <sjhill@cotw.com>.
config ARCH_PNX4008
bool "Philips Nexperia PNX4008 Mobile"
help
This enables support for Philips PNX4008 mobile platform.
config ARCH_PXA
bool "PXA2xx-based"
select ARCH_MTD_XIP
@ -232,49 +281,6 @@ config ARCH_OMAP
help
Support for TI's OMAP platform (OMAP1 and OMAP2).
config ARCH_VERSATILE
bool "Versatile"
select ARM_AMBA
select ARM_VIC
select ICST307
help
This enables support for ARM Ltd Versatile board.
config ARCH_REALVIEW
bool "RealView"
select ARM_AMBA
select ICST307
help
This enables support for ARM Ltd RealView boards.
config ARCH_IMX
bool "IMX"
help
Support for Motorola's i.MX family of processors (MX1, MXL).
config ARCH_H720X
bool "Hynix-HMS720x-based"
select ISA_DMA_API
help
This enables support for systems based on the Hynix HMS720x
config ARCH_AAEC2000
bool "Agilent AAEC-2000 based"
select ARM_AMBA
help
This enables support for systems based on the Agilent AAEC-2000
config ARCH_AT91RM9200
bool "AT91RM9200"
help
Say Y here if you intend to run this kernel on an Atmel
AT91RM9200-based board.
config ARCH_PNX4008
bool "Philips Nexperia PNX4008 Mobile"
help
This enables support for Philips PNX4008 mobile platform.
endchoice
source "arch/arm/mach-clps711x/Kconfig"
@ -319,6 +325,8 @@ source "arch/arm/mach-realview/Kconfig"
source "arch/arm/mach-at91rm9200/Kconfig"
source "arch/arm/mach-netx/Kconfig"
# Definitions to make life easier
config ARCH_ACORN
bool

1
arch/arm/Makefile
View File

@ -117,6 +117,7 @@ endif
machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
machine-$(CONFIG_ARCH_EP93XX) := ep93xx
machine-$(CONFIG_ARCH_PNX4008) := pnx4008
machine-$(CONFIG_ARCH_NETX) := netx
ifeq ($(CONFIG_ARCH_EBSA110),y)
# This is what happens if you forget the IOCS16 line.

12
arch/arm/boot/compressed/head-at91rm9200.S
View File

@ -49,6 +49,18 @@
cmp r7, r3
beq 99f
@ Embest ATEB9200 : 923
mov r3, #(MACH_TYPE_ATEB9200 & 0xff)
orr r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00)
cmp r7, r3
beq 99f
@ Sperry-Sun KAFA : 662
mov r3, #(MACH_TYPE_KAFA & 0xff)
orr r3, r3, #(MACH_TYPE_KAFA & 0xff00)
cmp r7, r3
beq 99f
@ Unknown board, use the AT91RM9200DK board
@ mov r7, #MACH_TYPE_AT91RM9200
mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff)

28
arch/arm/common/sharpsl_pm.c
View File

@ -49,13 +49,6 @@
#define SHARPSL_CHARGE_CO_CHECK_TIME 5 /* 5 msec */
#define SHARPSL_CHARGE_RETRY_CNT 1 /* eqv. 10 min */
#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */
#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */
#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
/*
* Prototypes
*/
@ -82,12 +75,13 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger);
static int get_percentage(int voltage)
{
int i = sharpsl_pm.machinfo->bat_levels - 1;
int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0;
struct battery_thresh *thresh;
if (sharpsl_pm.charge_mode == CHRG_ON)
thresh=sharpsl_pm.machinfo->bat_levels_acin;
thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin;
else
thresh=sharpsl_pm.machinfo->bat_levels_noac;
thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac;
while (i > 0 && (voltage > thresh[i].voltage))
i--;
@ -131,7 +125,7 @@ static void sharpsl_battery_thread(void *private_)
sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE);
/* Corgi cannot confirm when battery fully charged so periodically kick! */
if (machine_is_corgi() && (sharpsl_pm.charge_mode == CHRG_ON)
if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON)
&& time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL))
schedule_work(&toggle_charger);
@ -166,11 +160,11 @@ static void sharpsl_battery_thread(void *private_)
&& ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
(sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
corgibl_limit_intensity(1);
sharpsl_pm.machinfo->backlight_limit(1);
sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
}
} else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
corgibl_limit_intensity(0);
sharpsl_pm.machinfo->backlight_limit(0);
sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
}
@ -418,7 +412,7 @@ static int sharpsl_check_battery_temp(void)
val = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val);
if (val > SHARPSL_CHARGE_ON_TEMP)
if (val > sharpsl_pm.machinfo->charge_on_temp)
return -1;
return 0;
@ -450,7 +444,7 @@ static int sharpsl_check_battery_voltage(void)
val = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val);
if (val < SHARPSL_CHARGE_ON_VOLT)
if (val < sharpsl_pm.machinfo->charge_on_volt)
return -1;
return 0;
@ -468,7 +462,7 @@ static int sharpsl_ac_check(void)
temp = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
if ((temp > SHARPSL_CHARGE_ON_ACIN_HIGH) || (temp < SHARPSL_CHARGE_ON_ACIN_LOW)) {
if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) {
dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
return -1;
}
@ -627,8 +621,8 @@ static int sharpsl_fatal_check(void)
temp = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
if ((acin && (temp < SHARPSL_FATAL_ACIN_VOLT)) ||
(!acin && (temp < SHARPSL_FATAL_NOACIN_VOLT)))
if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
(!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
return -1;
return 0;
}

1312
arch/arm/configs/ateb9200_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

723
arch/arm/configs/carmeva_defconfig Normal file
View File

@ -0,0 +1,723 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-rc4
# Tue Jun 14 12:05:24 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_IOMAP=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
# CONFIG_SYSVIPC is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
# CONFIG_AUDIT is not set
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
CONFIG_ARCH_AT91RM9200=y
#
# AT91RM9200 Implementations
#
# CONFIG_ARCH_AT91RM9200DK is not set
# CONFIG_MACH_AT91RM9200EK is not set
# CONFIG_MACH_CSB337 is not set
# CONFIG_MACH_CSB637 is not set
CONFIG_MACH_CARMEVA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
#
# Processor Features
#
CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
#
# Bus support
#
CONFIG_ISA_DMA_API=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_DISCONTIGMEM is not set
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE=""
# CONFIG_XIP_KERNEL is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_AT91_DATAFLASH=y
# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_PACKET is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_ARM_AT91_ETHER=y
CONFIG_ARM_AT91_ETHER_RMII=y
# CONFIG_SMC91X is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=m
CONFIG_SERIO_SERPORT=m
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_AT91=y
CONFIG_SERIAL_AT91_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_AT91_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
CONFIG_AT91_SPI=y
CONFIG_AT91_SPIDEV=y
#
# I2C support
#
# CONFIG_I2C is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
CONFIG_MMC=m
CONFIG_MMC_DEBUG=y
CONFIG_MMC_BLOCK=m
CONFIG_MMC_AT91RM9200=m
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_JFFS_FS=y
CONFIG_JFFS_FS_VERBOSE=0
CONFIG_JFFS_PROC_FS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_NAND=y
# CONFIG_JFFS2_FS_NOR_ECC is not set
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_JFFS2_CMODE_NONE is not set
CONFIG_JFFS2_CMODE_PRIORITY=y
# CONFIG_JFFS2_CMODE_SIZE is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_NFSD_TCP=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_USER is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y

884
arch/arm/configs/kafa_defconfig Normal file
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@ -0,0 +1,884 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.17-rc3
# Sun May 7 16:54:53 2006
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_VECTORS_BASE=0xffff0000
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_UID16=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# Block layer
#
# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
CONFIG_DEFAULT_DEADLINE=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="deadline"
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91RM9200=y
#
# AT91RM9200 Implementations
#
#
# AT91RM9200 Board Type
#
# CONFIG_ARCH_AT91RM9200DK is not set
# CONFIG_MACH_AT91RM9200EK is not set
# CONFIG_MACH_CSB337 is not set
# CONFIG_MACH_CSB637 is not set
# CONFIG_MACH_CARMEVA is not set
# CONFIG_MACH_KB9200 is not set
# CONFIG_MACH_ATEB9200 is not set
CONFIG_MACH_KAFA=y
#
# AT91 Feature Selections
#
# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
#
# Bus support
#
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
CONFIG_PREEMPT=y
# CONFIG_NO_IDLE_HZ is not set
CONFIG_HZ=100
# CONFIG_AEABI is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_LEDS=y
# CONFIG_LEDS_TIMER is not set
CONFIG_LEDS_CPU=y
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw"
# CONFIG_XIP_KERNEL is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_MISC=y
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
# CONFIG_APM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
# CONFIG_MTD_BLOCK is not set
CONFIG_MTD_BLOCK_RO=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_AT91_DATAFLASH=y
# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# OneNAND Flash Device Drivers
#
# CONFIG_MTD_ONENAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_MARVELL_PHY is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_ARM_AT91_ETHER=y
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_AT91=y
CONFIG_SERIAL_AT91_CONSOLE=y
# CONFIG_SERIAL_AT91_TTYAT is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=32
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_AT91_WATCHDOG=y
# CONFIG_NVRAM is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
CONFIG_AT91_SPI=y
CONFIG_AT91_SPIDEV=y
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
#
# I2C Hardware Bus support
#
CONFIG_I2C_AT91=y
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_PCA_ISA is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Misc devices
#
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
#
# RTC drivers
#
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_M48T86 is not set
CONFIG_RTC_DRV_AT91=y
# CONFIG_RTC_DRV_TEST is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_UNWIND_INFO is not set
# CONFIG_DEBUG_USER is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y

780
arch/arm/configs/kb9202_defconfig Normal file
View File

@ -0,0 +1,780 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.13-rc2
# Sun Aug 14 19:26:59 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
#
# Code maturity level options
#
# CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_SWAP is not set
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_HOTPLUG=y
# CONFIG_KOBJECT_UEVENT is not set
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91RM9200=y
#
# AT91RM9200 Implementations
#
# CONFIG_ARCH_AT91RM9200DK is not set
# CONFIG_MACH_AT91RM9200EK is not set
# CONFIG_MACH_CSB337 is not set
# CONFIG_MACH_CSB637 is not set
# CONFIG_MACH_CARMEVA is not set
CONFIG_MACH_KB9200=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
#
# Processor Features
#
CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
#
# Bus support
#
CONFIG_ISA_DMA_API=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x10000000
CONFIG_ZBOOT_ROM_BSS=0x20040000
CONFIG_ZBOOT_ROM=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram rw initrd=0x20210000,654933"
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_AOUT=y
CONFIG_BINFMT_MISC=y
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
CONFIG_DEBUG_DRIVER=y
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=y
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
# SCSI device support
#
CONFIG_SCSI=y
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
CONFIG_CHR_DEV_SG=y
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
#
# SCSI Transport Attributes
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
#
# SCSI low-level drivers
#
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_DEBUG is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_IP_TCPDIAG is not set
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_ARM_AT91_ETHER=y
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_AT91=y
CONFIG_SERIAL_AT91_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_AT91_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_AT91_SPI is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
#
# USB Host Controller Drivers
#
# CONFIG_USB_ISP116X_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_SL811_HCD is not set
#
# USB Device Class drivers
#
# CONFIG_USB_BLUETOOTH_TTY is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_DPCM is not set
#
# USB Input Devices
#
# CONFIG_USB_HID is not set
#
# USB HID Boot Protocol drivers
#
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_AIPTEK is not set
# CONFIG_USB_WACOM is not set
# CONFIG_USB_ACECAD is not set
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set
# CONFIG_USB_MTOUCH is not set
# CONFIG_USB_ITMTOUCH is not set
# CONFIG_USB_EGALAX is not set
# CONFIG_USB_XPAD is not set
# CONFIG_USB_ATI_REMOTE is not set
#
# USB Imaging devices
#
# CONFIG_USB_MICROTEK is not set
#
# USB Multimedia devices
#
# CONFIG_USB_DABUSB is not set
#
# Video4Linux support is needed for USB Multimedia device support
#
#
# USB Network Adapters
#
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_USBNET is not set
# CONFIG_USB_MON is not set
#
# USB port drivers
#
#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_PHIDGETKIT is not set
# CONFIG_USB_PHIDGETSERVO is not set
# CONFIG_USB_IDMOUSE is not set
#
# USB DSL modem support
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_DEVPTS_FS_XATTR=y
# CONFIG_DEVPTS_FS_SECURITY is not set
CONFIG_TMPFS=y
# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_HFSPLUS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ASCII=y
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set

926
arch/arm/configs/netx_defconfig Normal file
View File

@ -0,0 +1,926 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.17-rc6
# Tue Jun 6 15:26:53 2006
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_VECTORS_BASE=0xffff0000
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_UID16=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
CONFIG_OBSOLETE_INTERMODULE=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_AT91RM9200 is not set
CONFIG_ARCH_NETX=y
#
# NetX Implementations
#
CONFIG_MACH_NXDKN=y
CONFIG_MACH_NXDB500=y
CONFIG_MACH_NXEB500HMI=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
#
# Processor Features
#
CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
CONFIG_ARM_VIC=y
#
# Bus support
#
CONFIG_ARM_AMBA=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
CONFIG_PREEMPT=y
# CONFIG_NO_IDLE_HZ is not set
CONFIG_HZ=100
# CONFIG_AEABI is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttySMX0,115200"
# CONFIG_XIP_KERNEL is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
# CONFIG_FPE_NWFPE is not set
# CONFIG_FPE_FASTFPE is not set
# CONFIG_VFP is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
# CONFIG_APM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
CONFIG_NET_IPGRE=m
# CONFIG_NET_IPGRE_BROADCAST is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
CONFIG_SYN_COOKIES=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
CONFIG_INET_XFRM_TUNNEL=y
CONFIG_INET_TUNNEL=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
#
# IP: Virtual Server Configuration
#
# CONFIG_IP_VS is not set
CONFIG_IPV6=m
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_IPV6_ROUTER_PREF is not set
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_INET6_XFRM_TUNNEL=m
CONFIG_INET6_TUNNEL=m
# CONFIG_IPV6_TUNNEL is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
#
# Core Netfilter Configuration
#
# CONFIG_NETFILTER_NETLINK is not set
# CONFIG_NETFILTER_XTABLES is not set
#
# IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
# CONFIG_IP_NF_CT_ACCT is not set
# CONFIG_IP_NF_CONNTRACK_MARK is not set
# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
# CONFIG_IP_NF_CT_PROTO_SCTP is not set
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
# CONFIG_IP_NF_NETBIOS_NS is not set
CONFIG_IP_NF_TFTP=m
CONFIG_IP_NF_AMANDA=m
# CONFIG_IP_NF_PPTP is not set
# CONFIG_IP_NF_H323 is not set
CONFIG_IP_NF_QUEUE=m
#
# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
# CONFIG_IP6_NF_QUEUE is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
CONFIG_NET_PKTGEN=m
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_ARM_INTEGRATOR is not set
CONFIG_MTD_PLATRAM=y
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# OneNAND Flash Device Drivers
#
# CONFIG_MTD_ONENAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_SMC91X is not set
CONFIG_NET_NETX=y
# CONFIG_DM9000 is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_NETX=y
CONFIG_SERIAL_NETX_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_NVRAM=m
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Misc devices
#
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
CONFIG_FB=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_MACMODES is not set
CONFIG_FB_FIRMWARE_EDID=y
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
CONFIG_FB_ARMCLCD=y
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
#
# Logo configuration
#
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=m
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=m
CONFIG_RTC_INTF_PROC=m
CONFIG_RTC_INTF_DEV=m
#
# RTC drivers
#
# CONFIG_RTC_DRV_M48T86 is not set
CONFIG_RTC_DRV_NETX=m
# CONFIG_RTC_DRV_TEST is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_SUMMARY is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
CONFIG_NFS_DIRECTIO=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=17
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_DEBUG_PREEMPT=y
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_DEBUG_VM is not set
CONFIG_FRAME_POINTER=y
# CONFIG_UNWIND_INFO is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_LL is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#
#
# Library routines
#
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y

76
arch/arm/configs/s3c2410_defconfig
View File

@ -1,12 +1,14 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.16
# Mon Mar 20 20:36:02 2006
# Linux kernel version: 2.6.17
# Tue Jun 20 18:57:01 2006
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_VECTORS_BASE=0xffff0000
#
# Code maturity level options
@ -27,6 +29,7 @@ CONFIG_SYSVIPC=y
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_UID16=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@ -42,10 +45,6 @@ CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
CONFIG_SLAB=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
@ -57,7 +56,6 @@ CONFIG_OBSOLETE_INTERMODULE=y
#
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
@ -65,6 +63,7 @@ CONFIG_KMOD=y
#
# Block layer
#
# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
@ -92,6 +91,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
@ -106,6 +106,8 @@ CONFIG_ARCH_S3C2410=y
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_AT91RM9200 is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_NETX is not set
#
# S3C24XX Implementations
@ -116,14 +118,19 @@ CONFIG_ARCH_BAST=y
CONFIG_BAST_PC104_IRQ=y
CONFIG_ARCH_H1940=y
CONFIG_MACH_N30=y
CONFIG_MACH_SMDK=y
CONFIG_ARCH_SMDK2410=y
CONFIG_ARCH_S3C2440=y
CONFIG_SMDK2440_CPU2440=y
CONFIG_SMDK2440_CPU2442=y
CONFIG_MACH_VR1000=y
CONFIG_MACH_RX3715=y
CONFIG_MACH_OTOM=y
CONFIG_MACH_NEXCODER_2440=y
CONFIG_CPU_S3C2410=y
CONFIG_CPU_S3C244X=y
CONFIG_CPU_S3C2440=y
CONFIG_CPU_S3C2442=y
#
# S3C2410 Boot
@ -251,12 +258,15 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETFILTER is not set
#
@ -360,7 +370,6 @@ CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_AMDSTD_RETRY=0
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
@ -385,7 +394,6 @@ CONFIG_MTD_BAST_MAXSIZE=4
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
@ -694,7 +702,6 @@ CONFIG_S3C2410_WATCHDOG=y
#
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
CONFIG_S3C2410_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
@ -743,9 +750,7 @@ CONFIG_SENSORS_EEPROM=m
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_RTC8564 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_RTC_X1205_I2C is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
@ -807,18 +812,29 @@ CONFIG_SENSORS_LM85=m
#
#
# Multimedia Capabilities Port drivers
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
# CONFIG_USB_DABUSB is not set
#
# Graphics support
@ -828,6 +844,7 @@ CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_MACMODES is not set
CONFIG_FB_FIRMWARE_EDID=y
CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_S1D13XXX is not set
@ -863,6 +880,7 @@ CONFIG_FONT_8x16=y
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
@ -915,9 +933,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_ACECAD is not set
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set
# CONFIG_USB_MTOUCH is not set
# CONFIG_USB_ITMTOUCH is not set
# CONFIG_USB_EGALAX is not set
# CONFIG_USB_TOUCHSCREEN is not set
# CONFIG_USB_YEALINK is not set
# CONFIG_USB_XPAD is not set
# CONFIG_USB_ATI_REMOTE is not set
@ -930,15 +946,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
#
# CONFIG_USB_MDC800 is not set
#
# USB Multimedia devices
#
# CONFIG_USB_DABUSB is not set
#
# Video4Linux support is needed for USB Multimedia device support
#
#
# USB Network Adapters
#
@ -984,23 +991,18 @@ CONFIG_USB_MON=y
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
#
# File systems
#
@ -1052,7 +1054,6 @@ CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
# CONFIG_CONFIGFS_FS is not set
#
@ -1193,6 +1194,7 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
# CONFIG_DEBUG_VM is not set
CONFIG_FRAME_POINTER=y
# CONFIG_UNWIND_INFO is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_USER=y

61
arch/arm/kernel/process.c
View File

@ -28,6 +28,7 @@
#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/elfcore.h>
#include <linux/pm.h>
#include <asm/leds.h>
#include <asm/processor.h>
@ -71,8 +72,36 @@ static int __init hlt_setup(char *__unused)
__setup("nohlt", nohlt_setup);
__setup("hlt", hlt_setup);
void arm_machine_restart(char mode)
{
/*
* Clean and disable cache, and turn off interrupts
*/
cpu_proc_fin();
/*
* Tell the mm system that we are going to reboot -
* we may need it to insert some 1:1 mappings so that
* soft boot works.
*/
setup_mm_for_reboot(mode);
/*
* Now call the architecture specific reboot code.
*/
arch_reset(mode);
/*
* Whoops - the architecture was unable to reboot.
* Tell the user!
*/
mdelay(1000);
printk("Reboot failed -- System halted\n");
while (1);
}
/*
* The following aren't currently used.
* Function pointers to optional machine specific functions
*/
void (*pm_idle)(void);
EXPORT_SYMBOL(pm_idle);
@ -80,6 +109,10 @@ EXPORT_SYMBOL(pm_idle);
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
void (*arm_pm_restart)(char str) = arm_machine_restart;
EXPORT_SYMBOL_GPL(arm_pm_restart);
/*
* This is our default idle handler. We need to disable
* interrupts here to ensure we don't miss a wakeup call.
@ -151,33 +184,9 @@ void machine_power_off(void)
pm_power_off();
}
void machine_restart(char * __unused)
{
/*
* Clean and disable cache, and turn off interrupts
*/
cpu_proc_fin();
/*
* Tell the mm system that we are going to reboot -
* we may need it to insert some 1:1 mappings so that
* soft boot works.
*/
setup_mm_for_reboot(reboot_mode);
/*
* Now call the architecture specific reboot code.
*/
arch_reset(reboot_mode);
/*
* Whoops - the architecture was unable to reboot.
* Tell the user!
*/
mdelay(1000);
printk("Reboot failed -- System halted\n");
while (1);
arm_pm_restart(reboot_mode);
}
void __show_regs(struct pt_regs *regs)

12
arch/arm/mach-at91rm9200/Kconfig
View File

@ -40,6 +40,18 @@ config MACH_KB9200
help
Select this if you are using KwikByte's KB920x board
config MACH_ATEB9200
bool "Embest's ATEB9200"
depends on ARCH_AT91RM9200
help
Select this if you are using Embest's ATEB9200 board
config MACH_KAFA
bool "Sperry-Sun KAFA board"
depends on ARCH_AT91RM9200
help
Select this if you are using Sperry-Sun's KAFA board
comment "AT91RM9200 Feature Selections"

17
arch/arm/mach-at91rm9200/Makefile
View File

@ -7,22 +7,31 @@ obj-m :=
obj-n :=
obj- :=
obj-$(CONFIG_PM) += pm.o
# Board-specific support
obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
obj-$(CONFIG_MACH_CSB337) += board-csb337.o
obj-$(CONFIG_MACH_CSB637) += board-csb637.o
#obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
#obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
obj-$(CONFIG_MACH_KAFA) += board-kafa.o
# LEDs support
led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
led-$(CONFIG_MACH_CSB337) += leds.o
led-$(CONFIG_MACH_CSB637) += leds.o
#led-$(CONFIG_MACH_KB9200) += leds.o
#led-$(CONFIG_MACH_KAFA) += leds.o
led-$(CONFIG_MACH_KB9200) += leds.o
led-$(CONFIG_MACH_KAFA) += leds.o
obj-$(CONFIG_LEDS) += $(led-y)
# VGA support
#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
ifeq ($(CONFIG_PM_DEBUG),y)
CFLAGS_pm.o += -DDEBUG
endif

131
arch/arm/mach-at91rm9200/board-carmeva.c Normal file
View File

@ -0,0 +1,131 @@
/*
* linux/arch/arm/mach-at91rm9200/board-carmeva.c
*
* Copyright (c) 2005 Peer Georgi
* Conitec Datasystems
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
static void __init carmeva_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
static struct at91_uart_config __initdata carmeva_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init carmeva_map_io(void)
{
at91rm9200_map_io();
/* Initialize clocks: 20.000 MHz crystal */
at91_clock_init(20000000);
/* Setup the serial ports and console */
at91_init_serial(&carmeva_uart_config);
}
static struct at91_eth_data __initdata carmeva_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
};
static struct at91_usbh_data __initdata carmeva_usbh_data = {
.ports = 2,
};
static struct at91_udc_data __initdata carmeva_udc_data = {
.vbus_pin = AT91_PIN_PD12,
.pullup_pin = AT91_PIN_PD9,
};
/* FIXME: user dependend */
// static struct at91_cf_data __initdata carmeva_cf_data = {
// .det_pin = AT91_PIN_PB0,
// .rst_pin = AT91_PIN_PC5,
// .irq_pin = ... not connected
// .vcc_pin = ... always powered
// };
static struct at91_mmc_data __initdata carmeva_mmc_data = {
.is_b = 0,
.wire4 = 1,
};
static void __init carmeva_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&carmeva_eth_data);
/* USB Host */
at91_add_device_usbh(&carmeva_usbh_data);
/* USB Device */
at91_add_device_udc(&carmeva_udc_data);
/* I2C */
at91_add_device_i2c();
/* Compact Flash */
// at91_add_device_cf(&carmeva_cf_data);
/* SPI */
// at91_add_device_spi(NULL, 0);
/* MMC */
at91_add_device_mmc(&carmeva_mmc_data);
}
MACHINE_START(CARMEVA, "Carmeva")
/* Maintainer: Conitec Datasystems */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91rm9200_timer,
.map_io = carmeva_map_io,
.init_irq = carmeva_init_irq,
.init_machine = carmeva_board_init,
MACHINE_END

43
arch/arm/mach-at91rm9200/board-csb337.c
View File

@ -24,6 +24,7 @@
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@ -34,9 +35,9 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
@ -54,32 +55,24 @@ static void __init csb337_init_irq(void)
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
#define CSB337_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
#define CSB337_SERIAL_CONSOLE 0 /* ttyS0 */
static struct at91_uart_config __initdata csb337_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init csb337_map_io(void)
{
int serial[AT91_NR_UART] = CSB337_UART_MAP;
int i;
at91rm9200_map_io();
/* Initialize clocks: 3.6864 MHz crystal */
at91_clock_init(3686400);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = CSB337_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
/* Register UARTs */
for (i = 0; i < AT91_NR_UART; i++) {
if (serial[i] >= 0)
at91_register_uart(i, serial[i]);
}
#endif
/* Setup the serial ports and console */
at91_init_serial(&csb337_uart_config);
}
static struct at91_eth_data __initdata csb337_eth_data = {
@ -118,17 +111,31 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
.wp_pin = AT91_PIN_PD6,
};
static struct spi_board_info csb337_spi_devices[] = {
{ /* CAN controller */
.modalias = "sak82c900",
.chip_select = 0,
.max_speed_hz = 6 * 1000 * 1000,
},
};
static void __init csb337_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&csb337_eth_data);
/* USB Host */
at91_add_device_usbh(&csb337_usbh_data);
/* USB Device */
at91_add_device_udc(&csb337_udc_data);
/* I2C */
at91_add_device_i2c();
/* Compact Flash */
at91_set_gpio_input(AT91_PIN_PB22, 1); /* IOIS16 */
at91_add_device_cf(&csb337_cf_data);
/* SPI */
at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
/* MMC */
at91_add_device_mmc(&csb337_mmc_data);
}

32
arch/arm/mach-at91rm9200/board-csb637.c
View File

@ -34,9 +34,9 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
@ -54,14 +54,14 @@ static void __init csb637_init_irq(void)
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
#define CSB637_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
#define CSB637_SERIAL_CONSOLE 0 /* ttyS0 */
static struct at91_uart_config __initdata csb637_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init csb637_map_io(void)
{
int serial[AT91_NR_UART] = CSB637_UART_MAP;
int i;
at91rm9200_map_io();
/* Initialize clocks: 3.6864 MHz crystal */
@ -70,16 +70,8 @@ static void __init csb637_map_io(void)
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = CSB637_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
/* Register UARTs */
for (i = 0; i < AT91_NR_UART; i++) {
if (serial[i] >= 0)
at91_register_uart(i, serial[i]);
}
#endif
/* Setup the serial ports and console */
at91_init_serial(&csb637_uart_config);
}
static struct at91_eth_data __initdata csb637_eth_data = {
@ -98,12 +90,18 @@ static struct at91_udc_data __initdata csb637_udc_data = {
static void __init csb637_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&csb637_eth_data);
/* USB Host */
at91_add_device_usbh(&csb637_usbh_data);
/* USB Device */
at91_add_device_udc(&csb637_udc_data);
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(NULL, 0);
}
MACHINE_START(CSB637, "Cogent CSB637")

59
arch/arm/mach-at91rm9200/board-dk.c
View File

@ -27,6 +27,7 @@
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@ -37,9 +38,9 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
@ -57,14 +58,14 @@ static void __init dk_init_irq(void)
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
#define DK_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
#define DK_SERIAL_CONSOLE 0 /* ttyS0 */
static struct at91_uart_config __initdata dk_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init dk_map_io(void)
{
int serial[AT91_NR_UART] = DK_UART_MAP;
int i;
at91rm9200_map_io();
/* Initialize clocks: 18.432 MHz crystal */
@ -73,16 +74,8 @@ static void __init dk_map_io(void)
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = DK_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
/* Register UARTs */
for (i = 0; i < AT91_NR_UART; i++) {
if (at91_serial_map[i] >= 0)
at91_register_uart(i, at91_serial_map[i]);
}
#endif
/* Setup the serial ports and console */
at91_init_serial(&dk_uart_config);
}
static struct at91_eth_data __initdata dk_eth_data = {
@ -111,16 +104,48 @@ static struct at91_mmc_data __initdata dk_mmc_data = {
.wire4 = 1,
};
static struct spi_board_info dk_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
},
{ /* UR6HCPS2-SP40 PS2-to-SPI adapter */
.modalias = "ur6hcps2",
.chip_select = 1,
.max_speed_hz = 250 * 1000,
},
{ /* TLV1504 ADC, 4 channels, 10 bits; one is a temp sensor */
.modalias = "tlv1504",
.chip_select = 2,
.max_speed_hz = 20 * 1000 * 1000,
},
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
{ /* DataFlash card */
.modalias = "mtd_dataflash",
.chip_select = 3,
.max_speed_hz = 15 * 1000 * 1000,
}
#endif
};
static void __init dk_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&dk_eth_data);
/* USB Host */
at91_add_device_usbh(&dk_usbh_data);
/* USB Device */
at91_add_device_udc(&dk_udc_data);
at91_set_multi_drive(dk_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
/* Compact Flash */
at91_add_device_cf(&dk_cf_data);
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices));
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
/* DataFlash card */
at91_set_gpio_output(AT91_PIN_PB7, 0);

130
arch/arm/mach-at91rm9200/board-eb9200.c Normal file
View File

@ -0,0 +1,130 @@
/*
* linux/arch/arm/mach-at91rm9200/board-eb9200.c
*
* Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest
* by Andrew Patrikalakis
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/device.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
static void __init eb9200_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
static struct at91_uart_config __initdata eb9200_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init eb9200_map_io(void)
{
at91rm9200_map_io();
/* Initialize clocks: 18.432 MHz crystal */
at91_clock_init(18432000);
/* Setup the serial ports and console */
at91_init_serial(&eb9200_uart_config);
}
static struct at91_eth_data __initdata eb9200_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
};
static struct at91_usbh_data __initdata eb9200_usbh_data = {
.ports = 2,
};
static struct at91_udc_data __initdata eb9200_udc_data = {
.vbus_pin = AT91_PIN_PD4,
.pullup_pin = AT91_PIN_PD5,
};
static struct at91_cf_data __initdata eb9200_cf_data = {
.det_pin = AT91_PIN_PB0,
.rst_pin = AT91_PIN_PC5,
// .irq_pin = ... not connected
// .vcc_pin = ... always powered
};
static struct at91_mmc_data __initdata eb9200_mmc_data = {
.is_b = 0,
.wire4 = 1,
};
static void __init eb9200_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&eb9200_eth_data);
/* USB Host */
at91_add_device_usbh(&eb9200_usbh_data);
/* USB Device */
at91_add_device_udc(&eb9200_udc_data);
/* I2C */
at91_add_device_i2c();
/* Compact Flash */
at91_add_device_cf(&eb9200_cf_data);
/* SPI */
at91_add_device_spi(NULL, 0);
/* MMC */
/* only supports 1 or 4 bit interface, not wired through to SPI */
at91_add_device_mmc(&eb9200_mmc_data);
}
MACHINE_START(ATEB9200, "Embest ATEB9200")
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91rm9200_timer,
.map_io = eb9200_map_io,
.init_irq = eb9200_init_irq,
.init_machine = eb9200_board_init,
MACHINE_END

49
arch/arm/mach-at91rm9200/board-ek.c
View File

@ -27,6 +27,7 @@
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <asm/hardware.h>
#include <asm/setup.h>
@ -37,9 +38,9 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
@ -57,14 +58,14 @@ static void __init ek_init_irq(void)
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
#define EK_UART_MAP { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
#define EK_SERIAL_CONSOLE 0 /* ttyS0 */
static struct at91_uart_config __initdata ek_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init ek_map_io(void)
{
int serial[AT91_NR_UART] = EK_UART_MAP;
int i;
at91rm9200_map_io();
/* Initialize clocks: 18.432 MHz crystal */
@ -73,16 +74,8 @@ static void __init ek_map_io(void)
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
#ifdef CONFIG_SERIAL_AT91
at91_console_port = EK_SERIAL_CONSOLE;
memcpy(at91_serial_map, serial, sizeof(serial));
/* Register UARTs */
for (i = 0; i < AT91_NR_UART; i++) {
if (serial[i] >= 0)
at91_register_uart(i, serial[i]);
}
#endif
/* Setup the serial ports and console */
at91_init_serial(&ek_uart_config);
}
static struct at91_eth_data __initdata ek_eth_data = {
@ -106,14 +99,36 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
.wp_pin = AT91_PIN_PA17,
};
static struct spi_board_info ek_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
},
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
{ /* DataFlash card */
.modalias = "mtd_dataflash",
.chip_select = 3,
.max_speed_hz = 15 * 1000 * 1000,
},
#endif
};
static void __init ek_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&ek_eth_data);
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
at91_add_device_udc(&ek_udc_data);
at91_set_multi_drive(ek_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
/* DataFlash card */
at91_set_gpio_output(AT91_PIN_PB22, 0);

116
arch/arm/mach-at91rm9200/board-kafa.c Normal file
View File

@ -0,0 +1,116 @@
/*
* linux/arch/arm/mach-at91rm9200/board-kafa.c
*
* Copyright (C) 2006 Sperry-Sun
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
static void __init kafa_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
}
/*
* Serial port configuration.
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
static struct at91_uart_config __initdata kafa_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 2,
.tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init kafa_map_io(void)
{
at91rm9200_map_io();
/* Initialize clocks: 18.432 MHz crystal */
at91_clock_init(18432000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
/* Setup the serial ports and console */
at91_init_serial(&kafa_uart_config);
}
static struct at91_eth_data __initdata kafa_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 0,
};
static struct at91_usbh_data __initdata kafa_usbh_data = {
.ports = 1,
};
static struct at91_udc_data __initdata kafa_udc_data = {
.vbus_pin = AT91_PIN_PB6,
.pullup_pin = AT91_PIN_PB7,
};
static void __init kafa_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&kafa_eth_data);
/* USB Host */
at91_add_device_usbh(&kafa_usbh_data);
/* USB Device */
at91_add_device_udc(&kafa_udc_data);
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(NULL, 0);
}
MACHINE_START(KAFA, "Sperry-Sun KAFA")
/* Maintainer: Sergei Sharonov */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91rm9200_timer,
.map_io = kafa_map_io,
.init_irq = kafa_init_irq,
.init_machine = kafa_board_init,
MACHINE_END

125
arch/arm/mach-at91rm9200/board-kb9202.c Normal file
View File

@ -0,0 +1,125 @@
/*
* linux/arch/arm/mach-at91rm9200/board-kb9202.c
*
* Copyright (c) 2005 kb_admin
* KwikByte, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
static void __init kb9202_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
}
/*
* Serial port configuration.
* 0 .. 3 = USART0 .. USART3
* 4 = DBGU
*/
static struct at91_uart_config __initdata kb9202_uart_config = {
.console_tty = 0, /* ttyS0 */
.nr_tty = 3,
.tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */
};
static void __init kb9202_map_io(void)
{
at91rm9200_map_io();
/* Initialize clocks: 10 MHz crystal */
at91_clock_init(10000000);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
/* Setup the serial ports and console */
at91_init_serial(&kb9202_uart_config);
}
static struct at91_eth_data __initdata kb9202_eth_data = {
.phy_irq_pin = AT91_PIN_PB29,
.is_rmii = 0,
};
static struct at91_usbh_data __initdata kb9202_usbh_data = {
.ports = 1,
};
static struct at91_udc_data __initdata kb9202_udc_data = {
.vbus_pin = AT91_PIN_PB24,
.pullup_pin = AT91_PIN_PB22,
};
static struct at91_mmc_data __initdata kb9202_mmc_data = {
.det_pin = AT91_PIN_PB2,
.is_b = 0,
.wire4 = 1,
};
static void __init kb9202_board_init(void)
{
/* Serial */
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&kb9202_eth_data);
/* USB Host */
at91_add_device_usbh(&kb9202_usbh_data);
/* USB Device */
at91_add_device_udc(&kb9202_udc_data);
/* MMC */
at91_add_device_mmc(&kb9202_mmc_data);
/* I2C */
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(NULL, 0);
}
MACHINE_START(KB9200, "KB920x")
/* Maintainer: KwikByte, Inc. */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91rm9200_timer,
.map_io = kb9202_map_io,
.init_irq = kb9202_init_irq,
.init_machine = kb9202_board_init,
MACHINE_END

126
arch/arm/mach-at91rm9200/clock.c
View File

@ -27,12 +27,10 @@
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/hardware.h>
#include <asm/arch/board.h> /* for master clock global */
#include <asm/hardware.h>
#include "generic.h"
#undef DEBUG
/*
* There's a lot more which can be done with clocks, including cpufreq
@ -41,7 +39,9 @@
*/
struct clk {
const char *name;
const char *name; /* unique clock name */
const char *function; /* function of the clock */
struct device *dev; /* device associated with function */
unsigned long rate_hz;
struct clk *parent;
u32 pmc_mask;
@ -71,15 +71,14 @@ static struct clk clk32k = {
};
static struct clk main_clk = {
.name = "main",
.pmc_mask = 1 << 0, /* in PMC_SR */
.users = 1,
.pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */
.id = 1,
.primary = 1,
};
static struct clk plla = {
.name = "plla",
.parent = &main_clk,
.pmc_mask = 1 << 1, /* in PMC_SR */
.pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */
.id = 2,
.primary = 1,
.pll = 1,
@ -105,7 +104,7 @@ static void pllb_mode(struct clk *clk, int is_on)
static struct clk pllb = {
.name = "pllb",
.parent = &main_clk,
.pmc_mask = 1 << 2, /* in PMC_SR */
.pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */
.mode = pllb_mode,
.id = 3,
.primary = 1,
@ -177,8 +176,7 @@ static struct clk pck3 = {
*/
static struct clk mck = {
.name = "mck",
.pmc_mask = 1 << 3, /* in PMC_SR */
.users = 1, /* (must be) always on */
.pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
};
static void pmc_periph_mode(struct clk *clk, int is_on)
@ -249,6 +247,30 @@ static struct clk spi_clk = {
.pmc_mask = 1 << AT91_ID_SPI,
.mode = pmc_periph_mode,
};
static struct clk pioA_clk = {
.name = "pioA_clk",
.parent = &mck,
.pmc_mask = 1 << AT91_ID_PIOA,
.mode = pmc_periph_mode,
};
static struct clk pioB_clk = {
.name = "pioB_clk",
.parent = &mck,
.pmc_mask = 1 << AT91_ID_PIOB,
.mode = pmc_periph_mode,
};
static struct clk pioC_clk = {
.name = "pioC_clk",
.parent = &mck,
.pmc_mask = 1 << AT91_ID_PIOC,
.mode = pmc_periph_mode,
};
static struct clk pioD_clk = {
.name = "pioD_clk",
.parent = &mck,
.pmc_mask = 1 << AT91_ID_PIOD,
.mode = pmc_periph_mode,
};
static struct clk *const clock_list[] = {
/* four primary clocks -- MUST BE FIRST! */
@ -279,21 +301,46 @@ static struct clk *const clock_list[] = {
&udc_clk,
&twi_clk,
&spi_clk,
&pioA_clk,
&pioB_clk,
&pioC_clk,
&pioD_clk,
// ssc0..ssc2
// tc0..tc5
// irq0..irq6
&ohci_clk,
&ether_clk,
};
/*
* Associate a particular clock with a function (eg, "uart") and device.
* The drivers can then request the same 'function' with several different
* devices and not care about which clock name to use.
*/
void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
{
struct clk *clk = clk_get(NULL, id);
if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
return;
clk->function = func;
clk->dev = dev;
}
/* clocks are all static for now; no refcounting necessary */
struct clk *clk_get(struct device *dev, const char *id)
{
int i;
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
if (strcmp(id, clock_list[i]->name) == 0)
return clock_list[i];
struct clk *clk = clock_list[i];
if (strcmp(id, clk->name) == 0)
return clk;
if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
return clk;
}
return ERR_PTR(-ENOENT);
@ -593,6 +640,30 @@ fail:
return 0;
}
/*
* Several unused clocks may be active. Turn them off.
*/
static void at91_periphclk_reset(void)
{
unsigned long reg;
int i;
reg = at91_sys_read(AT91_PMC_PCSR);
for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
struct clk *clk = clock_list[i];
if (clk->mode != pmc_periph_mode)
continue;
if (clk->users > 0)
reg &= ~clk->pmc_mask;
}
at91_sys_write(AT91_PMC_PCDR, reg);
}
int __init at91_clock_init(unsigned long main_clock)
{
unsigned tmp, freq, mckr;
@ -626,7 +697,6 @@ int __init at91_clock_init(unsigned long main_clock)
*/
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
at91_sys_write(AT91_PMC_PCDR, (1 << AT91_ID_UHP) | (1 << AT91_ID_UDP));
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
at91_sys_write(AT91_CKGR_PLLBR, 0);
at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
@ -640,19 +710,18 @@ int __init at91_clock_init(unsigned long main_clock)
*/
mckr = at91_sys_read(AT91_PMC_MCKR);
mck.parent = clock_list[mckr & AT91_PMC_CSS];
mck.parent->users++;
freq = mck.parent->rate_hz;
freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
/* MCK and CPU clock are "always on" */
clk_enable(&mck);
printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
freq / 1000000, (unsigned) mck.rate_hz / 1000000,
(unsigned) main_clock / 1000000,
((unsigned) main_clock % 1000000) / 1000);
/* FIXME get rid of master_clock global */
at91_master_clock = mck.rate_hz;
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
/* establish PCK0..PCK3 parentage */
for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) {
@ -663,19 +732,28 @@ int __init at91_clock_init(unsigned long main_clock)
continue;
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
parent = clock_list[pckr & 3];
parent = clock_list[pckr & AT91_PMC_CSS];
clk->parent = parent;
clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
if (clk->users == 0) {
/* not being used, so switch it off */
at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
}
}
#else
/* disable unused clocks */
/* disable all programmable clocks */
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
#endif
/* FIXME several unused clocks may still be active... provide
* a CONFIG option to turn off all unused clocks at some point
* before driver init starts.
*/
/* enable the PIO clocks */
clk_enable(&pioA_clk);
clk_enable(&pioB_clk);
clk_enable(&pioC_clk);
clk_enable(&pioD_clk);
/* disable all other unused peripheral clocks */
at91_periphclk_reset();
return 0;
}

19
arch/arm/mach-at91rm9200/common.c
View File

@ -16,7 +16,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#include "generic.h"
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
@ -94,6 +95,11 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
.pfn = __phys_to_pfn(AT91_BASE_TCB0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_SRAM_VIRT_BASE,
.pfn = __phys_to_pfn(AT91_SRAM_BASE),
.length = AT91_SRAM_SIZE,
.type = MT_DEVICE,
},
};
@ -102,14 +108,3 @@ void __init at91rm9200_map_io(void)
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
}
unsigned long at91_master_clock;
EXPORT_SYMBOL(at91_master_clock);
int at91_serial_map[AT91_NR_UART];
int at91_console_port;
EXPORT_SYMBOL(at91_serial_map);
EXPORT_SYMBOL(at91_console_port);

406
arch/arm/mach-at91rm9200/devices.c
View File

@ -16,9 +16,15 @@
#include <linux/config.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/pio.h>
#include <asm/arch/gpio.h>
#include "generic.h"
#define SZ_512 0x00000200
#define SZ_256 0x00000100
#define SZ_16 0x00000010
/* --------------------------------------------------------------------
* USB Host
@ -28,7 +34,7 @@
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource at91_usbh_resource[] = {
static struct resource at91_usbh_resources[] = {
[0] = {
.start = AT91_UHP_BASE,
.end = AT91_UHP_BASE + SZ_1M - 1,
@ -42,15 +48,15 @@ static struct resource at91_usbh_resource[] = {
};
static struct platform_device at91rm9200_usbh_device = {
.name = "at91rm9200-ohci",
.name = "at91_ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = at91_usbh_resource,
.num_resources = ARRAY_SIZE(at91_usbh_resource),
.resource = at91_usbh_resources,
.num_resources = ARRAY_SIZE(at91_usbh_resources),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
@ -74,11 +80,16 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
static struct at91_udc_data udc_data;
static struct resource at91_udc_resources[] = {
{
[0] = {
.start = AT91_BASE_UDP,
.end = AT91_BASE_UDP + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}
},
[1] = {
.start = AT91_ID_UDP,
.end = AT91_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_udc_device = {
@ -100,10 +111,8 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
if (data->pullup_pin) {
if (data->pullup_pin)
at91_set_gpio_output(data->pullup_pin, 0);
at91_set_multi_drive(data->pullup_pin, 1);
}
udc_data = *data;
platform_device_register(&at91rm9200_udc_device);
@ -197,7 +206,7 @@ static struct at91_cf_data cf_data;
static struct resource at91_cf_resources[] = {
[0] = {
.start = AT91_CF_BASE,
/* ties up CS4, CS5, and CS6 */
/* ties up CS4, CS5 and CS6 */
.end = AT91_CF_BASE + (0x30000000 - 1),
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
},
@ -231,6 +240,12 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
at91_set_gpio_output(data->vcc_pin, 0);
at91_set_gpio_output(data->rst_pin, 0);
/* force poweron defaults for these pins ... */
at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
cf_data = *data;
platform_device_register(&at91rm9200_cf_device);
}
@ -319,6 +334,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#endif
/* --------------------------------------------------------------------
* NAND / SmartMedia
* -------------------------------------------------------------------- */
@ -399,23 +415,111 @@ void __init at91_add_device_i2c(void) {}
#endif
/* --------------------------------------------------------------------
* SPI
* -------------------------------------------------------------------- */
#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
static u64 spi_dmamask = 0xffffffffUL;
static struct resource at91_spi_resources[] = {
[0] = {
.start = AT91_BASE_SPI,
.end = AT91_BASE_SPI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SPI,
.end = AT91_ID_SPI,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_spi_device = {
.name = "at91_spi",
.id = 0,
.dev = {
.dma_mask = &spi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = at91_spi_resources,
.num_resources = ARRAY_SIZE(at91_spi_resources),
};
static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
{
int i;
unsigned long cs_pin;
at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
/* Enable SPI chip-selects */
for (i = 0; i < nr_devices; i++) {
if (devices[i].controller_data)
cs_pin = (unsigned long) devices[i].controller_data;
else
cs_pin = at91_spi_standard_cs[devices[i].chip_select];
#ifdef CONFIG_SPI_AT91_MANUAL_CS
at91_set_gpio_output(cs_pin, 1);
#else
at91_set_A_periph(cs_pin, 0);
#endif
/* pass chip-select pin to driver */
devices[i].controller_data = (void *) cs_pin;
}
spi_register_board_info(devices, nr_devices);
at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
platform_device_register(&at91rm9200_spi_device);
}
#else
void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
#endif
/* --------------------------------------------------------------------
* RTC
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_RTC) || defined(CONFIG_AT91_RTC_MODULE)
#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
static struct platform_device at91rm9200_rtc_device = {
.name = "at91_rtc",
.id = -1,
.num_resources = 0,
};
void __init at91_add_device_rtc(void)
static void __init at91_add_device_rtc(void)
{
platform_device_register(&at91rm9200_rtc_device);
}
#else
void __init at91_add_device_rtc(void) {}
static void __init at91_add_device_rtc(void) {}
#endif
/* --------------------------------------------------------------------
* Watchdog
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
static struct platform_device at91rm9200_wdt_device = {
.name = "at91_wdt",
.id = -1,
.num_resources = 0,
};
static void __init at91_add_device_watchdog(void)
{
platform_device_register(&at91rm9200_wdt_device);
}
#else
static void __init at91_add_device_watchdog(void) {}
#endif
@ -429,13 +533,281 @@ u8 at91_leds_timer;
void __init at91_init_leds(u8 cpu_led, u8 timer_led)
{
at91_leds_cpu = cpu_led;
at91_leds_timer = timer_led;
at91_leds_cpu = cpu_led;
at91_leds_timer = timer_led;
}
#else
void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
#endif
/* --------------------------------------------------------------------
* UART
* -------------------------------------------------------------------- */
#if defined(CONFIG_SERIAL_AT91)
static struct resource dbgu_resources[] = {
[0] = {
.start = AT91_VA_BASE_SYS + AT91_DBGU,
.end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_SYS,
.end = AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
static struct at91_uart_data dbgu_data = {
.use_dma_tx = 0,
.use_dma_rx = 0, /* DBGU not capable of receive DMA */
};
static struct platform_device at91rm9200_dbgu_device = {
.name = "at91_usart",
.id = 0,
.dev = {
.platform_data = &dbgu_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = dbgu_resources,
.num_resources = ARRAY_SIZE(dbgu_resources),
};
static inline void configure_dbgu_pins(void)
{
at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
}
static struct resource uart0_resources[] = {
[0] = {
.start = AT91_BASE_US0,
.end = AT91_BASE_US0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_US0,
.end = AT91_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
static struct at91_uart_data uart0_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91rm9200_uart0_device = {
.name = "at91_usart",
.id = 1,
.dev = {
.platform_data = &uart0_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart0_resources,
.num_resources = ARRAY_SIZE(uart0_resources),
};
static inline void configure_usart0_pins(void)
{
at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
/*
* AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
* We need to drive the pin manually. Default is off (RTS is active low).
*/
at91_set_gpio_output(AT91_PIN_PA21, 1);
}
static struct resource uart1_resources[] = {
[0] = {
.start = AT91_BASE_US1,
.end = AT91_BASE_US1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_US1,
.end = AT91_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
static struct at91_uart_data uart1_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91rm9200_uart1_device = {
.name = "at91_usart",
.id = 2,
.dev = {
.platform_data = &uart1_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart1_resources,
.num_resources = ARRAY_SIZE(uart1_resources),
};
static inline void configure_usart1_pins(void)
{
at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
}
static struct resource uart2_resources[] = {
[0] = {
.start = AT91_BASE_US2,
.end = AT91_BASE_US2 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_US2,
.end = AT91_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
static struct at91_uart_data uart2_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91rm9200_uart2_device = {
.name = "at91_usart",
.id = 3,
.dev = {
.platform_data = &uart2_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart2_resources,
.num_resources = ARRAY_SIZE(uart2_resources),
};
static inline void configure_usart2_pins(void)
{
at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
}
static struct resource uart3_resources[] = {
[0] = {
.start = AT91_BASE_US3,
.end = AT91_BASE_US3 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_US3,
.end = AT91_ID_US3,
.flags = IORESOURCE_IRQ,
},
};
static struct at91_uart_data uart3_data = {
.use_dma_tx = 1,
.use_dma_rx = 1,
};
static struct platform_device at91rm9200_uart3_device = {
.name = "at91_usart",
.id = 4,
.dev = {
.platform_data = &uart3_data,
.coherent_dma_mask = 0xffffffff,
},
.resource = uart3_resources,
.num_resources = ARRAY_SIZE(uart3_resources),
};
static inline void configure_usart3_pins(void)
{
at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
}
struct platform_device *at91_uarts[AT91_NR_UART]; /* the UARTs to use */
struct platform_device *at91_default_console_device; /* the serial console device */
void __init at91_init_serial(struct at91_uart_config *config)
{
int i;
/* Fill in list of supported UARTs */
for (i = 0; i < config->nr_tty; i++) {
switch (config->tty_map[i]) {
case 0:
configure_usart0_pins();
at91_uarts[i] = &at91rm9200_uart0_device;
at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
break;
case 1:
configure_usart1_pins();
at91_uarts[i] = &at91rm9200_uart1_device;
at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
break;
case 2:
configure_usart2_pins();
at91_uarts[i] = &at91rm9200_uart2_device;
at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
break;
case 3:
configure_usart3_pins();
at91_uarts[i] = &at91rm9200_uart3_device;
at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
break;
case 4:
configure_dbgu_pins();
at91_uarts[i] = &at91rm9200_dbgu_device;
at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
break;
default:
continue;
}
at91_uarts[i]->id = i; /* update ID number to mapped ID */
}
/* Set serial console device */
if (config->console_tty < AT91_NR_UART)
at91_default_console_device = at91_uarts[config->console_tty];
if (!at91_default_console_device)
printk(KERN_INFO "AT91: No default serial console defined.\n");
}
void __init at91_add_device_serial(void)
{
int i;
for (i = 0; i < AT91_NR_UART; i++) {
if (at91_uarts[i])
platform_device_register(at91_uarts[i]);
}
}
#else
void __init at91_init_serial(struct at91_uart_config *config) {}
void __init at91_add_device_serial(void) {}
#endif
/* -------------------------------------------------------------------- */
/*
* These devices are always present and don't need any board-specific
* setup.
*/
static int __init at91_add_standard_devices(void)
{
at91_add_device_rtc();
at91_add_device_watchdog();
return 0;
}
arch_initcall(at91_add_standard_devices);

7
arch/arm/mach-at91rm9200/generic.h
View File

@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer;
extern void __init at91rm9200_map_io(void);
extern int __init at91_clock_init(unsigned long main_clock);
struct device;
extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
/* Power Management */
extern void at91_irq_suspend(void);
extern void at91_irq_resume(void);

89
arch/arm/mach-at91rm9200/gpio.c
View File

@ -16,7 +16,7 @@
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#include <asm/arch/gpio.h>
static const u32 pio_controller_offset[4] = {
@ -213,6 +213,84 @@ EXPORT_SYMBOL(at91_get_gpio_value);
/*--------------------------------------------------------------------------*/
#ifdef CONFIG_PM
static u32 wakeups[BGA_GPIO_BANKS];
static u32 backups[BGA_GPIO_BANKS];
static int gpio_irq_set_wake(unsigned pin, unsigned state)
{
unsigned mask = pin_to_mask(pin);
pin -= PIN_BASE;
pin /= 32;
if (unlikely(pin >= BGA_GPIO_BANKS))
return -EINVAL;
if (state)
wakeups[pin] |= mask;
else
wakeups[pin] &= ~mask;
return 0;
}
void at91_gpio_suspend(void)
{
int i;
for (i = 0; i < BGA_GPIO_BANKS; i++) {
u32 pio = pio_controller_offset[i];
/*
* Note: drivers should have disabled GPIO interrupts that
* aren't supposed to be wakeup sources.
* But that is not much good on ARM..... disable_irq() does
* not update the hardware immediately, so the hardware mask
* (IMR) has the wrong value (not current, too much is
* permitted).
*
* Our workaround is to disable all non-wakeup IRQs ...
* which is exactly what correct drivers asked for in the
* first place!
*/
backups[i] = at91_sys_read(pio + PIO_IMR);
at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]);
at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
if (!wakeups[i]) {
disable_irq_wake(AT91_ID_PIOA + i);
at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
} else {
enable_irq_wake(AT91_ID_PIOA + i);
#ifdef CONFIG_PM_DEBUG
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
#endif
}
}
}
void at91_gpio_resume(void)
{
int i;
for (i = 0; i < BGA_GPIO_BANKS; i++) {
at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]);
at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]);
}
at91_sys_write(AT91_PMC_PCER,
(1 << AT91_ID_PIOA)
| (1 << AT91_ID_PIOB)
| (1 << AT91_ID_PIOC)
| (1 << AT91_ID_PIOD));
}
#else
#define gpio_irq_set_wake NULL
#endif
/* Several AIC controller irqs are dispatched through this GPIO handler.
* To use any AT91_PIN_* as an externally triggered IRQ, first call
@ -252,6 +330,7 @@ static struct irqchip gpio_irqchip = {
.mask = gpio_irq_mask,
.unmask = gpio_irq_unmask,
.set_type = gpio_irq_type,
.set_wake = gpio_irq_set_wake,
};
static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs)
@ -266,6 +345,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
/* temporarily mask (level sensitive) parent IRQ */
desc->chip->ack(irq);
for (;;) {
/* reading ISR acks the pending (edge triggered) GPIO interrupt */
isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
if (!isr)
break;
@ -315,15 +395,16 @@ void __init at91_gpio_irq_setup(unsigned banks)
set_irq_chipdata(id, controller);
for (i = 0; i < 32; i++, pin++) {
/*
* Can use the "simple" and not "edge" handler since it's
* shorter, and the AIC handles interupts sanely.
*/
set_irq_chip(pin, &gpio_irqchip);
set_irq_handler(pin, do_simple_IRQ);
set_irq_flags(pin, IRQF_VALID);
}
set_irq_chained_handler(id, gpio_irq_handler);
/* enable the PIO peripheral clock */
at91_sys_write(AT91_PMC_PCER, 1 << id);
}
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
}

44
arch/arm/mach-at91rm9200/irq.c
View File

@ -92,10 +92,6 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
/* change triggering only for FIQ and external IRQ0..IRQ6 */
if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ))
return -EINVAL;
switch (type) {
case IRQT_HIGH:
srctype = AT91_AIC_SRCTYPE_HIGH;
@ -104,9 +100,13 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQT_LOW:
if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_LOW;
break;
case IRQT_FALLING:
if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_FALLING;
break;
default:
@ -118,11 +118,47 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
return 0;
}
#ifdef CONFIG_PM
static u32 wakeups;
static u32 backups;
static int at91rm9200_irq_set_wake(unsigned irq, unsigned value)
{
if (unlikely(irq >= 32))
return -EINVAL;
if (value)
wakeups |= (1 << irq);
else
wakeups &= ~(1 << irq);
return 0;
}
void at91_irq_suspend(void)
{
backups = at91_sys_read(AT91_AIC_IMR);
at91_sys_write(AT91_AIC_IDCR, backups);
at91_sys_write(AT91_AIC_IECR, wakeups);
}
void at91_irq_resume(void)
{
at91_sys_write(AT91_AIC_IDCR, wakeups);
at91_sys_write(AT91_AIC_IECR, backups);
}
#else
#define at91rm9200_irq_set_wake NULL
#endif
static struct irqchip at91rm9200_irq_chip = {
.ack = at91rm9200_mask_irq,
.mask = at91rm9200_mask_irq,
.unmask = at91rm9200_unmask_irq,
.set_type = at91rm9200_irq_type,
.set_wake = at91rm9200_irq_set_wake,
};
/*

225
arch/arm/mach-at91rm9200/pm.c Normal file
View File

@ -0,0 +1,225 @@
/*
* arch/arm/mach-at91rm9200/pm.c
* AT91 Power Management
*
* Copyright (C) 2005 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/pm.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
#include <linux/pm.h>
#include <linux/interrupt.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
#include <asm/mach-types.h>
#include <asm/arch/gpio.h>
#include "generic.h"
static int at91_pm_valid_state(suspend_state_t state)
{
switch (state) {
case PM_SUSPEND_ON:
case PM_SUSPEND_STANDBY:
case PM_SUSPEND_MEM:
return 1;
default:
return 0;
}
}
static suspend_state_t target_state;
/*
* Called after processes are frozen, but before we shutdown devices.
*/
static int at91_pm_prepare(suspend_state_t state)
{
target_state = state;
return 0;
}
/*
* Verify that all the clocks are correct before entering
* slow-clock mode.
*/
static int at91_pm_verify_clocks(void)
{
unsigned long scsr;
int i;
scsr = at91_sys_read(AT91_PMC_SCSR);
/* USB must not be using PLLB */
if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
return 0;
}
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
/* PCK0..PCK3 must be disabled, or configured to use clk32k */
for (i = 0; i < 4; i++) {
u32 css;
if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
continue;
css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
if (css != AT91_PMC_CSS_SLOW) {
pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
return 0;
}
}
#endif
return 1;
}
/*
* Call this from platform driver suspend() to see how deeply to suspend.
* For example, some controllers (like OHCI) need one of the PLL clocks
* in order to act as a wakeup source, and those are not available when
* going into slow clock mode.
*
* REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
* the very same problem (but not using at91 main_clk), and it'd be better
* to add one generic API rather than lots of platform-specific ones.
*/
int at91_suspend_entering_slow_clock(void)
{
return (target_state == PM_SUSPEND_MEM);
}
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
static void (*slow_clock)(void);
static int at91_pm_enter(suspend_state_t state)
{
at91_gpio_suspend();
at91_irq_suspend();
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
/* remember all the always-wake irqs */
(at91_sys_read(AT91_PMC_PCSR)
| (1 << AT91_ID_FIQ)
| (1 << AT91_ID_SYS)
| (1 << AT91_ID_IRQ0)
| (1 << AT91_ID_IRQ1)
| (1 << AT91_ID_IRQ2)
| (1 << AT91_ID_IRQ3)
| (1 << AT91_ID_IRQ4)
| (1 << AT91_ID_IRQ5)
| (1 << AT91_ID_IRQ6))
& at91_sys_read(AT91_AIC_IMR),
state);
switch (state) {
/*
* Suspend-to-RAM is like STANDBY plus slow clock mode, so
* drivers must suspend more deeply: only the master clock
* controller may be using the main oscillator.
*/
case PM_SUSPEND_MEM:
/*
* Ensure that clocks are in a valid state.
*/
if (!at91_pm_verify_clocks())
goto error;
/*
* Enter slow clock mode by switching over to clk32k and
* turning off the main oscillator; reverse on wakeup.
*/
if (slow_clock) {
slow_clock();
break;
} else {
/* DEVELOPMENT ONLY */
pr_info("AT91: PM - no slow clock mode yet ...\n");
/* FALLTHROUGH leaving master clock alone */
}
/*
* STANDBY mode has *all* drivers suspended; ignores irqs not
* marked as 'wakeup' event sources; and reduces DRAM power.
* But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
* nothing fancy done with main or cpu clocks.
*/
case PM_SUSPEND_STANDBY:
/*
* NOTE: the Wait-for-Interrupt instruction needs to be
* in icache so the SDRAM stays in self-refresh mode until
* the wakeup IRQ occurs.
*/
asm("b 1f; .align 5; 1:");
asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */
/* fall though to next state */
case PM_SUSPEND_ON:
asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
break;
default:
pr_debug("AT91: PM - bogus suspend state %d\n", state);
goto error;
}
pr_debug("AT91: PM - wakeup %08x\n",
at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
error:
target_state = PM_SUSPEND_ON;
at91_irq_resume();
at91_gpio_resume();
return 0;
}
static struct pm_ops at91_pm_ops ={
.pm_disk_mode = 0,
.valid = at91_pm_valid_state,
.prepare = at91_pm_prepare,
.enter = at91_pm_enter,
};
static int __init at91_pm_init(void)
{
printk("AT91: Power Management\n");
#ifdef CONFIG_AT91_PM_SLOW_CLOCK
/* REVISIT allocations of SRAM should be dynamically managed.
* FIQ handlers and other components will want SRAM/TCM too...
*/
slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
#endif
/* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
at91_sys_write(AT91_SDRAMC_LPR, 0);
pm_set_ops(&at91_pm_ops);
return 0;
}
arch_initcall(at91_pm_init);

57
arch/arm/mach-at91rm9200/time.c
View File

@ -31,6 +31,8 @@
#include <asm/irq.h>
#include <asm/mach/time.h>
static unsigned long last_crtr;
/*
* The ST_CRTR is updated asynchronously to the master clock. It is therefore
* necessary to read it twice (with the same value) to ensure accuracy.
@ -56,7 +58,7 @@ static unsigned long at91rm9200_gettimeoffset(void)
{
unsigned long elapsed;
elapsed = (read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV;
elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV;
return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
}
@ -66,15 +68,12 @@ static unsigned long at91rm9200_gettimeoffset(void)
*/
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned long rtar;
if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
write_seqlock(&xtime_lock);
while (((read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV) >= LATCH) {
while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) {
timer_tick(regs);
rtar = (at91_sys_read(AT91_ST_RTAR) + LATCH) & AT91_ST_ALMV;
at91_sys_write(AT91_ST_RTAR, rtar);
last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV;
}
write_sequnlock(&xtime_lock);
@ -87,10 +86,24 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_r
static struct irqaction at91rm9200_timer_irq = {
.name = "at91_tick",
.flags = SA_SHIRQ | SA_INTERRUPT,
.flags = SA_SHIRQ | SA_INTERRUPT | SA_TIMER,
.handler = at91rm9200_timer_interrupt
};
void at91rm9200_timer_reset(void)
{
last_crtr = 0;
/* Real time counter incremented every 30.51758 microseconds */
at91_sys_write(AT91_ST_RTMR, 1);
/* Set Period Interval timer */
at91_sys_write(AT91_ST_PIMR, LATCH);
/* Enable Period Interval Timer interrupt */
at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
}
/*
* Set up timer interrupt.
*/
@ -100,28 +113,30 @@ void __init at91rm9200_timer_init(void)
at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
(void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */
/*
* Make IRQs happen for the system timer.
*/
/* Make IRQs happen for the system timer */
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
/* Set initial alarm to 0 */
at91_sys_write(AT91_ST_RTAR, 0);
/* Real time counter incremented every 30.51758 microseconds */
at91_sys_write(AT91_ST_RTMR, 1);
/* Set Period Interval timer */
at91_sys_write(AT91_ST_PIMR, LATCH);
/* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
/* Enable Period Interval Timer interrupt */
at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
/* Initialize and enable the timer interrupt */
at91rm9200_timer_reset();
}
#ifdef CONFIG_PM
static void at91rm9200_timer_suspend(void)
{
/* disable Period Interval Timer interrupt */
at91_sys_write(AT91_ST_IDR, AT91_ST_PITS);
}
#else
#define at91rm9200_timer_suspend NULL
#endif
struct sys_timer at91rm9200_timer = {
.init = at91rm9200_timer_init,
.offset = at91rm9200_gettimeoffset,
.suspend = at91rm9200_timer_suspend,
.resume = at91rm9200_timer_reset,
};

24
arch/arm/mach-netx/Kconfig Normal file
View File

@ -0,0 +1,24 @@
menu "NetX Implementations"
depends on ARCH_NETX
config MACH_NXDKN
bool "Enable Hilscher nxdkn Eval Board support"
depends on ARCH_NETX
help
Board support for the Hilscher NetX Eval Board
config MACH_NXDB500
bool "Enable Hilscher nxdb500 Eval Board support"
depends on ARCH_NETX
select ARM_AMBA
help
Board support for the Hilscher nxdb500 Eval Board
config MACH_NXEB500HMI
bool "Enable Hilscher nxeb500hmi Eval Board support"
depends on ARCH_NETX
select ARM_AMBA
help
Board support for the Hilscher nxeb500hmi Eval Board
endmenu

15
arch/arm/mach-netx/Makefile Normal file
View File

@ -0,0 +1,15 @@
#
# Makefile for the linux kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
# Object file lists.
obj-y += time.o generic.o pfifo.o xc.o
# Specific board support
obj-$(CONFIG_MACH_NXDKN) += nxdkn.o
obj-$(CONFIG_MACH_NXDB500) += nxdb500.o fb.o
obj-$(CONFIG_MACH_NXEB500HMI) += nxeb500hmi.o fb.o

2
arch/arm/mach-netx/Makefile.boot Normal file
View File

@ -0,0 +1,2 @@
zreladdr-y := 0x80008000

114
arch/arm/mach-netx/fb.c Normal file
View File

@ -0,0 +1,114 @@
/*
* arch/arm/mach-netx/fb.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/device.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <asm/arch/netx-regs.h>
#include <asm/hardware.h>
struct clk {};
static struct clk fb_clk;
static struct clcd_panel *netx_panel;
void netx_clcd_enable(struct clcd_fb *fb)
{
}
int netx_clcd_setup(struct clcd_fb *fb)
{
dma_addr_t dma;
fb->panel = netx_panel;
fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, 1024*1024,
&dma, GFP_KERNEL);
if (!fb->fb.screen_base) {
printk(KERN_ERR "CLCD: unable to map framebuffer\n");
return -ENOMEM;
}
fb->fb.fix.smem_start = dma;
fb->fb.fix.smem_len = 1024*1024;
return 0;
}
int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
{
return dma_mmap_writecombine(&fb->dev->dev, vma,
fb->fb.screen_base,
fb->fb.fix.smem_start,
fb->fb.fix.smem_len);
}
void netx_clcd_remove(struct clcd_fb *fb)
{
dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
fb->fb.screen_base, fb->fb.fix.smem_start);
}
void clk_disable(struct clk *clk)
{
}
int clk_set_rate(struct clk *clk, unsigned long rate)
{
return 0;
}
int clk_enable(struct clk *clk)
{
return 0;
}
struct clk *clk_get(struct device *dev, const char *id)
{
return &fb_clk;
}
void clk_put(struct clk *clk)
{
}
static struct amba_device fb_device = {
.dev = {
.bus_id = "fb",
.coherent_dma_mask = ~0,
},
.res = {
.start = 0x00104000,
.end = 0x00104fff,
.flags = IORESOURCE_MEM,
},
.irq = { NETX_IRQ_LCD, NO_IRQ },
.periphid = 0x10112400,
};
int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
{
netx_panel = panel;
fb_device.dev.platform_data = board;
return amba_device_register(&fb_device, &iomem_resource);
}

24
arch/arm/mach-netx/fb.h Normal file
View File

@ -0,0 +1,24 @@
/*
* arch/arm/mach-netx/fb.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
void netx_clcd_enable(struct clcd_fb *fb);
int netx_clcd_setup(struct clcd_fb *fb);
int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma);
void netx_clcd_remove(struct clcd_fb *fb);
int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel);

193
arch/arm/mach-netx/generic.c Normal file
View File

@ -0,0 +1,193 @@
/*
* arch/arm/mach-netx/generic.c
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/device.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/mach/map.h>
#include <asm/hardware/vic.h>
#include <asm/io.h>
#include <asm/arch/netx-regs.h>
#include <asm/mach/irq.h>
static struct map_desc netx_io_desc[] __initdata = {
{
.virtual = NETX_IO_VIRT,
.pfn = __phys_to_pfn(NETX_IO_PHYS),
.length = NETX_IO_SIZE,
.type = MT_DEVICE
}
};
void __init netx_map_io(void)
{
iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
}
static struct resource netx_rtc_resources[] = {
[0] = {
.start = 0x00101200,
.end = 0x00101220,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device netx_rtc_device = {
.name = "netx-rtc",
.id = 0,
.num_resources = ARRAY_SIZE(netx_rtc_resources),
.resource = netx_rtc_resources,
};
static struct platform_device *devices[] __initdata = {
&netx_rtc_device,
};
#if 0
#define DEBUG_IRQ(fmt...) printk(fmt)
#else
#define DEBUG_IRQ(fmt...) while (0) {}
#endif
static void
netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
unsigned int stat;
stat = ((readl(NETX_DPMAS_INT_EN) &
readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
desc = irq_desc + NETX_IRQ_HIF_CHAINED(0);
while (stat) {
if (stat & 1) {
DEBUG_IRQ("handling irq %d\n", irq);
desc_handle_irq(irq, desc, regs);
}
irq++;
desc++;
stat >>= 1;
}
}
static int
netx_hif_irq_type(unsigned int _irq, unsigned int type)
{
unsigned int val, irq;
val = readl(NETX_DPMAS_IF_CONF1);
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
if (type & __IRQT_RISEDGE) {
DEBUG_IRQ("rising edges\n");
val |= (1 << 26) << irq;
}
if (type & __IRQT_FALEDGE) {
DEBUG_IRQ("falling edges\n");
val &= ~((1 << 26) << irq);
}
if (type & __IRQT_LOWLVL) {
DEBUG_IRQ("low level\n");
val &= ~((1 << 26) << irq);
}
if (type & __IRQT_HIGHLVL) {
DEBUG_IRQ("high level\n");
val |= (1 << 26) << irq;
}
writel(val, NETX_DPMAS_IF_CONF1);
return 0;
}
static void
netx_hif_ack_irq(unsigned int _irq)
{
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
val = readl(NETX_DPMAS_INT_EN);
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
}
static void
netx_hif_mask_irq(unsigned int _irq)
{
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
val = readl(NETX_DPMAS_INT_EN);
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
}
static void
netx_hif_unmask_irq(unsigned int _irq)
{
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
val = readl(NETX_DPMAS_INT_EN);
val |= (1 << 24) << irq;
writel(val, NETX_DPMAS_INT_EN);
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
}
static struct irqchip netx_hif_chip = {
.ack = netx_hif_ack_irq,
.mask = netx_hif_mask_irq,
.unmask = netx_hif_unmask_irq,
.set_type = netx_hif_irq_type,
};
void __init netx_init_irq(void)
{
int irq;
vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0);
for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
set_irq_chip(irq, &netx_hif_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID);
}
writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
}
static int __init netx_init(void)
{
return platform_add_devices(devices, ARRAY_SIZE(devices));
}
subsys_initcall(netx_init);

24
arch/arm/mach-netx/generic.h Normal file
View File

@ -0,0 +1,24 @@
/*
* arch/arm/mach-netx/generic.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
extern void __init netx_map_io(void);
extern void __init netx_init_irq(void);
struct sys_timer;
extern struct sys_timer netx_timer;

210
arch/arm/mach-netx/nxdb500.c Normal file
View File

@ -0,0 +1,210 @@
/*
* arch/arm/mach-netx/nxdb500.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/mtd/plat-ram.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/arch/netx-regs.h>
#include <asm/arch/eth.h>
#include "generic.h"
#include "fb.h"
static struct clcd_panel qvga = {
.mode = {
.name = "QVGA",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 187617,
.left_margin = 6,
.right_margin = 26,
.upper_margin = 0,
.lower_margin = 6,
.hsync_len = 6,
.vsync_len = 1,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
.width = -1,
.height = -1,
.tim2 = 16,
.cntl = CNTL_LCDTFT | CNTL_BGR,
.bpp = 16,
.grayscale = 0,
};
static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
{
var->green.length = 5;
var->green.msb_right = 0;
return clcdfb_check(fb, var);
}
static int nxdb500_clcd_setup(struct clcd_fb *fb)
{
unsigned int val;
fb->fb.var.green.length = 5;
fb->fb.var.green.msb_right = 0;
/* enable asic control */
val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
writel(3, NETX_SYSTEM_IOC_CR);
val = readl(NETX_PIO_OUTPIO);
writel(val | 1, NETX_PIO_OUTPIO);
val = readl(NETX_PIO_OEPIO);
writel(val | 1, NETX_PIO_OEPIO);
return netx_clcd_setup(fb);
}
static struct clcd_board clcd_data = {
.name = "netX",
.check = nxdb500_check,
.decode = clcdfb_decode,
.enable = netx_clcd_enable,
.setup = nxdb500_clcd_setup,
.mmap = netx_clcd_mmap,
.remove = netx_clcd_remove,
};
static struct netxeth_platform_data eth0_platform_data = {
.xcno = 0,
};
static struct platform_device netx_eth0_device = {
.name = "netx-eth",
.id = 0,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth0_platform_data,
}
};
static struct netxeth_platform_data eth1_platform_data = {
.xcno = 1,
};
static struct platform_device netx_eth1_device = {
.name = "netx-eth",
.id = 1,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth1_platform_data,
}
};
static struct resource netx_uart0_resources[] = {
[0] = {
.start = 0x00100A00,
.end = 0x00100A3F,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = (NETX_IRQ_UART0),
.end = (NETX_IRQ_UART0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netx_uart0_device = {
.name = "netx-uart",
.id = 0,
.num_resources = ARRAY_SIZE(netx_uart0_resources),
.resource = netx_uart0_resources,
};
static struct resource netx_uart1_resources[] = {
[0] = {
.start = 0x00100A40,
.end = 0x00100A7F,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = (NETX_IRQ_UART1),
.end = (NETX_IRQ_UART1),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netx_uart1_device = {
.name = "netx-uart",
.id = 1,
.num_resources = ARRAY_SIZE(netx_uart1_resources),
.resource = netx_uart1_resources,
};
static struct resource netx_uart2_resources[] = {
[0] = {
.start = 0x00100A80,
.end = 0x00100ABF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = (NETX_IRQ_UART2),
.end = (NETX_IRQ_UART2),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netx_uart2_device = {
.name = "netx-uart",
.id = 2,
.num_resources = ARRAY_SIZE(netx_uart2_resources),
.resource = netx_uart2_resources,
};
static struct platform_device *devices[] __initdata = {
&netx_eth0_device,
&netx_eth1_device,
&netx_uart0_device,
&netx_uart1_device,
&netx_uart2_device,
};
static void __init nxdb500_init(void)
{
netx_fb_init(&clcd_data, &qvga);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(NXDB500, "Hilscher nxdb500")
.phys_io = 0x00100000,
.io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
.timer = &netx_timer,
.init_machine = nxdb500_init,
MACHINE_END

103
arch/arm/mach-netx/nxdkn.c Normal file
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/*
* arch/arm/mach-netx/nxdkn.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/mtd/plat-ram.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/arch/netx-regs.h>
#include <asm/arch/eth.h>
#include "generic.h"
static struct netxeth_platform_data eth0_platform_data = {
.xcno = 0,
};
static struct platform_device nxdkn_eth0_device = {
.name = "netx-eth",
.id = 0,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth0_platform_data,
}
};
static struct netxeth_platform_data eth1_platform_data = {
.xcno = 1,
};
static struct platform_device nxdkn_eth1_device = {
.name = "netx-eth",
.id = 1,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth1_platform_data,
}
};
static struct resource netx_uart0_resources[] = {
[0] = {
.start = 0x00100A00,
.end = 0x00100A3F,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = (NETX_IRQ_UART0),
.end = (NETX_IRQ_UART0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netx_uart0_device = {
.name = "netx-uart",
.id = 0,
.num_resources = ARRAY_SIZE(netx_uart0_resources),
.resource = netx_uart0_resources,
};
static struct platform_device *devices[] __initdata = {
&nxdkn_eth0_device,
&nxdkn_eth1_device,
&netx_uart0_device,
};
static void __init nxdkn_init(void)
{
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(NXDKN, "Hilscher nxdkn")
.phys_io = 0x00100000,
.io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
.timer = &netx_timer,
.init_machine = nxdkn_init,
MACHINE_END

187
arch/arm/mach-netx/nxeb500hmi.c Normal file
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@ -0,0 +1,187 @@
/*
* arch/arm/mach-netx/nxeb500hmi.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/mtd/plat-ram.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/arch/netx-regs.h>
#include <asm/arch/eth.h>
#include "generic.h"
#include "fb.h"
static struct clcd_panel qvga = {
.mode = {
.name = "QVGA",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 187617,
.left_margin = 6,
.right_margin = 26,
.upper_margin = 0,
.lower_margin = 6,
.hsync_len = 6,
.vsync_len = 1,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
.width = -1,
.height = -1,
.tim2 = 16,
.cntl = CNTL_LCDTFT | CNTL_BGR,
.bpp = 16,
.grayscale = 0,
};
static inline int nxeb500hmi_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
{
var->green.length = 5;
var->green.msb_right = 0;
return clcdfb_check(fb, var);
}
static int nxeb500hmi_clcd_setup(struct clcd_fb *fb)
{
unsigned int val;
fb->fb.var.green.length = 5;
fb->fb.var.green.msb_right = 0;
/* enable asic control */
val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
writel(3, NETX_SYSTEM_IOC_CR);
/* GPIO 14 is used for display enable on newer boards */
writel(9, NETX_GPIO_CFG(14));
val = readl(NETX_PIO_OUTPIO);
writel(val | 1, NETX_PIO_OUTPIO);
val = readl(NETX_PIO_OEPIO);
writel(val | 1, NETX_PIO_OEPIO);
return netx_clcd_setup(fb);
}
static struct clcd_board clcd_data = {
.name = "netX",
.check = nxeb500hmi_check,
.decode = clcdfb_decode,
.enable = netx_clcd_enable,
.setup = nxeb500hmi_clcd_setup,
.mmap = netx_clcd_mmap,
.remove = netx_clcd_remove,
};
static struct netxeth_platform_data eth0_platform_data = {
.xcno = 0,
};
static struct platform_device netx_eth0_device = {
.name = "netx-eth",
.id = 0,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth0_platform_data,
}
};
static struct netxeth_platform_data eth1_platform_data = {
.xcno = 1,
};
static struct platform_device netx_eth1_device = {
.name = "netx-eth",
.id = 1,
.num_resources = 0,
.resource = NULL,
.dev = {
.platform_data = &eth1_platform_data,
}
};
static struct resource netx_cf_resources[] = {
[0] = {
.start = 0x20000000,
.end = 0x25ffffff,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
},
};
static struct platform_device netx_cf_device = {
.name = "netx-cf",
.id = 0,
.resource = netx_cf_resources,
.num_resources = ARRAY_SIZE(netx_cf_resources),
};
static struct resource netx_uart0_resources[] = {
[0] = {
.start = 0x00100A00,
.end = 0x00100A3F,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = (NETX_IRQ_UART0),
.end = (NETX_IRQ_UART0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device netx_uart0_device = {
.name = "netx-uart",
.id = 0,
.num_resources = ARRAY_SIZE(netx_uart0_resources),
.resource = netx_uart0_resources,
};
static struct platform_device *devices[] __initdata = {
&netx_eth0_device,
&netx_eth1_device,
&netx_cf_device,
&netx_uart0_device,
};
static void __init nxeb500hmi_init(void)
{
netx_fb_init(&clcd_data, &qvga);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
.phys_io = 0x00100000,
.io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
.timer = &netx_timer,
.init_machine = nxeb500hmi_init,
MACHINE_END

68
arch/arm/mach-netx/pfifo.c Normal file
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@ -0,0 +1,68 @@
/*
* arch/arm/mach-netx/pfifo.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/arch/netx-regs.h>
#include <asm/arch/pfifo.h>
static DEFINE_MUTEX(pfifo_lock);
static unsigned int pfifo_used = 0;
int pfifo_request(unsigned int pfifo_mask)
{
int err = 0;
unsigned int val;
mutex_lock(&pfifo_lock);
if (pfifo_mask & pfifo_used) {
err = -EBUSY;
goto out;
}
pfifo_used |= pfifo_mask;
val = readl(NETX_PFIFO_RESET);
writel(val | pfifo_mask, NETX_PFIFO_RESET);
writel(val, NETX_PFIFO_RESET);
out:
mutex_unlock(&pfifo_lock);
return err;
}
void pfifo_free(unsigned int pfifo_mask)
{
mutex_lock(&pfifo_lock);
pfifo_used &= ~pfifo_mask;
mutex_unlock(&pfifo_lock);
}
EXPORT_SYMBOL(pfifo_push);
EXPORT_SYMBOL(pfifo_pop);
EXPORT_SYMBOL(pfifo_fill_level);
EXPORT_SYMBOL(pfifo_empty);
EXPORT_SYMBOL(pfifo_request);
EXPORT_SYMBOL(pfifo_free);

88
arch/arm/mach-netx/time.c Normal file
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@ -0,0 +1,88 @@
/*
* arch/arm/mach-netx/time.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/mach/time.h>
#include <asm/arch/netx-regs.h>
/*
* Returns number of us since last clock interrupt. Note that interrupts
* will have been disabled by do_gettimeoffset()
*/
static unsigned long netx_gettimeoffset(void)
{
return readl(NETX_GPIO_COUNTER_CURRENT(0)) / 100;
}
/*
* IRQ handler for the timer
*/
static irqreturn_t
netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
write_seqlock(&xtime_lock);
timer_tick(regs);
write_sequnlock(&xtime_lock);
/* acknowledge interrupt */
writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
return IRQ_HANDLED;
}
static struct irqaction netx_timer_irq = {
.name = "NetX Timer Tick",
.flags = SA_INTERRUPT | SA_TIMER,
.handler = netx_timer_interrupt,
};
/*
* Set up timer interrupt
*/
static void __init netx_timer_init(void)
{
/* disable timer initially */
writel(0, NETX_GPIO_COUNTER_CTRL(0));
/* Reset the timer value to zero */
writel(0, NETX_GPIO_COUNTER_CURRENT(0));
writel(LATCH, NETX_GPIO_COUNTER_MAX(0));
/* acknowledge interrupt */
writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
/* Enable the interrupt in the specific timer register and start timer */
writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
NETX_GPIO_COUNTER_CTRL(0));
setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
}
struct sys_timer netx_timer = {
.init = netx_timer_init,
.offset = netx_gettimeoffset,
};

255
arch/arm/mach-netx/xc.c Normal file
View File

@ -0,0 +1,255 @@
/*
* arch/arm/mach-netx/xc.c
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/mutex.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/arch/netx-regs.h>
#include <asm/arch/xc.h>
static DEFINE_MUTEX(xc_lock);
static int xc_in_use = 0;
struct fw_desc {
unsigned int ofs;
unsigned int size;
unsigned int patch_ofs;
unsigned int patch_entries;
};
struct fw_header {
unsigned int magic;
unsigned int type;
unsigned int version;
unsigned int reserved[5];
struct fw_desc fw_desc[3];
} __attribute__ ((packed));
int xc_stop(struct xc *x)
{
writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS);
writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS);
writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS);
return 0;
}
int xc_start(struct xc *x)
{
writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS);
writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS);
writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS);
return 0;
}
int xc_running(struct xc *x)
{
return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC)
|| (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC)
|| (readl(x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS) & XPU_HOLD_PC) ?
0 : 1;
}
int xc_reset(struct xc *x)
{
writel(0, x->xpec_base + NETX_XPEC_PC_OFS);
return 0;
}
static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size)
{
if (adr >= NETX_PA_XMAC(x->no) &&
adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE)
return 0;
if (adr >= NETX_PA_XPEC(x->no) &&
adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE)
return 0;
dev_err(x->dev, "Illegal pointer in firmware found. aborting\n");
return -1;
}
static int xc_patch(struct xc *x, void *patch, int count)
{
unsigned int val, adr;
unsigned int *data = patch;
int i;
for (i = 0; i < count; i++) {
adr = *data++;
val = *data++;
if (xc_check_ptr(x, adr, 4) < 0)
return -EINVAL;
writel(val, (void __iomem *)io_p2v(adr));
}
return 0;
}
int xc_request_firmware(struct xc *x)
{
int ret;
char name[16];
const struct firmware *fw;
struct fw_header *head;
unsigned int size;
int i;
void *src;
unsigned long dst;
sprintf(name, "xc%d.bin", x->no);
ret = request_firmware(&fw, name, x->dev);
if (ret < 0) {
dev_err(x->dev, "request_firmware failed\n");
return ret;
}
head = (struct fw_header *)fw->data;
if (head->magic != 0x4e657458) {
if (head->magic == 0x5874654e) {
dev_err(x->dev,
"firmware magic is 'XteN'. Endianess problems?\n");
ret = -ENODEV;
goto exit_release_firmware;
}
dev_err(x->dev, "unrecognized firmware magic 0x%08x\n",
head->magic);
ret = -ENODEV;
goto exit_release_firmware;
}
x->type = head->type;
x->version = head->version;
ret = -EINVAL;
for (i = 0; i < 3; i++) {
src = fw->data + head->fw_desc[i].ofs;
dst = *(unsigned int *)src;
src += sizeof (unsigned int);
size = head->fw_desc[i].size - sizeof (unsigned int);
if (xc_check_ptr(x, dst, size))
goto exit_release_firmware;
memcpy((void *)io_p2v(dst), src, size);
src = fw->data + head->fw_desc[i].patch_ofs;
size = head->fw_desc[i].patch_entries;
ret = xc_patch(x, src, size);
if (ret < 0)
goto exit_release_firmware;
}
ret = 0;
exit_release_firmware:
release_firmware(fw);
return ret;
}
struct xc *request_xc(int xcno, struct device *dev)
{
struct xc *x = NULL;
mutex_lock(&xc_lock);
if (xcno > 3)
goto exit;
if (xc_in_use & (1 << xcno))
goto exit;
x = kmalloc(sizeof (struct xc), GFP_KERNEL);
if (!x)
goto exit;
if (!request_mem_region
(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, dev->kobj.name))
goto exit_free;
if (!request_mem_region
(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, dev->kobj.name))
goto exit_release_1;
if (!request_mem_region
(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, dev->kobj.name))
goto exit_release_2;
x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno));
x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno));
x->sram_base = ioremap(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
if (!x->sram_base)
goto exit_release_3;
x->irq = NETX_IRQ_XPEC(xcno);
x->no = xcno;
x->dev = dev;
xc_in_use |= (1 << xcno);
goto exit;
exit_release_3:
release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
exit_release_2:
release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE);
exit_release_1:
release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE);
exit_free:
kfree(x);
x = NULL;
exit:
mutex_unlock(&xc_lock);
return x;
}
void free_xc(struct xc *x)
{
int xcno = x->no;
mutex_lock(&xc_lock);
iounmap(x->sram_base);
release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE);
release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE);
xc_in_use &= ~(1 << x->no);
kfree(x);
mutex_unlock(&xc_lock);
}
EXPORT_SYMBOL(free_xc);
EXPORT_SYMBOL(request_xc);
EXPORT_SYMBOL(xc_request_firmware);
EXPORT_SYMBOL(xc_reset);
EXPORT_SYMBOL(xc_running);
EXPORT_SYMBOL(xc_start);
EXPORT_SYMBOL(xc_stop);

2
arch/arm/mach-pnx4008/serial.c
View File

@ -16,7 +16,7 @@
#include <asm/io.h>
#include <asm/arch/platform.h>
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#include <linux/serial_core.h>
#include <linux/serial_reg.h>

1
arch/arm/mach-pxa/Kconfig
View File

@ -61,6 +61,7 @@ config MACH_POODLE
bool "Enable Sharp SL-5600 (Poodle) Support"
depends PXA_SHARPSL_25x
select SHARP_LOCOMO
select PXA_SSP
config MACH_CORGI
bool "Enable Sharp SL-C700 (Corgi) Support"

2
arch/arm/mach-pxa/Makefile
View File

@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
obj-$(CONFIG_MACH_POODLE) += poodle.o
obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o
obj-$(CONFIG_MACH_TOSA) += tosa.o
# Support for blinky lights

25
arch/arm/mach-pxa/corgi.c
View File

@ -19,6 +19,7 @@
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h>
#include <linux/pm.h>
#include <asm/setup.h>
#include <asm/memory.h>
@ -26,6 +27,7 @@
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -310,8 +312,31 @@ static struct platform_device *devices[] __initdata = {
&corgiled_device,
};
static void corgi_poweroff(void)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
if (!machine_is_corgi())
/* Green LED off tells the bootloader to halt */
reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
arm_machine_restart('h');
}
static void corgi_restart(char mode)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
if (!machine_is_corgi())
/* Green LED on tells the bootloader to reboot */
set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
arm_machine_restart('h');
}
static void __init corgi_init(void)
{
pm_power_off = corgi_poweroff;
arm_pm_restart = corgi_restart;
/* setup sleep mode values */
PWER = 0x00000002;
PFER = 0x00000000;

23
arch/arm/mach-pxa/corgi_pm.c
View File

@ -27,6 +27,13 @@
#include <asm/arch/pxa-regs.h>
#include "sharpsl.h"
#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */
#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */
#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
static void corgi_charger_init(void)
{
pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT);
@ -195,9 +202,16 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.read_devdata = corgipm_read_devdata,
.charger_wakeup = corgi_charger_wakeup,
.should_wakeup = corgi_should_wakeup,
.bat_levels = 40,
.bat_levels_noac = spitz_battery_levels_noac,
.bat_levels_acin = spitz_battery_levels_acin,
.backlight_limit = corgibl_limit_intensity,
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
.charge_on_temp = SHARPSL_CHARGE_ON_TEMP,
.charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
.charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW,
.fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT,
.fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
.bat_levels = 40,
.bat_levels_noac = spitz_battery_levels_noac,
.bat_levels_acin = spitz_battery_levels_acin,
.status_high_acin = 188,
.status_low_acin = 178,
.status_high_noac = 185,
@ -214,6 +228,9 @@ static int __devinit corgipm_init(void)
if (!corgipm_device)
return -ENOMEM;
if (!machine_is_corgi())
corgi_pm_machinfo.batfull_irq = 1;
corgipm_device->dev.platform_data = &corgi_pm_machinfo;
ret = platform_device_add(corgipm_device);

42
arch/arm/mach-pxa/corgi_ssp.c
View File

@ -50,12 +50,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data)
unsigned long ret,flag;
spin_lock_irqsave(&corgi_ssp_lock, flag);
GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
if (ssp_machinfo->cs_ads7846 >= 0)
GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
ssp_write_word(&corgi_ssp_dev,data);
ret = ssp_read_word(&corgi_ssp_dev);
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
if (ssp_machinfo->cs_ads7846 >= 0)
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
spin_unlock_irqrestore(&corgi_ssp_lock, flag);
return ret;
@ -68,12 +70,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data)
void corgi_ssp_ads7846_lock(void)
{
spin_lock(&corgi_ssp_lock);
GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
if (ssp_machinfo->cs_ads7846 >= 0)
GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
}
void corgi_ssp_ads7846_unlock(void)
{
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
if (ssp_machinfo->cs_ads7846 >= 0)
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
spin_unlock(&corgi_ssp_lock);
}
@ -110,11 +114,13 @@ unsigned long corgi_ssp_dac_put(ulong data)
ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
ssp_enable(&corgi_ssp_dev);
GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
if (ssp_machinfo->cs_lcdcon >= 0)
GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
ssp_write_word(&corgi_ssp_dev,data);
/* Read null data back from device to prevent SSP overflow */
ssp_read_word(&corgi_ssp_dev);
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
if (ssp_machinfo->cs_lcdcon >= 0)
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
ssp_disable(&corgi_ssp_dev);
ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
@ -147,7 +153,8 @@ int corgi_ssp_max1111_get(ulong data)
int voltage,voltage1,voltage2;
spin_lock_irqsave(&corgi_ssp_lock, flag);
GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
if (ssp_machinfo->cs_max1111 >= 0)
GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
ssp_disable(&corgi_ssp_dev);
ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
ssp_enable(&corgi_ssp_dev);
@ -169,7 +176,8 @@ int corgi_ssp_max1111_get(ulong data)
ssp_disable(&corgi_ssp_dev);
ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
ssp_enable(&corgi_ssp_dev);
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
if (ssp_machinfo->cs_max1111 >= 0)
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
spin_unlock_irqrestore(&corgi_ssp_lock, flag);
if (voltage1 & 0xc0 || voltage2 & 0x3f)
@ -196,9 +204,12 @@ static int __init corgi_ssp_probe(struct platform_device *dev)
int ret;
/* Chip Select - Disable All */
pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
if (ssp_machinfo->cs_lcdcon >= 0)
pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
if (ssp_machinfo->cs_max1111 >= 0)
pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
if (ssp_machinfo->cs_ads7846 >= 0)
pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
@ -229,9 +240,12 @@ static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
static int corgi_ssp_resume(struct platform_device *dev)
{
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
if (ssp_machinfo->cs_lcdcon >= 0)
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
if (ssp_machinfo->cs_max1111 >= 0)
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
if (ssp_machinfo->cs_ads7846 >= 0)
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
ssp_enable(&corgi_ssp_dev);

108
arch/arm/mach-pxa/poodle.c
View File

@ -18,11 +18,14 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/pm.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -34,12 +37,15 @@
#include <asm/arch/irda.h>
#include <asm/arch/poodle.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/sharpsl.h>
#include <asm/arch/ssp.h>
#include <asm/hardware/scoop.h>
#include <asm/hardware/locomo.h>
#include <asm/mach/sharpsl_param.h>
#include "generic.h"
#include "sharpsl.h"
static struct resource poodle_scoop_resources[] = {
[0] = {
@ -117,13 +123,71 @@ static struct resource locomo_resources[] = {
},
};
static struct platform_device locomo_device = {
struct platform_device poodle_locomo_device = {
.name = "locomo",
.id = 0,
.num_resources = ARRAY_SIZE(locomo_resources),
.resource = locomo_resources,
};
EXPORT_SYMBOL(poodle_locomo_device);
/*
* Poodle SSP Device
*/
struct platform_device poodle_ssp_device = {
.name = "corgi-ssp",
.id = -1,
};
struct corgissp_machinfo poodle_ssp_machinfo = {
.port = 1,
.cs_lcdcon = -1,
.cs_ads7846 = -1,
.cs_max1111 = -1,
.clk_lcdcon = 2,
.clk_ads7846 = 36,
.clk_max1111 = 2,
};
/*
* Poodle Touch Screen Device
*/
static struct resource poodlets_resources[] = {
[0] = {
.start = POODLE_IRQ_GPIO_TP_INT,
.end = POODLE_IRQ_GPIO_TP_INT,
.flags = IORESOURCE_IRQ,
},
};
static unsigned long poodle_get_hsync_len(void)
{
return 0;
}
static void poodle_null_hsync(void)
{
}
static struct corgits_machinfo poodle_ts_machinfo = {
.get_hsync_len = poodle_get_hsync_len,
.put_hsync = poodle_null_hsync,
.wait_hsync = poodle_null_hsync,
};
static struct platform_device poodle_ts_device = {
.name = "corgi-ts",
.dev = {
.platform_data = &poodle_ts_machinfo,
},
.id = -1,
.num_resources = ARRAY_SIZE(poodlets_resources),
.resource = poodlets_resources,
};
/*
* MMC/SD Device
@ -141,7 +205,9 @@ static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)(
pxa_gpio_mode(GPIO6_MMCCLK_MD);
pxa_gpio_mode(GPIO8_MMCCS0_MD);
pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN);
pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN);
pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT);
pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT);
poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
@ -160,12 +226,22 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if (( 1 << vdd) & p_d->ocr_mask)
GPSR1 = GPIO_bit(POODLE_GPIO_SD_PWR);
else
GPCR1 = GPIO_bit(POODLE_GPIO_SD_PWR);
if (( 1 << vdd) & p_d->ocr_mask) {
GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
mdelay(2);
GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
} else {
GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
}
}
static int poodle_mci_get_ro(struct device *dev)
{
return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
}
static void poodle_mci_exit(struct device *dev, void *data)
{
free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
@ -174,6 +250,7 @@ static void poodle_mci_exit(struct device *dev, void *data)
static struct pxamci_platform_data poodle_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = poodle_mci_init,
.get_ro = poodle_mci_get_ro,
.setpower = poodle_mci_setpower,
.exit = poodle_mci_exit,
};
@ -243,14 +320,31 @@ static struct pxafb_mach_info poodle_fb_info __initdata = {
};
static struct platform_device *devices[] __initdata = {
&locomo_device,
&poodle_locomo_device,
&poodle_scoop_device,
&poodle_ssp_device,
&poodle_ts_device,
};
static void poodle_poweroff(void)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
arm_machine_restart('h');
}
static void poodle_restart(char mode)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
arm_machine_restart('h');
}
static void __init poodle_init(void)
{
int ret = 0;
pm_power_off = poodle_poweroff;
arm_pm_restart = poodle_restart;
/* setup sleep mode values */
PWER = 0x00000002;
PFER = 0x00000000;
@ -288,6 +382,7 @@ static void __init poodle_init(void)
GPSR1 = 0x00000000;
GPSR2 = 0x00000000;
set_pxa_fb_parent(&poodle_locomo_device.dev);
set_pxa_fb_info(&poodle_fb_info);
pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
@ -301,6 +396,7 @@ static void __init poodle_init(void)
if (ret) {
printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n");
}
corgi_ssp_set_machinfo(&poodle_ssp_machinfo);
}
static void __init fixup_poodle(struct machine_desc *desc,

7
arch/arm/mach-pxa/sharpsl_pm.c
View File

@ -128,6 +128,9 @@ struct battery_thresh spitz_battery_levels_noac[] = {
*/
int sharpsl_pm_pxa_read_max1111(int channel)
{
if (machine_is_tosa()) // Ugly, better move this function into another module
return 0;
return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
| MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
}
@ -156,7 +159,7 @@ void sharpsl_pm_pxa_init(void)
else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING);
}
if (!machine_is_corgi())
if (sharpsl_pm.machinfo->batfull_irq)
{
/* Register interrupt handler. */
if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) {
@ -174,6 +177,6 @@ void sharpsl_pm_pxa_remove(void)
if (sharpsl_pm.machinfo->gpio_fatal)
free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
if (!machine_is_corgi())
if (sharpsl_pm.machinfo->batfull_irq)
free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
}

25
arch/arm/mach-pxa/spitz.c
View File

@ -20,6 +20,7 @@
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h>
#include <linux/pm.h>
#include <asm/setup.h>
#include <asm/memory.h>
@ -27,6 +28,7 @@
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -432,8 +434,31 @@ static struct platform_device *devices[] __initdata = {
&spitzled_device,
};
static void spitz_poweroff(void)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
mdelay(1000);
arm_machine_restart('h');
}
static void spitz_restart(char mode)
{
/* Bootloader magic for a reboot */
if((MSC0 & 0xffff0000) == 0x7ff00000)
MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
spitz_poweroff();
}
static void __init common_init(void)
{
pm_power_off = spitz_poweroff;
arm_pm_restart = spitz_restart;
PMCR = 0x00;
/* setup sleep mode values */

15
arch/arm/mach-pxa/spitz_pm.c
View File

@ -27,6 +27,13 @@
#include <asm/arch/pxa-regs.h>
#include "sharpsl.h"
#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */
#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */
#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
static int spitz_last_ac_status;
static void spitz_charger_init(void)
@ -190,6 +197,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
.gpio_batlock = SPITZ_GPIO_BAT_COVER,
.gpio_acin = SPITZ_GPIO_AC_IN,
.gpio_batfull = SPITZ_GPIO_CHRG_FULL,
.batfull_irq = 1,
.gpio_fatal = SPITZ_GPIO_FATAL_BAT,
.discharge = spitz_discharge,
.discharge1 = spitz_discharge1,
@ -200,6 +208,13 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
.read_devdata = spitzpm_read_devdata,
.charger_wakeup = spitz_charger_wakeup,
.should_wakeup = spitz_should_wakeup,
.backlight_limit = corgibl_limit_intensity,
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
.charge_on_temp = SHARPSL_CHARGE_ON_TEMP,
.charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
.charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW,
.fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT,
.fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
.bat_levels = 40,
.bat_levels_noac = spitz_battery_levels_noac,
.bat_levels_acin = spitz_battery_levels_acin,

26
arch/arm/mach-pxa/tosa.c
View File

@ -19,12 +19,15 @@
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h>
#include <linux/pm.h>
#include <linux/delay.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/arch/irda.h>
#include <asm/arch/mmc.h>
#include <asm/arch/udc.h>
@ -266,8 +269,31 @@ static struct platform_device *devices[] __initdata = {
&tosaled_device,
};
static void tosa_poweroff(void)
{
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
mdelay(1000);
arm_machine_restart('h');
}
static void tosa_restart(char mode)
{
/* Bootloader magic for a reboot */
if((MSC0 & 0xffff0000) == 0x7ff00000)
MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
tosa_poweroff();
}
static void __init tosa_init(void)
{
pm_power_off = tosa_poweroff;
arm_pm_restart = tosa_restart;
pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN);
pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN);
pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN);

50
arch/arm/mach-s3c2410/mach-anubis.c
View File

@ -239,6 +239,54 @@ static struct s3c2410_platform_nand anubis_nand_info = {
.select_chip = anubis_nand_select,
};
/* IDE channels */
static struct resource anubis_ide0_resource[] = {
{
.start = S3C2410_CS3,
.end = S3C2410_CS3 + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = S3C2410_CS3 + (1<<26),
.end = S3C2410_CS3 + (1<<26) + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_IDE0,
.end = IRQ_IDE0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device anubis_device_ide0 = {
.name = "simtec-ide",
.id = 0,
.num_resources = ARRAY_SIZE(anubis_ide0_resource),
.resource = anubis_ide0_resource,
};
static struct resource anubis_ide1_resource[] = {
{
.start = S3C2410_CS4,
.end = S3C2410_CS4 + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = S3C2410_CS4 + (1<<26),
.end = S3C2410_CS4 + (1<<26) + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_IDE0,
.end = IRQ_IDE0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device anubis_device_ide1 = {
.name = "simtec-ide",
.id = 1,
.num_resources = ARRAY_SIZE(anubis_ide1_resource),
.resource = anubis_ide1_resource,
};
/* Standard Anubis devices */
@ -249,6 +297,8 @@ static struct platform_device *anubis_devices[] __initdata = {
&s3c_device_i2c,
&s3c_device_rtc,
&s3c_device_nand,
&anubis_device_ide0,
&anubis_device_ide1,
};
static struct clk *anubis_clocks[] = {

4
arch/arm/mm/Kconfig
View File

@ -121,8 +121,8 @@ config CPU_ARM925T
# ARM926T
config CPU_ARM926T
bool "Support ARM926T processor"
depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008
default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008
depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX
default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX
select CPU_32v5
select CPU_ABRT_EV5TJ
select CPU_CACHE_VIVT

2
drivers/leds/leds-locomo.c
View File

@ -45,11 +45,13 @@ static void locomoled_brightness_set1(struct led_classdev *led_cdev,
static struct led_classdev locomo_led0 = {
.name = "locomo:amber",
.default_trigger = "sharpsl-charge",
.brightness_set = locomoled_brightness_set0,
};
static struct led_classdev locomo_led1 = {
.name = "locomo:green",
.default_trigger = "nand-disk",
.brightness_set = locomoled_brightness_set1,
};

4
drivers/pcmcia/sa1100_badge4.c
View File

@ -128,8 +128,8 @@ badge4_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state
static struct pcmcia_low_level badge4_pcmcia_ops = {
.owner = THIS_MODULE,
.init = sa1111_pcmcia_hw_init,
.shutdown = sa1111_pcmcia_hw_shutdown,
.hw_init = sa1111_pcmcia_hw_init,
.hw_shutdown = sa1111_pcmcia_hw_shutdown,
.socket_state = sa1111_pcmcia_socket_state,
.configure_socket = badge4_pcmcia_configure_socket,

17
drivers/serial/Kconfig
View File

@ -300,21 +300,22 @@ config SERIAL_AMBA_PL011_CONSOLE
kernel at boot time.)
config SERIAL_AT91
bool "AT91RM9200 serial port support"
depends on ARM && ARCH_AT91RM9200
bool "AT91RM9200 / AT91SAM9261 serial port support"
depends on ARM && (ARCH_AT91RM9200 || ARCH_AT91SAM9261)
select SERIAL_CORE
help
This enables the driver for the on-chip UARTs of the AT91RM9200
processor.
This enables the driver for the on-chip UARTs of the Atmel
AT91RM9200 and AT91SAM926 processor.
config SERIAL_AT91_CONSOLE
bool "Support for console on AT91RM9200 serial port"
bool "Support for console on AT91RM9200 / AT91SAM9261 serial port"
depends on SERIAL_AT91=y
select SERIAL_CORE_CONSOLE
help
Say Y here if you wish to use a UART on the AT91RM9200 as the system
console (the system console is the device which receives all kernel
messages and warnings and which allows logins in single user mode).
Say Y here if you wish to use a UART on the Atmel AT91RM9200 or
AT91SAM9261 as the system console (the system console is the device
which receives all kernel messages and warnings and which allows
logins in single user mode).
config SERIAL_AT91_TTYAT
bool "Install as device ttyAT0-4 instead of ttyS0-4"

461
drivers/serial/at91_serial.c
View File

@ -2,7 +2,6 @@
* linux/drivers/char/at91_serial.c
*
* Driver for Atmel AT91RM9200 Serial ports
*
* Copyright (C) 2003 Rick Bronson
*
* Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
@ -30,17 +29,19 @@
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/clk.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/tty_flip.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/arch/at91rm9200_usart.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/arch/at91rm9200_pdc.h>
#include <asm/mach/serial_at91.h>
#include <asm/arch/board.h>
#include <asm/arch/pio.h>
#include <asm/arch/system.h>
#if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
@ -67,7 +68,6 @@
#endif
#define AT91_VA_BASE_DBGU ((unsigned long) AT91_VA_BASE_SYS + AT91_DBGU)
#define AT91_ISR_PASS_LIMIT 256
#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
@ -87,16 +87,33 @@
/* PDC registers */
#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR)
#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR)
#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
#define UART_GET_RCR(port) readl((port)->membase + AT91_PDC_RCR)
#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR)
#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR)
//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR)
//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR)
static int (*at91_open)(struct uart_port *);
static void (*at91_close)(struct uart_port *);
/*
* We wrap our port structure around the generic uart_port.
*/
struct at91_uart_port {
struct uart_port uart; /* uart */
struct clk *clk; /* uart clock */
unsigned short suspended; /* is port suspended? */
};
static struct at91_uart_port at91_ports[AT91_NR_UART];
#ifdef SUPPORT_SYSRQ
static struct console at91_console;
#endif
@ -115,16 +132,19 @@ static u_int at91_tx_empty(struct uart_port *port)
static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
{
unsigned int control = 0;
unsigned int mode;
/*
* Errata #39: RTS0 is not internally connected to PA21. We need to drive
* the pin manually.
*/
if (port->mapbase == AT91_VA_BASE_US0) {
if (mctrl & TIOCM_RTS)
at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0);
else
at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
if (arch_identify() == ARCH_ID_AT91RM9200) {
/*
* AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
* We need to drive the pin manually.
*/
if (port->mapbase == AT91_BASE_US0) {
if (mctrl & TIOCM_RTS)
at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0);
else
at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
}
}
if (mctrl & TIOCM_RTS)
@ -137,7 +157,15 @@ static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
else
control |= AT91_US_DTRDIS;
UART_PUT_CR(port,control);
UART_PUT_CR(port, control);
/* Local loopback mode? */
mode = UART_GET_MR(port) & ~AT91_US_CHMODE;
if (mctrl & TIOCM_LOOP)
mode |= AT91_US_CHMODE_LOC_LOOP;
else
mode |= AT91_US_CHMODE_NORMAL;
UART_PUT_MR(port, mode);
}
/*
@ -169,8 +197,9 @@ static u_int at91_get_mctrl(struct uart_port *port)
*/
static void at91_stop_tx(struct uart_port *port)
{
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
UART_PUT_IDR(port, AT91_US_TXRDY);
port->read_status_mask &= ~AT91_US_TXRDY;
}
/*
@ -178,7 +207,8 @@ static void at91_stop_tx(struct uart_port *port)
*/
static void at91_start_tx(struct uart_port *port)
{
port->read_status_mask |= AT91_US_TXRDY;
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
UART_PUT_IER(port, AT91_US_TXRDY);
}
@ -187,6 +217,8 @@ static void at91_start_tx(struct uart_port *port)
*/
static void at91_stop_rx(struct uart_port *port)
{
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
UART_PUT_IDR(port, AT91_US_RXRDY);
}
@ -195,7 +227,6 @@ static void at91_stop_rx(struct uart_port *port)
*/
static void at91_enable_ms(struct uart_port *port)
{
port->read_status_mask |= (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
}
@ -218,8 +249,8 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
struct tty_struct *tty = port->info->tty;
unsigned int status, ch, flg;
status = UART_GET_CSR(port) & port->read_status_mask;
while (status & (AT91_US_RXRDY)) {
status = UART_GET_CSR(port);
while (status & AT91_US_RXRDY) {
ch = UART_GET_CHAR(port);
port->icount.rx++;
@ -230,40 +261,38 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
* note that the error handling code is
* out of the main execution path
*/
if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE))) {
if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) {
UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
if (status & (AT91_US_PARE))
if (status & AT91_US_RXBRK) {
status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */
port->icount.brk++;
if (uart_handle_break(port))
goto ignore_char;
}
if (status & AT91_US_PARE)
port->icount.parity++;
if (status & (AT91_US_FRAME))
if (status & AT91_US_FRAME)
port->icount.frame++;
if (status & (AT91_US_OVRE))
if (status & AT91_US_OVRE)
port->icount.overrun++;
if (status & AT91_US_PARE)
status &= port->read_status_mask;
if (status & AT91_US_RXBRK)
flg = TTY_BREAK;
else if (status & AT91_US_PARE)
flg = TTY_PARITY;
else if (status & AT91_US_FRAME)
flg = TTY_FRAME;
if (status & AT91_US_OVRE) {
/*
* overrun does *not* affect the character
* we read from the FIFO
*/
tty_insert_flip_char(tty, ch, flg);
ch = 0;
flg = TTY_OVERRUN;
}
#ifdef SUPPORT_SYSRQ
port->sysrq = 0;
#endif
}
if (uart_handle_sysrq_char(port, ch, regs))
goto ignore_char;
tty_insert_flip_char(tty, ch, flg);
uart_insert_char(port, status, AT91_US_OVRE, ch, flg);
ignore_char:
status = UART_GET_CSR(port) & port->read_status_mask;
status = UART_GET_CSR(port);
}
tty_flip_buffer_push(tty);
@ -308,40 +337,35 @@ static void at91_tx_chars(struct uart_port *port)
static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct uart_port *port = dev_id;
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
unsigned int status, pending, pass_counter = 0;
status = UART_GET_CSR(port);
pending = status & port->read_status_mask;
if (pending) {
do {
if (pending & AT91_US_RXRDY)
at91_rx_chars(port, regs);
pending = status & UART_GET_IMR(port);
while (pending) {
/* Interrupt receive */
if (pending & AT91_US_RXRDY)
at91_rx_chars(port, regs);
/* Clear the relevent break bits */
if (pending & AT91_US_RXBRK) {
UART_PUT_CR(port, AT91_US_RSTSTA);
port->icount.brk++;
uart_handle_break(port);
}
// TODO: All reads to CSR will clear these interrupts!
if (pending & AT91_US_RIIC) port->icount.rng++;
if (pending & AT91_US_DSRIC) port->icount.dsr++;
if (pending & AT91_US_DCDIC)
uart_handle_dcd_change(port, !(status & AT91_US_DCD));
if (pending & AT91_US_CTSIC)
uart_handle_cts_change(port, !(status & AT91_US_CTS));
if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
wake_up_interruptible(&port->info->delta_msr_wait);
// TODO: All reads to CSR will clear these interrupts!
if (pending & AT91_US_RIIC) port->icount.rng++;
if (pending & AT91_US_DSRIC) port->icount.dsr++;
if (pending & AT91_US_DCDIC)
uart_handle_dcd_change(port, !(status & AT91_US_DCD));
if (pending & AT91_US_CTSIC)
uart_handle_cts_change(port, !(status & AT91_US_CTS));
if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
wake_up_interruptible(&port->info->delta_msr_wait);
/* Interrupt transmit */
if (pending & AT91_US_TXRDY)
at91_tx_chars(port);
if (pending & AT91_US_TXRDY)
at91_tx_chars(port);
if (pass_counter++ > AT91_ISR_PASS_LIMIT)
break;
if (pass_counter++ > AT91_ISR_PASS_LIMIT)
break;
status = UART_GET_CSR(port);
pending = status & port->read_status_mask;
} while (pending);
status = UART_GET_CSR(port);
pending = status & UART_GET_IMR(port);
}
return IRQ_HANDLED;
}
@ -351,6 +375,7 @@ static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
*/
static int at91_startup(struct uart_port *port)
{
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
int retval;
/*
@ -381,14 +406,14 @@ static int at91_startup(struct uart_port *port)
}
}
port->read_status_mask = AT91_US_RXRDY | AT91_US_TXRDY | AT91_US_OVRE
| AT91_US_FRAME | AT91_US_PARE | AT91_US_RXBRK;
/*
* Finally, enable the serial port
*/
UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
UART_PUT_IER(port, AT91_US_RXRDY); /* do receive only */
UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */
return 0;
}
@ -397,6 +422,8 @@ static int at91_startup(struct uart_port *port)
*/
static void at91_shutdown(struct uart_port *port)
{
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
/*
* Disable all interrupts, port and break condition.
*/
@ -421,21 +448,22 @@ static void at91_shutdown(struct uart_port *port)
*/
static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
{
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
switch (state) {
case 0:
/*
* Enable the peripheral clock for this serial port.
* This is called on uart_open() or a resume event.
*/
at91_sys_write(AT91_PMC_PCER, 1 << port->irq);
clk_enable(at91_port->clk);
break;
case 3:
/*
* Disable the peripheral clock for this serial port.
* This is called on uart_close() or a suspend event.
*/
if (port->irq != AT91_ID_SYS) /* is this a shared clock? */
at91_sys_write(AT91_PMC_PCDR, 1 << port->irq);
clk_disable(at91_port->clk);
break;
default:
printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
@ -494,9 +522,9 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s
spin_lock_irqsave(&port->lock, flags);
port->read_status_mask |= AT91_US_OVRE;
port->read_status_mask = AT91_US_OVRE;
if (termios->c_iflag & INPCK)
port->read_status_mask |= AT91_US_FRAME | AT91_US_PARE;
port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
if (termios->c_iflag & (BRKINT | PARMRK))
port->read_status_mask |= AT91_US_RXBRK;
@ -552,7 +580,7 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s
*/
static const char *at91_type(struct uart_port *port)
{
return (port->type == PORT_AT91RM9200) ? "AT91_SERIAL" : NULL;
return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL;
}
/*
@ -560,8 +588,15 @@ static const char *at91_type(struct uart_port *port)
*/
static void at91_release_port(struct uart_port *port)
{
release_mem_region(port->mapbase,
(port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K);
struct platform_device *pdev = to_platform_device(port->dev);
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
release_mem_region(port->mapbase, size);
if (port->flags & UPF_IOREMAP) {
iounmap(port->membase);
port->membase = NULL;
}
}
/*
@ -569,10 +604,21 @@ static void at91_release_port(struct uart_port *port)
*/
static int at91_request_port(struct uart_port *port)
{
return request_mem_region(port->mapbase,
(port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K,
"at91_serial") != NULL ? 0 : -EBUSY;
struct platform_device *pdev = to_platform_device(port->dev);
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
if (!request_mem_region(port->mapbase, size, "at91_serial"))
return -EBUSY;
if (port->flags & UPF_IOREMAP) {
port->membase = ioremap(port->mapbase, size);
if (port->membase == NULL) {
release_mem_region(port->mapbase, size);
return -ENOMEM;
}
}
return 0;
}
/*
@ -581,7 +627,7 @@ static int at91_request_port(struct uart_port *port)
static void at91_config_port(struct uart_port *port, int flags)
{
if (flags & UART_CONFIG_TYPE) {
port->type = PORT_AT91RM9200;
port->type = PORT_AT91;
at91_request_port(port);
}
}
@ -592,7 +638,7 @@ static void at91_config_port(struct uart_port *port, int flags)
static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
{
int ret = 0;
if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91RM9200)
if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91)
ret = -EINVAL;
if (port->irq != ser->irq)
ret = -EINVAL;
@ -624,33 +670,47 @@ static struct uart_ops at91_pops = {
.type = at91_type,
.release_port = at91_release_port,
.request_port = at91_request_port,
.config_port = at91_config_port,
.verify_port = at91_verify_port,
.config_port = at91_config_port,
.verify_port = at91_verify_port,
.pm = at91_serial_pm,
};
static struct uart_port at91_ports[AT91_NR_UART];
void __init at91_init_ports(void)
/*
* Configure the port from the platform device resource info.
*/
static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev)
{
static int first = 1;
int i;
struct uart_port *port = &at91_port->uart;
struct at91_uart_data *data = pdev->dev.platform_data;
if (!first)
return;
first = 0;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
port->ops = &at91_pops;
port->fifosize = 1;
port->line = pdev->id;
port->dev = &pdev->dev;
for (i = 0; i < AT91_NR_UART; i++) {
at91_ports[i].iotype = UPIO_MEM;
at91_ports[i].flags = UPF_BOOT_AUTOCONF;
at91_ports[i].uartclk = at91_master_clock;
at91_ports[i].ops = &at91_pops;
at91_ports[i].fifosize = 1;
at91_ports[i].line = i;
}
port->mapbase = pdev->resource[0].start;
port->irq = pdev->resource[1].start;
if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */
port->membase = (void __iomem *) port->mapbase;
else {
port->flags |= UPF_IOREMAP;
port->membase = NULL;
}
if (!at91_port->clk) { /* for console, the clock could already be configured */
at91_port->clk = clk_get(&pdev->dev, "usart");
clk_enable(at91_port->clk);
port->uartclk = clk_get_rate(at91_port->clk);
}
}
void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns)
/*
* Register board-specific modem-control line handlers.
*/
void __init at91_register_uart_fns(struct at91_port_fns *fns)
{
if (fns->enable_ms)
at91_pops.enable_ms = fns->enable_ms;
@ -664,51 +724,6 @@ void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns)
at91_pops.set_wake = fns->set_wake;
}
/*
* Setup ports.
*/
void __init at91_register_uart(int idx, int port)
{
if ((idx < 0) || (idx >= AT91_NR_UART)) {
printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
return;
}
switch (port) {
case 0:
at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US0;
at91_ports[idx].mapbase = AT91_VA_BASE_US0;
at91_ports[idx].irq = AT91_ID_US0;
AT91_CfgPIO_USART0();
break;
case 1:
at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US1;
at91_ports[idx].mapbase = AT91_VA_BASE_US1;
at91_ports[idx].irq = AT91_ID_US1;
AT91_CfgPIO_USART1();
break;
case 2:
at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US2;
at91_ports[idx].mapbase = AT91_VA_BASE_US2;
at91_ports[idx].irq = AT91_ID_US2;
AT91_CfgPIO_USART2();
break;
case 3:
at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US3;
at91_ports[idx].mapbase = AT91_VA_BASE_US3;
at91_ports[idx].irq = AT91_ID_US3;
AT91_CfgPIO_USART3();
break;
case 4:
at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_DBGU;
at91_ports[idx].mapbase = AT91_VA_BASE_DBGU;
at91_ports[idx].irq = AT91_ID_SYS;
AT91_CfgPIO_DBGU();
break;
default:
printk(KERN_ERR "%s : bad port number %d\n", __FUNCTION__, port);
}
}
#ifdef CONFIG_SERIAL_AT91_CONSOLE
static void at91_console_putchar(struct uart_port *port, int ch)
@ -723,7 +738,7 @@ static void at91_console_putchar(struct uart_port *port, int ch)
*/
static void at91_console_write(struct console *co, const char *s, u_int count)
{
struct uart_port *port = at91_ports + co->index;
struct uart_port *port = &at91_ports[co->index].uart;
unsigned int status, imr;
/*
@ -778,23 +793,15 @@ static void __init at91_console_get_options(struct uart_port *port, int *baud, i
static int __init at91_console_setup(struct console *co, char *options)
{
struct uart_port *port;
struct uart_port *port = &at91_ports[co->index].uart;
int baud = 115200;
int bits = 8;
int parity = 'n';
int flow = 'n';
/*
* Check whether an invalid uart number has been specified, and
* if so, search for the first available port that does have
* console support.
*/
port = uart_get_console(at91_ports, AT91_NR_UART, co);
if (port->membase == 0) /* Port not initialized yet - delay setup */
return -ENODEV;
/*
* Enable the serial console, in-case bootloader did not do it.
*/
at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */
UART_PUT_IDR(port, -1); /* disable interrupts */
UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
@ -821,23 +828,40 @@ static struct console at91_console = {
#define AT91_CONSOLE_DEVICE &at91_console
static int __init at91_console_init(void)
/*
* Early console initialization (before VM subsystem initialized).
*/
static int __init at91_console_init(void)
{
at91_init_ports();
if (at91_default_console_device) {
add_preferred_console(AT91_DEVICENAME, at91_default_console_device->id, NULL);
at91_init_port(&(at91_ports[at91_default_console_device->id]), at91_default_console_device);
register_console(&at91_console);
}
at91_console.index = at91_console_port;
register_console(&at91_console);
return 0;
}
console_initcall(at91_console_init);
/*
* Late console initialization.
*/
static int __init at91_late_console_init(void)
{
if (at91_default_console_device && !(at91_console.flags & CON_ENABLED))
register_console(&at91_console);
return 0;
}
core_initcall(at91_late_console_init);
#else
#define AT91_CONSOLE_DEVICE NULL
#endif
static struct uart_driver at91_uart = {
.owner = THIS_MODULE,
.driver_name = AT91_DEVICENAME,
.driver_name = "at91_serial",
.dev_name = AT91_DEVICENAME,
.devfs_name = AT91_DEVICENAME,
.major = SERIAL_AT91_MAJOR,
@ -846,33 +870,106 @@ static struct uart_driver at91_uart = {
.cons = AT91_CONSOLE_DEVICE,
};
static int __init at91_serial_init(void)
#ifdef CONFIG_PM
static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state)
{
int ret, i;
struct uart_port *port = platform_get_drvdata(pdev);
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
at91_init_ports();
ret = uart_register_driver(&at91_uart);
if (ret)
return ret;
for (i = 0; i < AT91_NR_UART; i++) {
if (at91_serial_map[i] >= 0)
uart_add_one_port(&at91_uart, &at91_ports[i]);
if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
enable_irq_wake(port->irq);
else {
disable_irq_wake(port->irq);
uart_suspend_port(&at91_uart, port);
at91_port->suspended = 1;
}
return 0;
}
static int at91_serial_resume(struct platform_device *pdev)
{
struct uart_port *port = platform_get_drvdata(pdev);
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
if (at91_port->suspended) {
uart_resume_port(&at91_uart, port);
at91_port->suspended = 0;
}
return 0;
}
#else
#define at91_serial_suspend NULL
#define at91_serial_resume NULL
#endif
static int __devinit at91_serial_probe(struct platform_device *pdev)
{
struct at91_uart_port *port;
int ret;
port = &at91_ports[pdev->id];
at91_init_port(port, pdev);
ret = uart_add_one_port(&at91_uart, &port->uart);
if (!ret) {
device_init_wakeup(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
}
return ret;
}
static int __devexit at91_serial_remove(struct platform_device *pdev)
{
struct uart_port *port = platform_get_drvdata(pdev);
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
int ret = 0;
clk_disable(at91_port->clk);
clk_put(at91_port->clk);
device_init_wakeup(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
if (port) {
ret = uart_remove_one_port(&at91_uart, port);
kfree(port);
}
return ret;
}
static struct platform_driver at91_serial_driver = {
.probe = at91_serial_probe,
.remove = __devexit_p(at91_serial_remove),
.suspend = at91_serial_suspend,
.resume = at91_serial_resume,
.driver = {
.name = "at91_usart",
.owner = THIS_MODULE,
},
};
static int __init at91_serial_init(void)
{
int ret;
ret = uart_register_driver(&at91_uart);
if (ret)
return ret;
ret = platform_driver_register(&at91_serial_driver);
if (ret)
uart_unregister_driver(&at91_uart);
return ret;
}
static void __exit at91_serial_exit(void)
{
int i;
for (i = 0; i < AT91_NR_UART; i++) {
if (at91_serial_map[i] >= 0)
uart_remove_one_port(&at91_uart, &at91_ports[i]);
}
platform_driver_unregister(&at91_serial_driver);
uart_unregister_driver(&at91_uart);
}

81
include/asm-arm/arch-at91rm9200/at91rm9200_spi.h Normal file
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@ -0,0 +1,81 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_spi.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* Serial Peripheral Interface (SPI) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_SPI_H
#define AT91RM9200_SPI_H
#define AT91_SPI_CR 0x00 /* Control Register */
#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */
#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */
#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */
#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
#define AT91_SPI_MR 0x04 /* Mode Register */
#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */
#define AT91_SPI_PS (1 << 1) /* Peripheral Select */
#define AT91_SPI_PS_FIXED (0 << 1)
#define AT91_SPI_PS_VARIABLE (1 << 1)
#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */
#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection */
#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */
#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */
#define AT91_SPI_RDR 0x08 /* Receive Data Register */
#define AT91_SPI_RD (0xffff << 0) /* Receive Data */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_TDR 0x0c /* Transmit Data Register */
#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
#define AT91_SPI_SR 0x10 /* Status Register */
#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */
#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */
#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */
#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */
#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */
#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */
#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */
#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */
#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */
#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */
#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */
#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */
#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */
#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */
#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */
#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */
#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */
#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */
#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */
#define AT91_SPI_BITS_8 (0 << 4)
#define AT91_SPI_BITS_9 (1 << 4)
#define AT91_SPI_BITS_10 (2 << 4)
#define AT91_SPI_BITS_11 (3 << 4)
#define AT91_SPI_BITS_12 (4 << 4)
#define AT91_SPI_BITS_13 (5 << 4)
#define AT91_SPI_BITS_14 (6 << 4)
#define AT91_SPI_BITS_15 (7 << 4)
#define AT91_SPI_BITS_16 (8 << 4)
#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */
#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */
#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */
#endif

96
include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h Normal file
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@ -0,0 +1,96 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h
*
* Copyright (C) SAN People
*
* Serial Synchronous Controller (SSC) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_SSC_H
#define AT91RM9200_SSC_H
#define AT91_SSC_CR 0x00 /* Control Register */
#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */
#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */
#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */
#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */
#define AT91_SSC_SWRST (1 << 15) /* Software Reset */
#define AT91_SSC_CMR 0x04 /* Clock Mode Register */
#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */
#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */
#define AT91_SSC_CKS (3 << 0) /* Clock Selection */
#define AT91_SSC_CKS_DIV (0 << 0)
#define AT91_SSC_CKS_CLOCK (1 << 0)
#define AT91_SSC_CKS_PIN (2 << 0)
#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */
#define AT91_SSC_CKO_NONE (0 << 2)
#define AT91_SSC_CKO_CONTINUOUS (1 << 2)
#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */
#define AT91_SSC_CKI_FALLING (0 << 5)
#define AT91_SSC_CK_RISING (1 << 5)
#define AT91_SSC_START (0xf << 8) /* Start Selection */
#define AT91_SSC_START_CONTINUOUS (0 << 8)
#define AT91_SSC_START_TX_RX (1 << 8)
#define AT91_SSC_START_LOW_RF (2 << 8)
#define AT91_SSC_START_HIGH_RF (3 << 8)
#define AT91_SSC_START_FALLING_RF (4 << 8)
#define AT91_SSC_START_RISING_RF (5 << 8)
#define AT91_SSC_START_LEVEL_RF (6 << 8)
#define AT91_SSC_START_EDGE_RF (7 << 8)
#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */
#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */
#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */
#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */
#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */
#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */
#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */
#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */
#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */
#define AT91_SSC_FSOS_NONE (0 << 20)
#define AT91_SSC_FSOS_NEGATIVE (1 << 20)
#define AT91_SSC_FSOS_POSITIVE (2 << 20)
#define AT91_SSC_FSOS_LOW (3 << 20)
#define AT91_SSC_FSOS_HIGH (4 << 20)
#define AT91_SSC_FSOS_TOGGLE (5 << 20)
#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */
#define AT91_SSC_FSEDGE_POSITIVE (0 << 24)
#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24)
#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */
#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */
#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */
#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */
#define AT91_SSC_RHR 0x20 /* Receive Holding Register */
#define AT91_SSC_THR 0x24 /* Transmit Holding Register */
#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */
#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */
#define AT91_SSC_SR 0x40 /* Status Register */
#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */
#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */
#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */
#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */
#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */
#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */
#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */
#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */
#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */
#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */
#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */
#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */
#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */
#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */
#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */
#endif

11
include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
View File

@ -68,8 +68,17 @@
#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */
#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */
#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */
#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */
#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */
#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */
#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
/*
@ -241,7 +250,7 @@
#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
#define At91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */
#define AT91_RTC_CENT (0x7f << 0) /* Current Century */

146
include/asm-arm/arch-at91rm9200/at91rm9200_tc.h Normal file
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@ -0,0 +1,146 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_tc.h
*
* Copyright (C) SAN People
*
* Timer/Counter Unit (TC) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_TC_H
#define AT91RM9200_TC_H
#define AT91_TC_BCR 0xc0 /* TC Block Control Register */
#define AT91_TC_SYNC (1 << 0) /* Synchro Command */
#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */
#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */
#define AT91_TC_TC0XC0S_TCLK0 (0 << 0)
#define AT91_TC_TC0XC0S_NONE (1 << 0)
#define AT91_TC_TC0XC0S_TIOA1 (2 << 0)
#define AT91_TC_TC0XC0S_TIOA2 (3 << 0)
#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */
#define AT91_TC_TC1XC1S_TCLK1 (0 << 2)
#define AT91_TC_TC1XC1S_NONE (1 << 2)
#define AT91_TC_TC1XC1S_TIOA0 (2 << 2)
#define AT91_TC_TC1XC1S_TIOA2 (3 << 2)
#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */
#define AT91_TC_TC2XC2S_TCLK2 (0 << 4)
#define AT91_TC_TC2XC2S_NONE (1 << 4)
#define AT91_TC_TC2XC2S_TIOA0 (2 << 4)
#define AT91_TC_TC2XC2S_TIOA1 (3 << 4)
#define AT91_TC_CCR 0x00 /* Channel Control Register */
#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */
#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */
#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */
#define AT91_TC_CMR 0x04 /* Channel Mode Register */
#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */
#define AT91_TC_TIMER_CLOCK1 (0 << 0)
#define AT91_TC_TIMER_CLOCK2 (1 << 0)
#define AT91_TC_TIMER_CLOCK3 (2 << 0)
#define AT91_TC_TIMER_CLOCK4 (3 << 0)
#define AT91_TC_TIMER_CLOCK5 (4 << 0)
#define AT91_TC_XC0 (5 << 0)
#define AT91_TC_XC1 (6 << 0)
#define AT91_TC_XC2 (7 << 0)
#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */
#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */
#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */
#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */
#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */
#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */
#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */
#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */
#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */
#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */
#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */
#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */
#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */
#define AT91_TC_EEVTEDG_NONE (0 << 8)
#define AT91_TC_EEVTEDG_RISING (1 << 8)
#define AT91_TC_EEVTEDG_FALLING (2 << 8)
#define AT91_TC_EEVTEDG_BOTH (3 << 8)
#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */
#define AT91_TC_EEVT_TIOB (0 << 10)
#define AT91_TC_EEVT_XC0 (1 << 10)
#define AT91_TC_EEVT_XC1 (2 << 10)
#define AT91_TC_EEVT_XC2 (3 << 10)
#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */
#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */
#define AT91_TC_WAVESEL_UP (0 << 13)
#define AT91_TC_WAVESEL_UP_AUTO (2 << 13)
#define AT91_TC_WAVESEL_UPDOWN (1 << 13)
#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */
#define AT91_TC_ACPA_NONE (0 << 16)
#define AT91_TC_ACPA_SET (1 << 16)
#define AT91_TC_ACPA_CLEAR (2 << 16)
#define AT91_TC_ACPA_TOGGLE (3 << 16)
#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */
#define AT91_TC_ACPC_NONE (0 << 18)
#define AT91_TC_ACPC_SET (1 << 18)
#define AT91_TC_ACPC_CLEAR (2 << 18)
#define AT91_TC_ACPC_TOGGLE (3 << 18)
#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */
#define AT91_TC_AEEVT_NONE (0 << 20)
#define AT91_TC_AEEVT_SET (1 << 20)
#define AT91_TC_AEEVT_CLEAR (2 << 20)
#define AT91_TC_AEEVT_TOGGLE (3 << 20)
#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */
#define AT91_TC_ASWTRG_NONE (0 << 22)
#define AT91_TC_ASWTRG_SET (1 << 22)
#define AT91_TC_ASWTRG_CLEAR (2 << 22)
#define AT91_TC_ASWTRG_TOGGLE (3 << 22)
#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */
#define AT91_TC_BCPB_NONE (0 << 24)
#define AT91_TC_BCPB_SET (1 << 24)
#define AT91_TC_BCPB_CLEAR (2 << 24)
#define AT91_TC_BCPB_TOGGLE (3 << 24)
#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */
#define AT91_TC_BCPC_NONE (0 << 26)
#define AT91_TC_BCPC_SET (1 << 26)
#define AT91_TC_BCPC_CLEAR (2 << 26)
#define AT91_TC_BCPC_TOGGLE (3 << 26)
#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */
#define AT91_TC_BEEVT_NONE (0 << 28)
#define AT91_TC_BEEVT_SET (1 << 28)
#define AT91_TC_BEEVT_CLEAR (2 << 28)
#define AT91_TC_BEEVT_TOGGLE (3 << 28)
#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */
#define AT91_TC_BSWTRG_NONE (0 << 30)
#define AT91_TC_BSWTRG_SET (1 << 30)
#define AT91_TC_BSWTRG_CLEAR (2 << 30)
#define AT91_TC_BSWTRG_TOGGLE (3 << 30)
#define AT91_TC_CV 0x10 /* Counter Value */
#define AT91_TC_RA 0x14 /* Register A */
#define AT91_TC_RB 0x18 /* Register B */
#define AT91_TC_RC 0x1c /* Register C */
#define AT91_TC_SR 0x20 /* Status Register */
#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */
#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */
#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */
#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */
#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */
#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */
#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */
#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */
#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */
#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */
#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */
#define AT91_TC_IER 0x24 /* Interrupt Enable Register */
#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */
#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */
#endif

77
include/asm-arm/arch-at91rm9200/at91rm9200_udp.h Normal file
View File

@ -0,0 +1,77 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* USB Device Port (UDP) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_UDP_H
#define AT91RM9200_UDP_H
#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
#define AT91_UDP_CONFG (1 << 1) /* Configured */
#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
#define AT91_UDP_FADDR 0x08 /* Function Address Register */
#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
#define AT91_UDP_FEN (1 << 8) /* Function Enable */
#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */
#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */
#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */
#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */
#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
#define AT91_UDP_EPTYPE_CTRL (0 << 8)
#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
#define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
#define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
#define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
#define AT91_UDP_EPTYPE_INT_IN (7 << 8)
#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */
#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
#endif

30
include/asm-arm/arch-at91rm9200/board.h
View File

@ -31,14 +31,9 @@
#ifndef __ASM_ARCH_BOARD_H
#define __ASM_ARCH_BOARD_H
/* Clocks */
extern unsigned long at91_master_clock;
/* Serial Port */
extern int at91_serial_map[AT91_NR_UART];
extern int at91_console_port;
#include <linux/mtd/partitions.h>
#include <linux/device.h>
#include <linux/spi/spi.h>
/* USB Device */
struct at91_udc_data {
@ -91,10 +86,25 @@ struct at91_nand_data {
extern void __init at91_add_device_nand(struct at91_nand_data *data);
/* I2C*/
void __init at91_add_device_i2c(void);
extern void __init at91_add_device_i2c(void);
/* RTC */
void __init at91_add_device_rtc(void);
/* SPI */
extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
/* Serial */
struct at91_uart_config {
unsigned short console_tty; /* tty number of serial console */
unsigned short nr_tty; /* number of serial tty's */
short tty_map[]; /* map UART to tty number */
};
extern struct platform_device *at91_default_console_device;
extern void __init at91_init_serial(struct at91_uart_config *config);
struct at91_uart_data {
short use_dma_tx; /* use transmit DMA? */
short use_dma_rx; /* use receive DMA? */
};
extern void __init at91_add_device_serial(void);
/* LEDs */
extern u8 at91_leds_cpu;

5
include/asm-arm/arch-at91rm9200/gpio.h
View File

@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
#define __ASM_ARCH_AT91RM9200_GPIO_H
#include <asm/irq.h>
#define PIN_BASE NR_AIC_IRQS
#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */
@ -188,6 +190,9 @@ extern int at91_set_multi_drive(unsigned pin, int is_on);
/* callable at any time */
extern int at91_set_gpio_value(unsigned pin, int value);
extern int at91_get_gpio_value(unsigned pin);
extern void at91_gpio_suspend(void);
extern void at91_gpio_resume(void);
#endif
#endif

9
include/asm-arm/arch-at91rm9200/hardware.h
View File

@ -50,9 +50,12 @@
#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
/* Internal SRAM */
#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
/* Internal SRAM is mapped below the IO devices */
#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
/* Serial ports */
#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
@ -81,14 +84,14 @@ static inline unsigned int at91_sys_read(unsigned int reg_offset)
{
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
return readl(addr + reg_offset);
return __raw_readl(addr + reg_offset);
}
static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
{
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
writel(value, addr + reg_offset);
__raw_writel(value, addr + reg_offset);
}
#endif

1
include/asm-arm/arch-at91rm9200/io.h
View File

@ -21,7 +21,6 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include <asm/arch/at91rm9200.h>
#include <asm/io.h>
#define IO_SPACE_LIMIT 0xFFFFFFFF

2
include/asm-arm/arch-at91rm9200/irqs.h
View File

@ -37,8 +37,6 @@
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 4 banks of GPIO.
*/
#include <asm/arch/gpio.h>
#define NR_IRQS (NR_AIC_IRQS + (4 * 32))

2
include/asm-arm/arch-at91rm9200/memory.h
View File

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#define PHYS_OFFSET (AT91_SDRAM_BASE)

115
include/asm-arm/arch-at91rm9200/pio.h
View File

@ -1,115 +0,0 @@
/*
* include/asm-arm/arch-at91rm9200/pio.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARCH_PIO_H
#define __ASM_ARCH_PIO_H
#include <asm/arch/hardware.h>
static inline void AT91_CfgPIO_USART0(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA17_TXD0 | AT91_PA18_RXD0 | AT91_PA20_CTS0);
/*
* Errata #39 - RTS0 is not internally connected to PA21. We need to drive
* the pin manually. Default is off (RTS is active low).
*/
at91_sys_write(AT91_PIOA + PIO_PER, AT91_PA21_RTS0);
at91_sys_write(AT91_PIOA + PIO_OER, AT91_PA21_RTS0);
at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
}
static inline void AT91_CfgPIO_USART1(void) {
at91_sys_write(AT91_PIOB + PIO_PDR, AT91_PB18_RI1 | AT91_PB19_DTR1
| AT91_PB20_TXD1 | AT91_PB21_RXD1 | AT91_PB23_DCD1
| AT91_PB24_CTS1 | AT91_PB25_DSR1 | AT91_PB26_RTS1);
}
static inline void AT91_CfgPIO_USART2(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA22_RXD2 | AT91_PA23_TXD2);
}
static inline void AT91_CfgPIO_USART3(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
at91_sys_write(AT91_PIOA + PIO_BSR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
}
static inline void AT91_CfgPIO_DBGU(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA31_DTXD | AT91_PA30_DRXD);
}
/*
* Enable the Two-Wire interface.
*/
static inline void AT91_CfgPIO_TWI(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA25_TWD | AT91_PA26_TWCK);
at91_sys_write(AT91_PIOA + PIO_ASR, AT91_PA25_TWD | AT91_PA26_TWCK);
at91_sys_write(AT91_PIOA + PIO_MDER, AT91_PA25_TWD | AT91_PA26_TWCK); /* open drain */
}
/*
* Enable the Serial Peripheral Interface.
*/
static inline void AT91_CfgPIO_SPI(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA0_MISO | AT91_PA1_MOSI | AT91_PA2_SPCK);
}
static inline void AT91_CfgPIO_SPI_CS0(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA3_NPCS0);
}
static inline void AT91_CfgPIO_SPI_CS1(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA4_NPCS1);
}
static inline void AT91_CfgPIO_SPI_CS2(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_NPCS2);
}
static inline void AT91_CfgPIO_SPI_CS3(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA6_NPCS3);
}
/*
* Select the DataFlash card.
*/
static inline void AT91_CfgPIO_DataFlashCard(void) {
at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(7));
at91_sys_write(AT91_PIOB + PIO_OER, AT91_PIO_P(7));
at91_sys_write(AT91_PIOB + PIO_CODR, AT91_PIO_P(7));
}
/*
* Enable NAND Flash (SmartMedia) interface.
*/
static inline void AT91_CfgPIO_SmartMedia(void) {
/* enable PC0=SMCE, PC1=SMOE, PC3=SMWE, A21=CLE, A22=ALE */
at91_sys_write(AT91_PIOC + PIO_ASR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
at91_sys_write(AT91_PIOC + PIO_PDR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
/* Configure PC2 as input (signal READY of the SmartMedia) */
at91_sys_write(AT91_PIOC + PIO_PER, AT91_PC2_BFAVD); /* enable direct output enable */
at91_sys_write(AT91_PIOC + PIO_ODR, AT91_PC2_BFAVD); /* disable output */
/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(1)); /* enable direct output enable */
at91_sys_write(AT91_PIOB + PIO_ODR, AT91_PIO_P(1)); /* disable output */
}
static inline int AT91_PIO_SmartMedia_RDY(void) {
return (at91_sys_read(AT91_PIOC + PIO_PDSR) & AT91_PIO_P(2)) ? 1 : 0;
}
static inline int AT91_PIO_SmartMedia_CardDetect(void) {
return (at91_sys_read(AT91_PIOB + PIO_PDSR) & AT91_PIO_P(1)) ? 1 : 0;
}
#endif

10
include/asm-arm/arch-at91rm9200/system.h
View File

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
static inline void arch_idle(void)
{
@ -48,4 +48,12 @@ static inline void arch_reset(char mode)
at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
#define ARCH_ID_AT91RM9200 0x09200080
#define ARCH_ID_AT91SAM9261 0x019000a0
static inline unsigned long arch_identify(void)
{
return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH);
}
#endif

2
include/asm-arm/arch-at91rm9200/timex.h
View File

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK)

2
include/asm-arm/arch-at91rm9200/uncompress.h
View File

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
/*
* The following code assumes the serial port has already been

2
include/asm-arm/arch-at91rm9200/vmalloc.h
View File

@ -21,6 +21,6 @@
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
#define VMALLOC_END (AT91_IO_VIRT_BASE & PGDIR_MASK)
#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK)
#endif

2
include/asm-arm/arch-ixp23xx/entry-macro.S
View File

@ -8,7 +8,7 @@
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number
cmp \irqnr, #0x0 @ suprious interrupt ?
cmp \irqnr, #0x0 @ spurious interrupt ?
movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits
subne \irqnr, \irqnr, #1 @ convert to 0 based

2
include/asm-arm/arch-ixp23xx/ixp23xx.h
View File

@ -251,7 +251,7 @@
* CAP CSRs.
****************************************************************************/
#define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x)))
#define IXP23XX_PROD_IDG IXP23XX_GLOBAL_REG(0x00)
#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00)
#define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04)
#define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08)
#define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c)

38
include/asm-arm/arch-netx/debug-macro.S Normal file
View File

@ -0,0 +1,38 @@
/* linux/include/asm-arm/arch-netx/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include "hardware.h"
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x00100000 @ physical
movne \rx, #io_p2v(0x00100000) @ virtual
orr \rx, \rx, #0x00000a00
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #0x18]
tst \rd, #(1 << 3)
bne 1002b
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18]
tst \rd, #(1 << 3)
bne 1001b
.endm

21
include/asm-arm/arch-netx/dma.h Normal file
View File

@ -0,0 +1,21 @@
/*
* linux/include/asm-arm/arch-netx/dma.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define MAX_DMA_CHANNELS 0
#define MAX_DMA_ADDRESS ~0

35
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/*
* include/asm-arm/arch-netx/entry-macro.S
*
* Low-level IRQ helper macros for Hilscher netX based platforms
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <asm/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #io_p2v(0x00100000)
add \base, \base, #0x000ff000
ldr \irqstat, [\base, #0]
clz \irqnr, \irqstat
rsb \irqnr, \irqnr, #31
cmp \irqstat, #0
.endm

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/*
* include/asm-arm/arch-netx/hardware.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#define NETX_IO_PHYS 0x00100000
#define NETX_IO_VIRT 0xe0000000
#define NETX_IO_SIZE 0x00100000
#define SRAM_INTERNAL_PHYS_0 0x00000
#define SRAM_INTERNAL_PHYS_1 0x08000
#define SRAM_INTERNAL_PHYS_2 0x10000
#define SRAM_INTERNAL_PHYS_3 0x18000
#define SRAM_INTERNAL_PHYS(no) ((no) * 0x8000)
#define XPEC_MEM_SIZE 0x4000
#define XMAC_MEM_SIZE 0x1000
#define SRAM_MEM_SIZE 0x8000
#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT)
#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
#endif

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/*
* linux/include/asm-arm/arch-netx/io.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif

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/*
* include/asm-arm/arch-netx/irqs.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define NETX_IRQ_VIC_START 0
#define NETX_IRQ_SOFTINT 0
#define NETX_IRQ_TIMER0 1
#define NETX_IRQ_TIMER1 2
#define NETX_IRQ_TIMER2 3
#define NETX_IRQ_SYSTIME_NS 4
#define NETX_IRQ_SYSTIME_S 5
#define NETX_IRQ_GPIO_15 6
#define NETX_IRQ_WATCHDOG 7
#define NETX_IRQ_UART0 8
#define NETX_IRQ_UART1 9
#define NETX_IRQ_UART2 10
#define NETX_IRQ_USB 11
#define NETX_IRQ_SPI 12
#define NETX_IRQ_I2C 13
#define NETX_IRQ_LCD 14
#define NETX_IRQ_HIF 15
#define NETX_IRQ_GPIO_0_14 16
#define NETX_IRQ_XPEC0 17
#define NETX_IRQ_XPEC1 18
#define NETX_IRQ_XPEC2 19
#define NETX_IRQ_XPEC3 20
#define NETX_IRQ_XPEC(no) (17 + (no))
#define NETX_IRQ_MSYNC0 21
#define NETX_IRQ_MSYNC1 22
#define NETX_IRQ_MSYNC2 23
#define NETX_IRQ_MSYNC3 24
#define NETX_IRQ_IRQ_PHY 25
#define NETX_IRQ_ISO_AREA 26
/* int 27 is reserved */
/* int 28 is reserved */
#define NETX_IRQ_TIMER3 29
#define NETX_IRQ_TIMER4 30
/* int 31 is reserved */
#define NETX_IRQS 32
/* for multiplexed irqs on gpio 0..14 */
#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
#define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14)
/* Host interface interrupts */
#define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x))
#define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0)
#define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1)
#define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2)
#define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3)
#define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4)
#define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4)
#define NR_IRQS (NETX_IRQ_HIF_LAST + 1)

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/*
* linux/include/asm-arm/arch-netx/memory.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x80000000)
/*
* Virtual view <-> DMA view memory address translations
* virt_to_bus: Used to translate the virtual address to an
* address suitable to be passed to set_dma_addr
* bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use.
*/
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
#endif

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/*
* include/asm-arm/arch-netx/netx-regs.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_NETX_REGS_H
#define __ASM_ARCH_NETX_REGS_H
/* offsets relative to the beginning of the io space */
#define NETX_OFS_SYSTEM 0x00000
#define NETX_OFS_MEMCR 0x00100
#define NETX_OFS_DPMAS 0x03000
#define NETX_OFS_GPIO 0x00800
#define NETX_OFS_PIO 0x00900
#define NETX_OFS_UART0 0x00a00
#define NETX_OFS_UART1 0x00a40
#define NETX_OFS_UART2 0x00a80
#define NETX_OF_MIIMU 0x00b00
#define NETX_OFS_SPI 0x00c00
#define NETX_OFS_I2C 0x00d00
#define NETX_OFS_SYSTIME 0x01100
#define NETX_OFS_RTC 0x01200
#define NETX_OFS_EXTBUS 0x03600
#define NETX_OFS_LCD 0x04000
#define NETX_OFS_USB 0x20000
#define NETX_OFS_XMAC0 0x60000
#define NETX_OFS_XMAC1 0x61000
#define NETX_OFS_XMAC2 0x62000
#define NETX_OFS_XMAC3 0x63000
#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000)
#define NETX_OFS_PFIFO 0x64000
#define NETX_OFS_XPEC0 0x70000
#define NETX_OFS_XPEC1 0x74000
#define NETX_OFS_XPEC2 0x78000
#define NETX_OFS_XPEC3 0x7c000
#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000)
#define NETX_OFS_VIC 0xff000
/* physical addresses */
#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM)
#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR)
#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPMAS)
#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO)
#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO)
#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0)
#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1)
#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2)
#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU)
#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI)
#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C)
#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME)
#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC)
#define NETX_PA_EXTBUS (NETX_IO_PHYS + NETX_OFS_EXTBUS)
#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD)
#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB)
#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0)
#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1)
#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2)
#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3)
#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no))
#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO)
#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0)
#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1)
#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2)
#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3)
#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no))
#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC)
/* virual addresses */
#define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM)
#define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR)
#define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS)
#define NETX_VA_GPIO (NETX_IO_VIRT + NETX_OFS_GPIO)
#define NETX_VA_PIO (NETX_IO_VIRT + NETX_OFS_PIO)
#define NETX_VA_UART0 (NETX_IO_VIRT + NETX_OFS_UART0)
#define NETX_VA_UART1 (NETX_IO_VIRT + NETX_OFS_UART1)
#define NETX_VA_UART2 (NETX_IO_VIRT + NETX_OFS_UART2)
#define NETX_VA_MIIMU (NETX_IO_VIRT + NETX_OF_MIIMU)
#define NETX_VA_SPI (NETX_IO_VIRT + NETX_OFS_SPI)
#define NETX_VA_I2C (NETX_IO_VIRT + NETX_OFS_I2C)
#define NETX_VA_SYSTIME (NETX_IO_VIRT + NETX_OFS_SYSTIME)
#define NETX_VA_RTC (NETX_IO_VIRT + NETX_OFS_RTC)
#define NETX_VA_EXTBUS (NETX_IO_VIRT + NETX_OFS_EXTBUS)
#define NETX_VA_LCD (NETX_IO_VIRT + NETX_OFS_LCD)
#define NETX_VA_USB (NETX_IO_VIRT + NETX_OFS_USB)
#define NETX_VA_XMAC0 (NETX_IO_VIRT + NETX_OFS_XMAC0)
#define NETX_VA_XMAC1 (NETX_IO_VIRT + NETX_OFS_XMAC1)
#define NETX_VA_XMAC2 (NETX_IO_VIRT + NETX_OFS_XMAC2)
#define NETX_VA_XMAC3 (NETX_IO_VIRT + NETX_OFS_XMAC3)
#define NETX_VA_XMAC(no) (NETX_IO_VIRT + NETX_OFS_XMAC(no))
#define NETX_VA_PFIFO (NETX_IO_VIRT + NETX_OFS_PFIFO)
#define NETX_VA_XPEC0 (NETX_IO_VIRT + NETX_OFS_XPEC0)
#define NETX_VA_XPEC1 (NETX_IO_VIRT + NETX_OFS_XPEC1)
#define NETX_VA_XPEC2 (NETX_IO_VIRT + NETX_OFS_XPEC2)
#define NETX_VA_XPEC3 (NETX_IO_VIRT + NETX_OFS_XPEC3)
#define NETX_VA_XPEC(no) (NETX_IO_VIRT + NETX_OFS_XPEC(no))
#define NETX_VA_VIC (NETX_IO_VIRT + NETX_OFS_VIC)
/*********************************
* System functions *
*********************************/
/* Registers */
#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs))
#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00)
#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04)
#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08)
/* FIXME: Docs are not consistent */
#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08)
/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) */
#define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10)
#define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34)
#define NETX_SYSTEM_IOC_ACCESS_KEY NETX_SYSTEM_REG(0x70)
#define NETX_SYSTEM_WDG_TR NETX_SYSTEM_REG(0x200)
#define NETX_SYSTEM_WDG_CTR NETX_SYSTEM_REG(0x204)
#define NETX_SYSTEM_WDG_IRQ_TIMEOUT NETX_SYSTEM_REG(0x208)
#define NETX_SYSTEM_WDG_RES_TIMEOUT NETX_SYSTEM_REG(0x20c)
/* Bits */
#define NETX_SYSTEM_RES_CR_RSTIN (1<<0)
#define NETX_SYSTEM_RES_CR_WDG_RES (1<<1)
#define NETX_SYSTEM_RES_CR_HOST_RES (1<<2)
#define NETX_SYSTEM_RES_CR_FIRMW_RES (1<<3)
#define NETX_SYSTEM_RES_CR_XPEC0_RES (1<<4)
#define NETX_SYSTEM_RES_CR_XPEC1_RES (1<<5)
#define NETX_SYSTEM_RES_CR_XPEC2_RES (1<<6)
#define NETX_SYSTEM_RES_CR_XPEC3_RES (1<<7)
#define NETX_SYSTEM_RES_CR_DIS_XPEC0_RES (1<<16)
#define NETX_SYSTEM_RES_CR_DIS_XPEC1_RES (1<<17)
#define NETX_SYSTEM_RES_CR_DIS_XPEC2_RES (1<<18)
#define NETX_SYSTEM_RES_CR_DIS_XPEC3_RES (1<<19)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG0 (1<<20)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG1 (1<<21)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG2 (1<<22)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG3 (1<<23)
#define NETX_SYSTEM_RES_CR_FIRMW_RES_EN (1<<24)
#define NETX_SYSTEM_RES_CR_RSTOUT (1<<25)
#define NETX_SYSTEM_RES_CR_EN_RSTOUT (1<<26)
#define PHY_CONTROL_RESET (1<<31)
#define PHY_CONTROL_SIM_BYP (1<<30)
#define PHY_CONTROL_CLK_XLATIN (1<<29)
#define PHY_CONTROL_PHY1_EN (1<<21)
#define PHY_CONTROL_PHY1_NP_MSG_CODE
#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17)
#define PHY_CONTROL_PHY1_FIXMODE (1<<16)
#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13)
#define PHY_CONTROL_PHY0_EN (1<<12)
#define PHY_CONTROL_PHY0_NP_MSG_CODE
#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8)
#define PHY_CONTROL_PHY0_FIXMODE (1<<7)
#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4)
#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf)
#define PHY_MODE_10BASE_T_HALF 0
#define PHY_MODE_10BASE_T_FULL 1
#define PHY_MODE_100BASE_TX_FX_FULL 2
#define PHY_MODE_100BASE_TX_FX_HALF 3
#define PHY_MODE_100BASE_TX_HALF 4
#define PHY_MODE_REPEATER 5
#define PHY_MODE_POWER_DOWN 6
#define PHY_MODE_ALL 7
/* Bits */
#define VECT_CNTL_ENABLE (1 << 5)
/*******************************
* GPIO and timer module *
*******************************/
/* Registers */
#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs))
#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2))
#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2))
#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2))
#define NETX_GPIO_COUNTER_MAX(counter) NETX_GPIO_REG(0x94 + ((counter)<<2))
#define NETX_GPIO_COUNTER_CURRENT(counter) NETX_GPIO_REG(0xa8 + ((counter)<<2))
#define NETX_GPIO_IRQ_ENABLE NETX_GPIO_REG(0xbc)
#define NETX_GPIO_IRQ_DISABLE NETX_GPIO_REG(0xc0)
#define NETX_GPIO_SYSTIME_NS_CMP NETX_GPIO_REG(0xc4)
#define NETX_GPIO_LINE NETX_GPIO_REG(0xc8)
#define NETX_GPIO_IRQ NETX_GPIO_REG(0xd0)
/* Bits */
#define NETX_GPIO_CFG_IOCFG_GP_INPUT (0x0)
#define NETX_GPIO_CFG_IOCFG_GP_OUTPUT (0x1)
#define NETX_GPIO_CFG_IOCFG_GP_UART (0x2)
#define NETX_GPIO_CFG_INV (1<<2)
#define NETX_GPIO_CFG_MODE_INPUT_READ (0<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER0 (0<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER1 (1<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER2 (2<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER3 (3<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER4 (4<<5)
#define NETX_GPIO_CFG_COUNT_REF_SYSTIME (7<<5)
#define NETX_GPIO_COUNTER_CTRL_RUN (1<<0)
#define NETX_GPIO_COUNTER_CTRL_SYM (1<<1)
#define NETX_GPIO_COUNTER_CTRL_ONCE (1<<2)
#define NETX_GPIO_COUNTER_CTRL_IRQ_EN (1<<3)
#define NETX_GPIO_COUNTER_CTRL_CNT_EVENT (1<<4)
#define NETX_GPIO_COUNTER_CTRL_RST_EN (1<<5)
#define NETX_GPIO_COUNTER_CTRL_SEL_EVENT (1<<6)
#define NETX_GPIO_COUNTER_CTRL_GPIO_REF /* FIXME */
#define GPIO_BIT(gpio) (1<<(gpio))
#define COUNTER_BIT(counter) ((1<<16)<<(counter))
/*******************************
* PIO *
*******************************/
/* Registers */
#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs))
#define NETX_PIO_INPIO NETX_PIO_REG(0x0)
#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4)
#define NETX_PIO_OEPIO NETX_PIO_REG(0x8)
/*******************************
* MII Unit *
*******************************/
/* Registers */
#define NETX_MIIMU __io(NETX_VA_MIIMU)
/* Bits */
#define MIIMU_SNRDY (1<<0)
#define MIIMU_PREAMBLE (1<<1)
#define MIIMU_OPMODE_WRITE (1<<2)
#define MIIMU_MDC_PERIOD (1<<3)
#define MIIMU_PHY_NRES (1<<4)
#define MIIMU_RTA (1<<5)
#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6)
#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11)
#define MIIMU_DATA(data) (((data) & 0xffff) << 16)
/*******************************
* xmac / xpec *
*******************************/
/* XPEC register offsets relative to NETX_VA_XPEC(no) */
#define NETX_XPEC_R0_OFS 0x00
#define NETX_XPEC_R1_OFS 0x04
#define NETX_XPEC_R2_OFS 0x08
#define NETX_XPEC_R3_OFS 0x0c
#define NETX_XPEC_R4_OFS 0x10
#define NETX_XPEC_R5_OFS 0x14
#define NETX_XPEC_R6_OFS 0x18
#define NETX_XPEC_R7_OFS 0x1c
#define NETX_XPEC_RANGE01_OFS 0x20
#define NETX_XPEC_RANGE23_OFS 0x24
#define NETX_XPEC_RANGE45_OFS 0x28
#define NETX_XPEC_RANGE67_OFS 0x2c
#define NETX_XPEC_PC_OFS 0x48
#define NETX_XPEC_TIMER_OFS(timer) (0x30 + ((timer)<<2))
#define NETX_XPEC_IRQ_OFS 0x8c
#define NETX_XPEC_SYSTIME_NS_OFS 0x90
#define NETX_XPEC_FIFO_DATA_OFS 0x94
#define NETX_XPEC_SYSTIME_S_OFS 0x98
#define NETX_XPEC_ADC_OFS 0x9c
#define NETX_XPEC_URX_COUNT_OFS 0x40
#define NETX_XPEC_UTX_COUNT_OFS 0x44
#define NETX_XPEC_PC_OFS 0x48
#define NETX_XPEC_ZERO_OFS 0x4c
#define NETX_XPEC_STATCFG_OFS 0x50
#define NETX_XPEC_EC_MASKA_OFS 0x54
#define NETX_XPEC_EC_MASKB_OFS 0x58
#define NETX_XPEC_EC_MASK0_OFS 0x5c
#define NETX_XPEC_EC_MASK8_OFS 0x7c
#define NETX_XPEC_EC_MASK9_OFS 0x80
#define NETX_XPEC_XPU_HOLD_PC_OFS 0x100
#define NETX_XPEC_RAM_START_OFS 0x2000
/* Bits */
#define XPU_HOLD_PC (1<<0)
/* XMAC register offsets relative to NETX_VA_XMAC(no) */
#define NETX_XMAC_RPU_PROGRAM_START_OFS 0x000
#define NETX_XMAC_RPU_PROGRAM_END_OFS 0x3ff
#define NETX_XMAC_TPU_PROGRAM_START_OFS 0x400
#define NETX_XMAC_TPU_PROGRAM_END_OFS 0x7ff
#define NETX_XMAC_RPU_HOLD_PC_OFS 0xa00
#define NETX_XMAC_TPU_HOLD_PC_OFS 0xa04
#define NETX_XMAC_STATUS_SHARED0_OFS 0x840
#define NETX_XMAC_CONFIG_SHARED0_OFS 0x844
#define NETX_XMAC_STATUS_SHARED1_OFS 0x848
#define NETX_XMAC_CONFIG_SHARED1_OFS 0x84c
#define NETX_XMAC_STATUS_SHARED2_OFS 0x850
#define NETX_XMAC_CONFIG_SHARED2_OFS 0x854
#define NETX_XMAC_STATUS_SHARED3_OFS 0x858
#define NETX_XMAC_CONFIG_SHARED3_OFS 0x85c
#define RPU_HOLD_PC (1<<15)
#define TPU_HOLD_PC (1<<15)
/*******************************
* Pointer FIFO *
*******************************/
/* Registers */
#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs))
#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100)
#define NETX_PFIFO_FULL NETX_PFIFO_REG(0x104)
#define NETX_PFIFO_EMPTY NETX_PFIFO_REG(0x108)
#define NETX_PFIFO_OVEFLOW NETX_PFIFO_REG(0x10c)
#define NETX_PFIFO_UNDERRUN NETX_PFIFO_REG(0x110)
#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2))
#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2))
/*******************************
* Dual Port Memory *
*******************************/
/* Registers */
#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs))
#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8)
#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0)
#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0)
#define NETX_DPMAS_IF_CONF0 NETX_DPMAS_REG(0x608)
#define NETX_DPMAS_IF_CONF1 NETX_DPMAS_REG(0x60c)
#define NETX_DPMAS_EXT_CONFIG(cs) NETX_DPMAS_REG(0x610 + 4 * (cs))
#define NETX_DPMAS_IO_MODE0 NETX_DPMAS_REG(0x620) /* I/O 32..63 */
#define NETX_DPMAS_DRV_EN0 NETX_DPMAS_REG(0x624)
#define NETX_DPMAS_DATA0 NETX_DPMAS_REG(0x628)
#define NETX_DPMAS_IO_MODE1 NETX_DPMAS_REG(0x630) /* I/O 64..84 */
#define NETX_DPMAS_DRV_EN1 NETX_DPMAS_REG(0x634)
#define NETX_DPMAS_DATA1 NETX_DPMAS_REG(0x638)
/* Bits */
#define NETX_DPMAS_INT_EN_GLB_EN (1<<31)
#define NETX_DPMAS_INT_EN_MEM_LCK (1<<30)
#define NETX_DPMAS_INT_EN_WDG (1<<29)
#define NETX_DPMAS_INT_EN_PIO72 (1<<28)
#define NETX_DPMAS_INT_EN_PIO47 (1<<27)
#define NETX_DPMAS_INT_EN_PIO40 (1<<26)
#define NETX_DPMAS_INT_EN_PIO36 (1<<25)
#define NETX_DPMAS_INT_EN_PIO35 (1<<24)
#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28)
#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28)
#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28)
#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28)
#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30)
#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29)
#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26)
#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23)
#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20)
#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17)
#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12)
#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7)
#define NETX_EXT_CONFIG_WAIT_POL (1<<6)
#define NETX_EXT_CONFIG_WAIT_EN (1<<5)
#define NETX_EXT_CONFIG_NRD_MODE (1<<4)
#define NETX_EXT_CONFIG_DS_MODE (1<<3)
#define NETX_EXT_CONFIG_NWR_MODE (1<<2)
#define NETX_EXT_CONFIG_16BIT (1<<1)
#define NETX_EXT_CONFIG_CS_ENABLE (1<<0)
#define NETX_DPMAS_IO_MODE0_WRL (1<<13)
#define NETX_DPMAS_IO_MODE0_WAIT (1<<14)
#define NETX_DPMAS_IO_MODE0_READY (1<<15)
#define NETX_DPMAS_IO_MODE0_CS0 (1<<19)
#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20)
#define NETX_DPMAS_IO_MODE1_CS2 (1<<15)
#define NETX_DPMAS_IO_MODE1_CS1 (1<<16)
#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30)
/*******************************
* I2C *
*******************************/
#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs))
#define NETX_I2C_CTRL NETX_I2C_REG(0x0)
#define NETX_I2C_DATA NETX_I2C_REG(0x4)
#endif /* __ASM_ARCH_NETX_REGS_H */

18
include/asm-arm/arch-netx/param.h Normal file
View File

@ -0,0 +1,18 @@
/*
* linux/include/asm-arm/arch-netx/param.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/

54
include/asm-arm/arch-netx/pfifo.h Normal file
View File

@ -0,0 +1,54 @@
/*
* include/asm-arm/arch-netx/pfifo.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef ASM_ARCH_PFIFO_H
#define ASM_ARCH_PFIFO_H
static inline int pfifo_push(int no, unsigned int pointer)
{
writel(pointer, NETX_PFIFO_BASE(no));
return 0;
}
static inline unsigned int pfifo_pop(int no)
{
return readl(NETX_PFIFO_BASE(no));
}
static inline int pfifo_fill_level(int no)
{
return readl(NETX_PFIFO_FILL_LEVEL(no));
}
static inline int pfifo_full(int no)
{
return readl(NETX_PFIFO_FULL) & (1<<no) ? 1 : 0;
}
static inline int pfifo_empty(int no)
{
return readl(NETX_PFIFO_EMPTY) & (1<<no) ? 1 : 0;
}
int pfifo_request(unsigned int pfifo_mask);
void pfifo_free(unsigned int pfifo_mask);
#endif /* ASM_ARCH_PFIFO_H */

38
include/asm-arm/arch-netx/system.h Normal file
View File

@ -0,0 +1,38 @@
/*
* include/asm-arm/arch-netx/system.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <asm/io.h>
#include <asm/hardware.h>
#include "netx-regs.h"
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
NETX_SYSTEM_RES_CR);
}
#endif

20
include/asm-arm/arch-netx/timex.h Normal file
View File

@ -0,0 +1,20 @@
/*
* include/asm-arm/arch-netx/timex.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE 100000000

76
include/asm-arm/arch-netx/uncompress.h Normal file
View File

@ -0,0 +1,76 @@
/*
* include/asm-arm/arch-netx/uncompress.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* The following code assumes the serial port has already been
* initialized by the bootloader. We search for the first enabled
* port in the most probable order. If you didn't setup a port in
* your bootloader then nothing will appear (which might be desired).
*
* This does not append a newline
*/
#define REG(x) (*(volatile unsigned long *)(x))
#define UART1_BASE 0x100a00
#define UART2_BASE 0x100a80
#define UART_DR 0x0
#define UART_CR 0x14
#define CR_UART_EN (1<<0)
#define UART_FR 0x18
#define FR_BUSY (1<<3)
#define FR_TXFF (1<<5)
static void putc(char c)
{
unsigned long base;
if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
base = UART1_BASE;
else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
base = UART2_BASE;
else
return;
while (REG(base + UART_FR) & FR_TXFF);
REG(base + UART_DR) = c;
}
static inline void flush(void)
{
unsigned long base;
if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
base = UART1_BASE;
else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
base = UART2_BASE;
else
return;
while (REG(base + UART_FR) & FR_BUSY);
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()

19
include/asm-arm/arch-netx/vmalloc.h Normal file
View File

@ -0,0 +1,19 @@
/*
* linux/include/asm-arm/arch-netx/vmalloc.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)

42
include/asm-arm/arch-netx/xc.h Normal file
View File

@ -0,0 +1,42 @@
/*
* linux/include/asm-arm/arch-netx/xc.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_XC_H
#define __ASM_ARCH_XC_H
struct xc {
int no;
unsigned int type;
unsigned int version;
void __iomem *xpec_base;
void __iomem *xmac_base;
void __iomem *sram_base;
int irq;
struct device *dev;
};
int xc_reset(struct xc *x);
int xc_stop(struct xc* x);
int xc_start(struct xc *x);
int xc_running(struct xc *x);
int xc_request_firmware(struct xc* x);
struct xc* request_xc(int xcno, struct device *dev);
void free_xc(struct xc *x);
#endif /* __ASM_ARCH_XC_H */

4
include/asm-arm/arch-pxa/poodle.h
View File

@ -31,6 +31,7 @@
#define POODLE_GPIO_CF_CD (14)
#define POODLE_GPIO_CF_STSCHG (14)
#define POODLE_GPIO_SD_PWR (33)
#define POODLE_GPIO_SD_PWR1 (3)
#define POODLE_GPIO_nSD_CLK (6)
#define POODLE_GPIO_nSD_WP (7)
#define POODLE_GPIO_nSD_INT (8)
@ -42,6 +43,7 @@
#define POODLE_GPIO_BYPASS_ON (36)
#define POODLE_GPIO_CHRG_ON (38)
#define POODLE_GPIO_CHRG_FULL (16)
#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
/* PXA GPIOs */
#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0)
@ -68,4 +70,6 @@
#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
#define POODLE_SCOOP_IO_OUT ( 0 )
extern struct platform_device poodle_locomo_device;
#endif /* __ASM_ARCH_POODLE_H */

18
include/asm-arm/arch-pxa/pxa-regs.h
View File

@ -1625,7 +1625,7 @@
#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */
#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */
#define SSCR0_ADC (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif
@ -1706,6 +1706,10 @@
#if defined (CONFIG_PXA27x)
#define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */
#define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */
#define SSTSA_P1 __REG(0x41000030) /* SSP Port 1 Tx Timeslot Active */
#define SSRSA_P1 __REG(0x41000034) /* SSP Port 1 Rx Timeslot Active */
#define SSTSS_P1 __REG(0x41000038) /* SSP Port 1 Timeslot Status */
#define SSACD_P1 __REG(0x4100003C) /* SSP Port 1 Audio Clock Divider */
#define SSCR0_P2 __REG(0x41700000) /* SSP Port 2 Control Register 0 */
#define SSCR1_P2 __REG(0x41700004) /* SSP Port 2 Control Register 1 */
#define SSSR_P2 __REG(0x41700008) /* SSP Port 2 Status Register */
@ -1713,6 +1717,10 @@
#define SSDR_P2 __REG(0x41700010) /* (Write / Read) SSP Port 2 Data Write Register/SSP Data Read Register */
#define SSTO_P2 __REG(0x41700028) /* SSP Port 2 Time Out Register */
#define SSPSP_P2 __REG(0x4170002C) /* SSP Port 2 Programmable Serial Protocol */
#define SSTSA_P2 __REG(0x41700030) /* SSP Port 2 Tx Timeslot Active */
#define SSRSA_P2 __REG(0x41700034) /* SSP Port 2 Rx Timeslot Active */
#define SSTSS_P2 __REG(0x41700038) /* SSP Port 2 Timeslot Status */
#define SSACD_P2 __REG(0x4170003C) /* SSP Port 2 Audio Clock Divider */
#define SSCR0_P3 __REG(0x41900000) /* SSP Port 3 Control Register 0 */
#define SSCR1_P3 __REG(0x41900004) /* SSP Port 3 Control Register 1 */
#define SSSR_P3 __REG(0x41900008) /* SSP Port 3 Status Register */
@ -1720,6 +1728,10 @@
#define SSDR_P3 __REG(0x41900010) /* (Write / Read) SSP Port 3 Data Write Register/SSP Data Read Register */
#define SSTO_P3 __REG(0x41900028) /* SSP Port 3 Time Out Register */
#define SSPSP_P3 __REG(0x4190002C) /* SSP Port 3 Programmable Serial Protocol */
#define SSTSA_P3 __REG(0x41900030) /* SSP Port 3 Tx Timeslot Active */
#define SSRSA_P3 __REG(0x41900034) /* SSP Port 3 Rx Timeslot Active */
#define SSTSS_P3 __REG(0x41900038) /* SSP Port 3 Timeslot Status */
#define SSACD_P3 __REG(0x4190003C) /* SSP Port 3 Audio Clock Divider */
#else /* PXA255 (only port 2) and PXA26x ports*/
#define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */
#define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */
@ -1746,6 +1758,10 @@
#define SSDR_P(x) (*(((x) == 1) ? &SSDR_P1 : ((x) == 2) ? &SSDR_P2 : ((x) == 3) ? &SSDR_P3 : NULL))
#define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL))
#define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL))
#define SSTSA_P(x) (*(((x) == 1) ? &SSTSA_P1 : ((x) == 2) ? &SSTSA_P2 : ((x) == 3) ? &SSTSA_P3 : NULL))
#define SSRSA_P(x) (*(((x) == 1) ? &SSRSA_P1 : ((x) == 2) ? &SSRSA_P2 : ((x) == 3) ? &SSRSA_P3 : NULL))
#define SSTSS_P(x) (*(((x) == 1) ? &SSTSS_P1 : ((x) == 2) ? &SSTSS_P2 : ((x) == 3) ? &SSTSS_P3 : NULL))
#define SSACD_P(x) (*(((x) == 1) ? &SSACD_P1 : ((x) == 2) ? &SSACD_P2 : ((x) == 3) ? &SSACD_P3 : NULL))
/*
* MultiMediaCard (MMC) controller

1
include/asm-arm/arch-pxa/system.h
View File

@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*/
#include <asm/proc-fns.h>
#include "hardware.h"
#include "pxa-regs.h"

16
include/asm-arm/arch-versatile/system.h
View File

@ -36,16 +36,14 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
unsigned int hdr_ctrl = (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_RESETCTL_OFFSET);
unsigned int val;
u32 val;
/*
* To reset, we hit the on-board reset register
* in the system FPGA
*/
val = __raw_readl(hdr_ctrl);
val |= VERSATILE_SYS_CTRL_RESET_CONFIGCLR;
__raw_writel(val, hdr_ctrl);
val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
val |= 0x105;
__raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
__raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
__raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
}
#endif

10
include/asm-arm/byteorder.h
View File

@ -22,16 +22,18 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
{
__u32 t;
if (__builtin_constant_p(x)) {
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
} else {
#ifndef __thumb__
if (!__builtin_constant_p(x)) {
/*
* The compiler needs a bit of a hint here to always do the
* right thing and not screw it up to different degrees
* depending on the gcc version.
*/
asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
}
} else
#endif
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */

11
include/asm-arm/hardware/sharpsl_pm.h
View File

@ -16,6 +16,7 @@ struct sharpsl_charger_machinfo {
void (*exit)(void);
int gpio_acin;
int gpio_batfull;
int batfull_irq;
int gpio_batlock;
int gpio_fatal;
void (*discharge)(int);
@ -34,9 +35,19 @@ struct sharpsl_charger_machinfo {
#define SHARPSL_STATUS_FATAL 7
unsigned long (*charger_wakeup)(void);
int (*should_wakeup)(unsigned int resume_on_alarm);
void (*backlight_limit)(int);
int (*backlight_get_status) (void);
int charge_on_volt;
int charge_on_temp;
int charge_acin_high;
int charge_acin_low;
int fatal_acin_volt;
int fatal_noacin_volt;
int bat_levels;
struct battery_thresh *bat_levels_noac;
struct battery_thresh *bat_levels_acin;
struct battery_thresh *bat_levels_noac_bl;
struct battery_thresh *bat_levels_acin_bl;
int status_high_acin;
int status_low_acin;
int status_high_noac;

8
include/asm-arm/mach/serial_at91rm9200.h → include/asm-arm/mach/serial_at91.h
View File

@ -1,5 +1,5 @@
/*
* linux/include/asm-arm/mach/serial_at91rm9200.h
* linux/include/asm-arm/mach/serial_at91.h
*
* Based on serial_sa1100.h by Nicolas Pitre
*
@ -14,7 +14,7 @@ struct uart_port;
* This is a temporary structure for registering these
* functions; it is intended to be discarded after boot.
*/
struct at91rm9200_port_fns {
struct at91_port_fns {
void (*set_mctrl)(struct uart_port *, u_int);
u_int (*get_mctrl)(struct uart_port *);
void (*enable_ms)(struct uart_port *);
@ -25,11 +25,9 @@ struct at91rm9200_port_fns {
};
#if defined(CONFIG_SERIAL_AT91)
void at91_register_uart_fns(struct at91rm9200_port_fns *fns);
void at91_register_uart(int idx, int port);
void at91_register_uart_fns(struct at91_port_fns *fns);
#else
#define at91_register_uart_fns(fns) do { } while (0)
#define at91_register_uart(idx,port) do { } while (0)
#endif

3
include/asm-arm/system.h
View File

@ -107,6 +107,9 @@ extern void __show_regs(struct pt_regs *);
extern int cpu_architecture(void);
extern void cpu_init(void);
void arm_machine_restart(char mode);
extern void (*arm_pm_restart)(char str);
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For

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