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broadcom: Refine expansion register access routine

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This patch makes the expansion register access routines a little more
formal.  They will be used by the following bcm50610 support patch.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2008-11-03 16:56:29 -08:00 committed by David S. Miller
parent 5e0c676c71
commit 042a75b99f
1 changed files with 34 additions and 26 deletions
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60
drivers/net/phy/broadcom.c
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@ -128,36 +128,35 @@ static int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow, u16 val)
MII_BCM54XX_SHD_DATA(val)); MII_BCM54XX_SHD_DATA(val));
} }
/* /* Indirect register access functions for the Expansion Registers */
* Indirect register access functions for the Expansion Registers static int bcm54xx_exp_read(struct phy_device *phydev, u8 regnum)
* and Secondary SerDes registers (when sec_serdes=1).
*/
static int bcm54xx_exp_read(struct phy_device *phydev,
int sec_serdes, u8 regnum)
{ {
int val; int val;
phy_write(phydev, MII_BCM54XX_EXP_SEL, val = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD : if (val < 0)
MII_BCM54XX_EXP_SEL_ER) | return val;
regnum);
val = phy_read(phydev, MII_BCM54XX_EXP_DATA); val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
/* Restore default value. It's O.K. if this write fails. */
phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
return val; return val;
} }
static int bcm54xx_exp_write(struct phy_device *phydev, static int bcm54xx_exp_write(struct phy_device *phydev, u8 regnum, u16 val)
int sec_serdes, u8 regnum, u16 val)
{ {
int ret; int ret;
phy_write(phydev, MII_BCM54XX_EXP_SEL, ret = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD : if (ret < 0)
MII_BCM54XX_EXP_SEL_ER) | return ret;
regnum);
ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val); ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
/* Restore default value. It's O.K. if this write fails. */
phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
return ret; return ret;
} }
@ -205,18 +204,27 @@ static int bcm5482_config_init(struct phy_device *phydev)
/* /*
* Enable SGMII slave mode and auto-detection * Enable SGMII slave mode and auto-detection
*/ */
reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_SGMII_SLAVE); reg = BCM5482_SSD_SGMII_SLAVE | MII_BCM54XX_EXP_SEL_SSD;
bcm54xx_exp_write(phydev, 1, BCM5482_SSD_SGMII_SLAVE, err = bcm54xx_exp_read(phydev, reg);
reg | if (err < 0)
BCM5482_SSD_SGMII_SLAVE_EN | return err;
BCM5482_SSD_SGMII_SLAVE_AD); err = bcm54xx_exp_write(phydev, reg, err |
BCM5482_SSD_SGMII_SLAVE_EN |
BCM5482_SSD_SGMII_SLAVE_AD);
if (err < 0)
return err;
/* /*
* Disable secondary SerDes powerdown * Disable secondary SerDes powerdown
*/ */
reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_1000BX_CTL); reg = BCM5482_SSD_1000BX_CTL | MII_BCM54XX_EXP_SEL_SSD;
bcm54xx_exp_write(phydev, 1, BCM5482_SSD_1000BX_CTL, err = bcm54xx_exp_read(phydev, reg);
reg & ~BCM5482_SSD_1000BX_CTL_PWRDOWN); if (err < 0)
return err;
err = bcm54xx_exp_write(phydev, reg,
err & ~BCM5482_SSD_1000BX_CTL_PWRDOWN);
if (err < 0)
return err;
/* /*
* Select 1000BASE-X register set (primary SerDes) * Select 1000BASE-X register set (primary SerDes)