forked from Minki/linux
V4L/DVB (8378): cx18: move cx18_av_vbi_setup to av-core.c and rename to cx18_av_std_setup
Same issue as for cx25840: this function sets up the standard timings and has nothing to do with VBI setup. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Hans Verkuil
Mauro Carvalho Chehab
parent
ca130eef2c
commit
03b52c36a3
@ -166,6 +166,147 @@ static void cx18_av_initialize(struct cx18 *cx)
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/* ----------------------------------------------------------------------- */
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void cx18_av_std_setup(struct cx18 *cx)
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{
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struct cx18_av_state *state = &cx->av_state;
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v4l2_std_id std = state->std;
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int hblank, hactive, burst, vblank, vactive, sc;
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int vblank656, src_decimation;
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int luma_lpf, uv_lpf, comb;
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u32 pll_int, pll_frac, pll_post;
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/* datasheet startup, step 8d */
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if (std & ~V4L2_STD_NTSC)
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cx18_av_write(cx, 0x49f, 0x11);
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else
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cx18_av_write(cx, 0x49f, 0x14);
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if (std & V4L2_STD_625_50) {
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hblank = 132;
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hactive = 720;
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burst = 93;
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vblank = 36;
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vactive = 580;
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vblank656 = 40;
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src_decimation = 0x21f;
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luma_lpf = 2;
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if (std & V4L2_STD_PAL) {
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uv_lpf = 1;
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comb = 0x20;
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sc = 688739;
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} else if (std == V4L2_STD_PAL_Nc) {
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uv_lpf = 1;
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comb = 0x20;
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sc = 556453;
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} else { /* SECAM */
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uv_lpf = 0;
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comb = 0;
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sc = 672351;
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}
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} else {
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hactive = 720;
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hblank = 122;
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vactive = 487;
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luma_lpf = 1;
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uv_lpf = 1;
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vblank = 26;
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vblank656 = 26;
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src_decimation = 0x21f;
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if (std == V4L2_STD_PAL_60) {
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burst = 0x5b;
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luma_lpf = 2;
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comb = 0x20;
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sc = 688739;
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} else if (std == V4L2_STD_PAL_M) {
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burst = 0x61;
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comb = 0x20;
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sc = 555452;
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} else {
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burst = 0x5b;
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comb = 0x66;
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sc = 556063;
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}
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}
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/* DEBUG: Displays configured PLL frequency */
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pll_int = cx18_av_read(cx, 0x108);
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pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
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pll_post = cx18_av_read(cx, 0x109);
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CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
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pll_int, pll_frac, pll_post);
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if (pll_post) {
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int fin, fsc;
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int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac);
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pll >>= 25;
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pll /= pll_post;
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CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
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pll / 1000000, pll % 1000000);
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CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
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pll / 8000000, (pll / 8) % 1000000);
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fin = ((u64)src_decimation * pll) >> 12;
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CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
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fin / 1000000, fin % 1000000);
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fsc = (((u64)sc) * pll) >> 24L;
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CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
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fsc / 1000000, fsc % 1000000);
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CX18_DEBUG_INFO("hblank %i, hactive %i, "
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"vblank %i , vactive %i, vblank656 %i, src_dec %i,"
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"burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
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" sc 0x%06x\n",
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hblank, hactive, vblank, vactive, vblank656,
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src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
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}
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/* Sets horizontal blanking delay and active lines */
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cx18_av_write(cx, 0x470, hblank);
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cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
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(hactive << 4)));
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cx18_av_write(cx, 0x472, hactive >> 4);
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/* Sets burst gate delay */
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cx18_av_write(cx, 0x473, burst);
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/* Sets vertical blanking delay and active duration */
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cx18_av_write(cx, 0x474, vblank);
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cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
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(vactive << 4)));
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cx18_av_write(cx, 0x476, vactive >> 4);
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cx18_av_write(cx, 0x477, vblank656);
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/* Sets src decimation rate */
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cx18_av_write(cx, 0x478, 0xff & src_decimation);
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cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
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/* Sets Luma and UV Low pass filters */
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cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
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/* Enables comb filters */
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cx18_av_write(cx, 0x47b, comb);
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/* Sets SC Step*/
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cx18_av_write(cx, 0x47c, sc);
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cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
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cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
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/* Sets VBI parameters */
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if (std & V4L2_STD_625_50) {
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cx18_av_write(cx, 0x47f, 0x01);
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state->vbi_line_offset = 5;
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} else {
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cx18_av_write(cx, 0x47f, 0x00);
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state->vbi_line_offset = 8;
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}
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}
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/* ----------------------------------------------------------------------- */
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static void input_change(struct cx18 *cx)
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{
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struct cx18_av_state *state = &cx->av_state;
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@ -323,7 +464,7 @@ static int set_v4lstd(struct cx18 *cx)
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}
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cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
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cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
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cx18_av_vbi_setup(cx);
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cx18_av_std_setup(cx);
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input_change(cx);
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return 0;
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}
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@ -306,6 +306,7 @@ u32 cx18_av_read4(struct cx18 *cx, u16 addr);
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int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value);
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int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value);
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int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg);
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void cx18_av_std_setup(struct cx18 *cx);
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/* ----------------------------------------------------------------------- */
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/* cx18_av-firmware.c */
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@ -318,7 +319,6 @@ void cx18_av_audio_set_path(struct cx18 *cx);
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/* ----------------------------------------------------------------------- */
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/* cx18_av-vbi.c */
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void cx18_av_vbi_setup(struct cx18 *cx);
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int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg);
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#endif
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@ -83,145 +83,6 @@ static int decode_vps(u8 *dst, u8 *p)
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return err & 0xf0;
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}
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void cx18_av_vbi_setup(struct cx18 *cx)
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{
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struct cx18_av_state *state = &cx->av_state;
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v4l2_std_id std = state->std;
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int hblank, hactive, burst, vblank, vactive, sc;
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int vblank656, src_decimation;
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int luma_lpf, uv_lpf, comb;
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u32 pll_int, pll_frac, pll_post;
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/* datasheet startup, step 8d */
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if (std & ~V4L2_STD_NTSC)
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cx18_av_write(cx, 0x49f, 0x11);
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else
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cx18_av_write(cx, 0x49f, 0x14);
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if (std & V4L2_STD_625_50) {
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hblank = 0x084;
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hactive = 0x2d0;
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burst = 0x5d;
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vblank = 0x024;
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vactive = 0x244;
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vblank656 = 0x28;
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src_decimation = 0x21f;
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luma_lpf = 2;
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if (std & V4L2_STD_PAL) {
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uv_lpf = 1;
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comb = 0x20;
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sc = 0x0a8263;
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} else if (std == V4L2_STD_PAL_Nc) {
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uv_lpf = 1;
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comb = 0x20;
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sc = 0x087da5;
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} else { /* SECAM */
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uv_lpf = 0;
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comb = 0;
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sc = 0x0a425f;
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}
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} else {
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hactive = 720;
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hblank = 122;
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vactive = 487;
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luma_lpf = 1;
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uv_lpf = 1;
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vblank = 26;
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vblank656 = 26;
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src_decimation = 0x21f;
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if (std == V4L2_STD_PAL_60) {
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burst = 0x5b;
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luma_lpf = 2;
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comb = 0x20;
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sc = 0x0a8263;
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} else if (std == V4L2_STD_PAL_M) {
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burst = 0x61;
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comb = 0x20;
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sc = 555452;
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} else {
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burst = 0x5b;
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comb = 0x66;
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sc = 556063;
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}
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}
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/* DEBUG: Displays configured PLL frequency */
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pll_int = cx18_av_read(cx, 0x108);
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pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
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pll_post = cx18_av_read(cx, 0x109);
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CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
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pll_int, pll_frac, pll_post);
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if (pll_post) {
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int fin, fsc;
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int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac);
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pll >>= 25;
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pll /= pll_post;
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CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
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pll / 1000000, pll % 1000000);
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CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
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pll / 8000000, (pll / 8) % 1000000);
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fin = ((u64)src_decimation * pll) >> 12;
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CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
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fin / 1000000, fin % 1000000);
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fsc = (((u64)sc) * pll) >> 24L;
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CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
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fsc / 1000000, fsc % 1000000);
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CX18_DEBUG_INFO("hblank %i, hactive %i, "
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"vblank %i , vactive %i, vblank656 %i, src_dec %i,"
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"burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
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" sc 0x%06x\n",
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hblank, hactive, vblank, vactive, vblank656,
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src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
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}
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/* Sets horizontal blanking delay and active lines */
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cx18_av_write(cx, 0x470, hblank);
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cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
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(hactive << 4)));
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cx18_av_write(cx, 0x472, hactive >> 4);
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/* Sets burst gate delay */
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cx18_av_write(cx, 0x473, burst);
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/* Sets vertical blanking delay and active duration */
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cx18_av_write(cx, 0x474, vblank);
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cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
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(vactive << 4)));
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cx18_av_write(cx, 0x476, vactive >> 4);
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cx18_av_write(cx, 0x477, vblank656);
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/* Sets src decimation rate */
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cx18_av_write(cx, 0x478, 0xff & src_decimation);
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cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
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/* Sets Luma and UV Low pass filters */
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cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
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/* Enables comb filters */
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cx18_av_write(cx, 0x47b, comb);
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/* Sets SC Step*/
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cx18_av_write(cx, 0x47c, sc);
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cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
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cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
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/* Sets VBI parameters */
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if (std & V4L2_STD_625_50) {
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cx18_av_write(cx, 0x47f, 0x01);
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state->vbi_line_offset = 5;
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} else {
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cx18_av_write(cx, 0x47f, 0x00);
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state->vbi_line_offset = 8;
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}
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}
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int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg)
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{
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struct cx18_av_state *state = &cx->av_state;
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@ -287,8 +148,8 @@ int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg)
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/* raw VBI */
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memset(svbi, 0, sizeof(*svbi));
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/* Setup VBI */
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cx18_av_vbi_setup(cx);
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/* Setup standard */
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cx18_av_std_setup(cx);
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/* VBI Offset */
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cx18_av_write(cx, 0x47f, vbi_offset);
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@ -299,8 +160,8 @@ int cx18_av_vbi(struct cx18 *cx, unsigned int cmd, void *arg)
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for (x = 0; x <= 23; x++)
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lcr[x] = 0x00;
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/* Setup VBI */
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cx18_av_vbi_setup(cx);
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/* Setup standard */
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cx18_av_std_setup(cx);
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/* Sliced VBI */
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cx18_av_write(cx, 0x404, 0x32); /* Ancillary data */
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