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[WATCHDOG] i8xx_tco.c - remove support for ICH6 + ICH7

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Temporary remove support for ICH6 + ICH7. In these newer TCO's
the watchdog timer has changed: the TCO_TMR register is not at
the TCOBASE+0x1 offset, but changed it's place to TCOBASE+0x12
and became 10 bit long [0:9]. (Kernel BUG 6031).

ICH6 + ICH7 support will be added in a new driver. Code is
under test.

Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Andrew Morton <akpm@osdl.org>
This commit is contained in:
Wim Van Sebroeck 2006-04-16 12:52:35 +02:00
parent 92930d9e81
commit 03a8e359cf
1 changed files with 5 additions and 11 deletions
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16
drivers/char/watchdog/i8xx_tco.c
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@ -33,11 +33,6 @@
* 82801E (C-ICH) : document number 273599-001, 273645-002,
* 82801EB (ICH5) : document number 252516-001, 252517-003,
* 82801ER (ICH5R) : document number 252516-001, 252517-003,
* 82801FB (ICH6) : document number 301473-002, 301474-007,
* 82801FR (ICH6R) : document number 301473-002, 301474-007,
* 82801FBM (ICH6-M) : document number 301473-002, 301474-007,
* 82801FW (ICH6W) : document number 301473-001, 301474-007,
* 82801FRW (ICH6RW) : document number 301473-001, 301474-007
*
* 20000710 Nils Faerber
* Initial Version 0.01
@ -66,6 +61,10 @@
* 20050807 Wim Van Sebroeck <wim@iguana.be>
* 0.08 Make sure that the watchdog is only "armed" when started.
* (Kernel Bug 4251)
* 20060416 Wim Van Sebroeck <wim@iguana.be>
* 0.09 Remove support for the ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW and
* ICH7 chipsets. (See Kernel Bug 6031 - other code will support these
* chipsets)
*/
/*
@ -90,7 +89,7 @@
#include "i8xx_tco.h"
/* Module and version information */
#define TCO_VERSION "0.08"
#define TCO_VERSION "0.09"
#define TCO_MODULE_NAME "i8xx TCO timer"
#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
#define PFX TCO_MODULE_NAME ": "
@ -391,11 +390,6 @@ static struct pci_device_id i8xx_tco_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, PCI_ANY_ID, },
{ 0, }, /* End of list */
};