Merge branch 'pci/pm'
- Cache the PTM capability offset instead of searching for it every time (Bjorn Helgaas) - Separate PTM configuration from PTM enable (Bjorn Helgaas) - Add pci_suspend_ptm() and pci_resume_ptm() to disable and re-enable PTM on suspend/resume so some Root Ports can safely enter a lower-power PM state (Bjorn Helgaas) - Disable PTM for all devices during suspend; previously we only did this for Root Ports and even then only in certain cases (Bjorn Helgaas) - Simplify pci_pm_suspend_noirq() (Rajvi Jingar) - Reduce the delay after transitions to/from D3hot by using usleep_range() instead of msleep(), which reduces the typical delay from 19ms to 10ms (Sajid Dalvi, Will McVicker) * pci/pm: PCI/PM: Reduce D3hot delay with usleep_range() PCI/PM: Simplify pci_pm_suspend_noirq() PCI/PM: Always disable PTM for all devices during suspend PCI/PTM: Consolidate PTM interface declarations PCI/PTM: Reorder functions in logical order PCI/PTM: Preserve RsvdP bits in PTM Control register PCI/PTM: Move pci_ptm_info() body into its only caller PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() PCI/PTM: Separate configuration and enable PCI/PTM: Add pci_upstream_ptm() helper PCI/PTM: Cache PTM Capability offset
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@@ -66,13 +66,15 @@ struct pci_pme_device {
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static void pci_dev_d3_sleep(struct pci_dev *dev)
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{
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unsigned int delay = dev->d3hot_delay;
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unsigned int delay_ms = max(dev->d3hot_delay, pci_pm_d3hot_delay);
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unsigned int upper;
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if (delay < pci_pm_d3hot_delay)
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delay = pci_pm_d3hot_delay;
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if (delay)
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msleep(delay);
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if (delay_ms) {
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/* Use a 20% upper bound, 1ms minimum */
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upper = max(DIV_ROUND_CLOSEST(delay_ms, 5), 1U);
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usleep_range(delay_ms * USEC_PER_MSEC,
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(delay_ms + upper) * USEC_PER_MSEC);
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}
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}
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bool pci_reset_supported(struct pci_dev *dev)
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@@ -2708,24 +2710,12 @@ int pci_prepare_to_sleep(struct pci_dev *dev)
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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/*
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* There are systems (for example, Intel mobile chips since Coffee
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* Lake) where the power drawn while suspended can be significantly
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* reduced by disabling PTM on PCIe root ports as this allows the
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* port to enter a lower-power PM state and the SoC to reach a
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* lower-power idle state as a whole.
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*/
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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pci_disable_ptm(dev);
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pci_enable_wake(dev, target_state, wakeup);
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error = pci_set_power_state(dev, target_state);
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if (error) {
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if (error)
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pci_enable_wake(dev, target_state, false);
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pci_restore_ptm_state(dev);
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}
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return error;
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}
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@@ -2766,24 +2756,12 @@ int pci_finish_runtime_suspend(struct pci_dev *dev)
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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/*
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* There are systems (for example, Intel mobile chips since Coffee
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* Lake) where the power drawn while suspended can be significantly
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* reduced by disabling PTM on PCIe root ports as this allows the
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* port to enter a lower-power PM state and the SoC to reach a
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* lower-power idle state as a whole.
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*/
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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pci_disable_ptm(dev);
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__pci_enable_wake(dev, target_state, pci_dev_run_wake(dev));
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error = pci_set_power_state(dev, target_state);
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if (error) {
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if (error)
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pci_enable_wake(dev, target_state, false);
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pci_restore_ptm_state(dev);
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}
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return error;
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}
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