forked from Minki/linux
ftrace: core support for ARM
Core ftrace support for the ARM architecture, which includes support for dynamic function tracing. Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Abhishek Sagar
Ingo Molnar
parent
b1829d2705
commit
014c257cce
@ -14,6 +14,8 @@ config ARM
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select HAVE_OPROFILE
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select HAVE_KPROBES if (!XIP_KERNEL)
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select HAVE_KRETPROBES if (HAVE_KPROBES)
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select HAVE_FTRACE if (!XIP_KERNEL)
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select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE)
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help
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The ARM series is a line of low-power-consumption RISC chip designs
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licensed by ARM Ltd and targeted at embedded applications and
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@ -69,6 +69,12 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
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targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
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head.o misc.o $(OBJS)
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ifeq ($(CONFIG_FTRACE),y)
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ORIG_CFLAGS := $(KBUILD_CFLAGS)
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KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
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endif
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EXTRA_CFLAGS := -fpic -fno-builtin
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EXTRA_AFLAGS :=
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@ -4,6 +4,10 @@
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AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
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ifdef CONFIG_DYNAMIC_FTRACE
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CFLAGS_REMOVE_ftrace.o = -pg
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endif
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# Object file lists.
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obj-y := compat.o entry-armv.o entry-common.o irq.o \
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@ -18,6 +22,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o
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obj-$(CONFIG_ISA_DMA) += dma-isa.o
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obj-$(CONFIG_PCI) += bios32.o isa.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o
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obj-$(CONFIG_ATAGS_PROC) += atags.o
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@ -48,6 +48,11 @@ extern void __aeabi_ulcmp(void);
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extern void fpundefinstr(void);
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extern void fp_enter(void);
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#ifdef CONFIG_FTRACE
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extern void mcount(void);
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EXPORT_SYMBOL(mcount);
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#endif
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/*
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* This has a special calling convention; it doesn't
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* modify any of the usual registers, except for LR.
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@ -99,6 +99,53 @@ ENTRY(ret_from_fork)
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#undef CALL
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#define CALL(x) .long x
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#ifdef CONFIG_FTRACE
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#ifdef CONFIG_DYNAMIC_FTRACE
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ENTRY(mcount)
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stmdb sp!, {r0-r3, lr}
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mov r0, lr
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.globl mcount_call
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mcount_call:
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bl ftrace_stub
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ldmia sp!, {r0-r3, pc}
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ENTRY(ftrace_caller)
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stmdb sp!, {r0-r3, lr}
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ldr r1, [fp, #-4]
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mov r0, lr
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.globl ftrace_call
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ftrace_call:
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bl ftrace_stub
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ldmia sp!, {r0-r3, pc}
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#else
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ENTRY(mcount)
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stmdb sp!, {r0-r3, lr}
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ldr r0, =ftrace_trace_function
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ldr r2, [r0]
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adr r0, ftrace_stub
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cmp r0, r2
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bne trace
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ldmia sp!, {r0-r3, pc}
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trace:
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ldr r1, [fp, #-4]
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mov r0, lr
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mov lr, pc
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mov pc, r2
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ldmia sp!, {r0-r3, pc}
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#endif /* CONFIG_DYNAMIC_FTRACE */
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.globl ftrace_stub
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ftrace_stub:
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mov pc, lr
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#endif /* CONFIG_FTRACE */
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/*=============================================================================
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* SWI handler
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*-----------------------------------------------------------------------------
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128
arch/arm/kernel/ftrace.c
Normal file
128
arch/arm/kernel/ftrace.c
Normal file
@ -0,0 +1,128 @@
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/*
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* Dynamic function tracing support.
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*
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* Copyright (C) 2008 Abhishek Sagar <sagar.abhishek@gmail.com>
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*
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* For licencing details, see COPYING.
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*
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* Defines low-level handling of mcount calls when the kernel
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* is compiled with the -pg flag. When using dynamic ftrace, the
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* mcount call-sites get patched lazily with NOP till they are
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* enabled. All code mutation routines here take effect atomically.
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*/
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#include <linux/ftrace.h>
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#include <asm/cacheflush.h>
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#define INSN_SIZE 4
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#define PC_OFFSET 8
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#define BL_OPCODE 0xeb000000
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#define BL_OFFSET_MASK 0x00ffffff
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static unsigned long bl_insn;
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static const unsigned long NOP = 0xe1a00000; /* mov r0, r0 */
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/* return true if mcount call site is already patched/no-op'ed */
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int ftrace_ip_converted(unsigned long pc)
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{
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unsigned long save;
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pc -= INSN_SIZE;
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save = *(unsigned long *)pc;
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return save == NOP;
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}
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unsigned char *ftrace_nop_replace(void)
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{
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return (char *)&NOP;
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}
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/* construct a branch (BL) instruction to addr */
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unsigned char *ftrace_call_replace(unsigned long pc, unsigned long addr)
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{
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long offset;
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offset = (long)addr - (long)(pc - INSN_SIZE + PC_OFFSET);
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if (unlikely(offset < -33554432 || offset > 33554428)) {
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/* Can't generate branches that far (from ARM ARM). Ftrace
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* doesn't generate branches outside of core kernel text.
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*/
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WARN_ON_ONCE(1);
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return NULL;
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}
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offset = (offset >> 2) & BL_OFFSET_MASK;
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bl_insn = BL_OPCODE | offset;
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return (unsigned char *)&bl_insn;
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}
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int ftrace_modify_code(unsigned long pc, unsigned char *old_code,
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unsigned char *new_code)
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{
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unsigned long err = 0, replaced = 0, old, new;
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old = *(unsigned long *)old_code;
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new = *(unsigned long *)new_code;
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pc -= INSN_SIZE;
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__asm__ __volatile__ (
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"1: ldr %1, [%2] \n"
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" cmp %1, %4 \n"
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"2: streq %3, [%2] \n"
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" cmpne %1, %3 \n"
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" movne %0, #2 \n"
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"3:\n"
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".section .fixup, \"ax\"\n"
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"4: mov %0, #1 \n"
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" b 3b \n"
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".previous\n"
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".section __ex_table, \"a\"\n"
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" .long 1b, 4b \n"
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" .long 2b, 4b \n"
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".previous\n"
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: "=r"(err), "=r"(replaced)
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: "r"(pc), "r"(new), "r"(old), "0"(err), "1"(replaced)
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: "memory");
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if (!err && (replaced == old))
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flush_icache_range(pc, pc + INSN_SIZE);
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return err;
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}
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int ftrace_update_ftrace_func(ftrace_func_t func)
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{
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int ret;
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unsigned long pc, old;
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unsigned char *new;
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pc = (unsigned long)&ftrace_call;
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pc += INSN_SIZE;
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memcpy(&old, &ftrace_call, INSN_SIZE);
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new = ftrace_call_replace(pc, (unsigned long)func);
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ret = ftrace_modify_code(pc, (unsigned char *)&old, new);
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return ret;
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}
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int ftrace_mcount_set(unsigned long *data)
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{
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unsigned long pc, old;
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unsigned long *addr = data;
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unsigned char *new;
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pc = (unsigned long)&mcount_call;
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pc += INSN_SIZE;
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memcpy(&old, &mcount_call, INSN_SIZE);
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new = ftrace_call_replace(pc, *addr);
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*addr = ftrace_modify_code(pc, (unsigned char *)&old, new);
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return 0;
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}
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/* run from kstop_machine */
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int __init ftrace_dyn_arch_init(void *data)
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{
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ftrace_mcount_set(data);
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return 0;
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}
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