forked from Minki/linux
Merge branch 'davinci-next' of git://gitorious.org/linux-davinci/linux-davinci into devel-stable
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commit
014322dac6
@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev)
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if (!pdata->cpupll_reg_base)
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return -ENOMEM;
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pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K);
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pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
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if (!pdata->ddrpll_reg_base) {
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ret = -ENOMEM;
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goto no_ddrpll_mem;
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@ -24,23 +24,25 @@
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#include "clock.h"
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#define DA8XX_TPCC_BASE 0x01c00000
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#define DA850_MMCSD1_BASE 0x01e1b000
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#define DA850_TPCC1_BASE 0x01e30000
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#define DA8XX_TPTC0_BASE 0x01c08000
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#define DA8XX_TPTC1_BASE 0x01c08400
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#define DA850_TPTC2_BASE 0x01e38000
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#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
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#define DA8XX_I2C0_BASE 0x01c22000
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#define DA8XX_RTC_BASE 0x01C23000
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#define DA8XX_RTC_BASE 0x01c23000
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#define DA8XX_MMCSD0_BASE 0x01c40000
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#define DA8XX_SPI0_BASE 0x01c41000
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#define DA830_SPI1_BASE 0x01e12000
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#define DA8XX_LCD_CNTRL_BASE 0x01e13000
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#define DA850_MMCSD1_BASE 0x01e1b000
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#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
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#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
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#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
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#define DA8XX_EMAC_MDIO_BASE 0x01e24000
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#define DA8XX_GPIO_BASE 0x01e26000
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#define DA8XX_I2C1_BASE 0x01e28000
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#define DA8XX_SPI0_BASE 0x01c41000
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#define DA830_SPI1_BASE 0x01e12000
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#define DA850_TPCC1_BASE 0x01e30000
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#define DA850_TPTC2_BASE 0x01e38000
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#define DA850_SPI1_BASE 0x01f0e000
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#define DA8XX_DDR2_CTL_BASE 0xb0000000
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#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
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#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
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@ -33,6 +33,9 @@
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#define DM365_MMCSD0_BASE 0x01D11000
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#define DM365_MMCSD1_BASE 0x01D00000
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/* System control register offsets */
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#define DM64XX_VDD3P3V_PWDN 0x48
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static struct resource i2c_resources[] = {
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{
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.start = DAVINCI_I2C_BASE,
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@ -64,13 +64,9 @@ extern unsigned int da850_max_speed;
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#define DA8XX_TIMER64P1_BASE 0x01c21000
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#define DA8XX_GPIO_BASE 0x01e26000
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#define DA8XX_PSC1_BASE 0x01e27000
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#define DA8XX_LCD_CNTRL_BASE 0x01e13000
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#define DA8XX_PLL1_BASE 0x01e1a000
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#define DA8XX_MMCSD0_BASE 0x01c40000
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#define DA8XX_AEMIF_CS2_BASE 0x60000000
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#define DA8XX_AEMIF_CS3_BASE 0x62000000
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#define DA8XX_AEMIF_CTL_BASE 0x68000000
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#define DA8XX_DDR2_CTL_BASE 0xb0000000
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#define DA8XX_ARM_RAM_BASE 0xffff0000
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void __init da830_init(void);
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@ -21,9 +21,6 @@
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*/
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#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
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/* System control register offsets */
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#define DM64XX_VDD3P3V_PWDN 0x48
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/*
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* I/O mapping
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*/
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