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kbuild: remove dead code in cmd_files calculation in top Makefile

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Nobody sets 'targets' in the top-level Makefile or arch/*/Makefile,
hence $(targets) is empty.

$(wildcard .*.cmd) will do for including the .vmlinux.cmd file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2018-09-12 15:43:30 +09:00
parent 25815cf5ff
commit 00d78ab2ba
1 changed files with 1 additions and 2 deletions
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3
Makefile
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@ -1721,8 +1721,7 @@ cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \
$(if $(KBUILD_MODULES),; rm -f $(MODVERDIR)/*)
# read all saved command lines
cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
cmd_files := $(wildcard .*.cmd)
ifneq ($(cmd_files),)
$(cmd_files): ; # Do not try to update included dependency files