PCI: pciehp: wait 1000 ms before Link Training check

We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA)
bit reads 1b before sending configuration request. Currently pciehp
does this wait after checking Link Training (LT) bit. But we need it
before checking LT bit because LT is still set even after DLLLA bit is
set on some platforms.

Acked-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Kenji Kaneshige 2011-11-10 16:40:37 +09:00 committed by Jesse Barnes
parent fdbd3ce9ef
commit 0027cb3e19
2 changed files with 8 additions and 3 deletions

View File

@ -213,9 +213,6 @@ static int board_added(struct slot *p_slot)
goto err_exit;
}
/* Wait for 1 second after checking link training status */
msleep(1000);
/* Check for a power fault */
if (ctrl->power_fault_detected || pciehp_query_power_fault(p_slot)) {
ctrl_err(ctrl, "Power fault on slot %s\n", slot_name(p_slot));

View File

@ -280,6 +280,14 @@ int pciehp_check_link_status(struct controller *ctrl)
else
msleep(1000);
/*
* Need to wait for 1000 ms after Data Link Layer Link Active
* (DLLLA) bit reads 1b before sending configuration request.
* We need it before checking Link Training (LT) bit becuase
* LT is still set even after DLLLA bit is set on some platform.
*/
msleep(1000);
retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);
if (retval) {
ctrl_err(ctrl, "Cannot read LNKSTATUS register\n");