2006-06-29 09:24:53 +00:00
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/*
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* linux/kernel/irq/chip.c
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*
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* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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*
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* This file contains the core interrupt handling code, for irq-chip
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* based architectures.
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*
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* Detailed information is available in Documentation/DocBook/genericirq
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*/
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#include <linux/irq.h>
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2007-04-18 09:39:21 +00:00
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#include <linux/msi.h>
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2006-06-29 09:24:53 +00:00
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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2012-01-26 01:18:55 +00:00
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#include <trace/events/irq.h>
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2006-06-29 09:24:53 +00:00
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#include "internals.h"
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/**
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2011-02-10 10:36:33 +00:00
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* irq_set_chip - set the irq chip for an irq
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2006-06-29 09:24:53 +00:00
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* @irq: irq number
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* @chip: pointer to irq chip description structure
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*/
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2011-02-10 10:36:33 +00:00
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int irq_set_chip(unsigned int irq, struct irq_chip *chip)
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2006-06-29 09:24:53 +00:00
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{
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unsigned long flags;
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genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
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struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
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2006-06-29 09:24:53 +00:00
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2011-02-12 09:37:36 +00:00
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if (!desc)
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2006-06-29 09:24:53 +00:00
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return -EINVAL;
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if (!chip)
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chip = &no_irq_chip;
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2010-10-01 10:58:38 +00:00
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desc->irq_data.chip = chip;
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2011-02-12 09:37:36 +00:00
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irq_put_desc_unlock(desc, flags);
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2011-03-25 19:38:48 +00:00
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/*
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* For !CONFIG_SPARSE_IRQ make the irq show up in
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* allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
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* already marked, and this call is harmless.
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*/
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irq_reserve_irq(irq);
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2006-06-29 09:24:53 +00:00
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return 0;
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}
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2011-02-10 10:36:33 +00:00
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EXPORT_SYMBOL(irq_set_chip);
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2006-06-29 09:24:53 +00:00
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/**
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2011-02-10 10:36:33 +00:00
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* irq_set_type - set the irq trigger type for an irq
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2006-06-29 09:24:53 +00:00
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* @irq: irq number
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2008-10-01 21:46:18 +00:00
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* @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
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2006-06-29 09:24:53 +00:00
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*/
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2011-02-10 10:36:33 +00:00
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int irq_set_irq_type(unsigned int irq, unsigned int type)
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2006-06-29 09:24:53 +00:00
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{
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unsigned long flags;
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genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
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struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
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2011-02-12 09:37:36 +00:00
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int ret = 0;
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2006-06-29 09:24:53 +00:00
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2011-02-12 09:37:36 +00:00
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if (!desc)
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return -EINVAL;
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2006-06-29 09:24:53 +00:00
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2008-12-01 22:31:38 +00:00
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type &= IRQ_TYPE_SENSE_MASK;
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genirq: Fix long-term regression in genirq irq_set_irq_type() handling
In 2008, commit 0c5d1eb77a8be ("genirq: record trigger type") modified the
way set_irq_type() handles the 'no trigger' condition. However, this has
an adverse effect on PCMCIA support on Intel StrongARM and probably PXA
platforms.
PCMCIA has several status signals on the socket which can trigger
interrupts; some of these status signals depend on the card's mode
(whether it is configured in memory or IO mode). For example, cards have
a 'Ready/IRQ' signal: in memory mode, this provides an indication to
PCMCIA that the card has finished its power up initialization. In IO
mode, it provides the device interrupt signal. Other status signals
switch between on-board battery status and loud speaker output.
In classical PCMCIA implementations, where you have a specific socket
controller, the controller provides a method to mask interrupts from the
socket, and importantly ignore any state transitions on the pins which
correspond with interrupts once masked. This masking prevents unwanted
events caused by the removal and application of socket power being
forwarded.
However, on platforms where there is no socket controller, the PCMCIA
status and interrupt signals are routed to standard edge-triggered GPIOs.
These GPIOs can be configured to interrupt on rising edge, falling edge,
or never. This is where the problems start.
Edge triggered interrupts are required to record events while disabled via
the usual methods of {free,request,disable,enable}_irq() to prevent
problems with dropped interrupts (eg, the 8390 driver uses disable_irq()
to defer the delivery of interrupts). As a result, these interfaces can
not be used to implement the desired behaviour.
The side effect of this is that if the 'Ready/IRQ' GPIO is disabled via
disable_irq() on suspend, and enabled via enable_irq() after resume, we
will record the state transitions caused by powering events as valid
interrupts, and foward them to the card driver, which may attempt to
access a card which is not powered up.
This leads delays resume while drivers spin in their interrupt handlers,
and complaints from drivers before they realize what's happened.
Moreover, in the case of the 'Ready/IRQ' signal, this is requested and
freed by the card driver itself; the PCMCIA core has no idea whether the
interrupt is requested, and, therefore, whether a call to disable_irq()
would be valid. (We tried this around 2.4.17 / 2.5.1 kernel era, and
ended up throwing it out because of this problem.)
Therefore, it was decided back in around 2002 to disable the edge
triggering instead, resulting in all state transitions on the GPIO being
ignored. That's what we actually need the hardware to do.
The commit above changes this behaviour; it explicitly prevents the 'no
trigger' state being selected.
The reason that request_irq() does not accept the 'no trigger' state is
for compatibility with existing drivers which do not provide their desired
triggering configuration. The set_irq_type() function is 'new' and not
used by non-trigger aware drivers.
Therefore, revert this change, and restore previously working platforms
back to their former state.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: linux@arm.linux.org.uk
Cc: Ingo Molnar <mingo@elte.hu>
Cc: stable@vger.kernel.org
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2012-03-05 23:07:25 +00:00
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ret = __irq_set_trigger(desc, irq, type);
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2011-02-12 09:37:36 +00:00
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irq_put_desc_busunlock(desc, flags);
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2006-06-29 09:24:53 +00:00
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return ret;
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}
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2011-02-10 10:36:33 +00:00
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EXPORT_SYMBOL(irq_set_irq_type);
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2006-06-29 09:24:53 +00:00
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/**
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2011-02-10 10:36:33 +00:00
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* irq_set_handler_data - set irq handler data for an irq
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2006-06-29 09:24:53 +00:00
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* @irq: Interrupt number
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* @data: Pointer to interrupt specific data
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*
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* Set the hardware irq controller data for an irq
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*/
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2011-02-10 10:36:33 +00:00
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int irq_set_handler_data(unsigned int irq, void *data)
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2006-06-29 09:24:53 +00:00
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{
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unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
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struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
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2006-06-29 09:24:53 +00:00
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2011-02-12 09:37:36 +00:00
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if (!desc)
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2006-06-29 09:24:53 +00:00
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return -EINVAL;
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2010-10-01 10:58:38 +00:00
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desc->irq_data.handler_data = data;
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2011-02-12 09:37:36 +00:00
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irq_put_desc_unlock(desc, flags);
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2006-06-29 09:24:53 +00:00
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return 0;
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}
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2011-02-10 10:36:33 +00:00
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EXPORT_SYMBOL(irq_set_handler_data);
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2006-06-29 09:24:53 +00:00
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2007-01-28 19:52:03 +00:00
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/**
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2012-11-19 15:01:29 +00:00
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* irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
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* @irq_base: Interrupt number base
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* @irq_offset: Interrupt number offset
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* @entry: Pointer to MSI descriptor data
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2007-01-28 19:52:03 +00:00
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*
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2012-11-19 15:01:29 +00:00
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* Set the MSI descriptor entry for an irq at offset
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2007-01-28 19:52:03 +00:00
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*/
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2012-11-19 15:01:29 +00:00
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int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
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struct msi_desc *entry)
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2007-01-28 19:52:03 +00:00
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{
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unsigned long flags;
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2012-11-19 15:01:29 +00:00
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struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
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2007-01-28 19:52:03 +00:00
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2011-02-12 09:37:36 +00:00
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if (!desc)
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2007-01-28 19:52:03 +00:00
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return -EINVAL;
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2010-10-01 10:58:38 +00:00
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desc->irq_data.msi_desc = entry;
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2012-11-19 15:01:29 +00:00
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if (entry && !irq_offset)
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entry->irq = irq_base;
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2011-02-12 09:37:36 +00:00
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irq_put_desc_unlock(desc, flags);
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2007-01-28 19:52:03 +00:00
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return 0;
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}
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2012-11-19 15:01:29 +00:00
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/**
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* irq_set_msi_desc - set MSI descriptor data for an irq
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* @irq: Interrupt number
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* @entry: Pointer to MSI descriptor data
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*
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* Set the MSI descriptor entry for an irq
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*/
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int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
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{
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return irq_set_msi_desc_off(irq, 0, entry);
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}
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2006-06-29 09:24:53 +00:00
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/**
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2011-02-10 10:36:33 +00:00
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* irq_set_chip_data - set irq chip data for an irq
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2006-06-29 09:24:53 +00:00
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* @irq: Interrupt number
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* @data: Pointer to chip specific data
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*
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* Set the hardware irq chip data for an irq
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*/
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2011-02-10 10:36:33 +00:00
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int irq_set_chip_data(unsigned int irq, void *data)
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2006-06-29 09:24:53 +00:00
|
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{
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unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
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struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
2006-06-29 09:24:53 +00:00
|
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2011-02-12 09:37:36 +00:00
|
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if (!desc)
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2006-06-29 09:24:53 +00:00
|
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return -EINVAL;
|
2010-10-01 10:58:38 +00:00
|
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desc->irq_data.chip_data = data;
|
2011-02-12 09:37:36 +00:00
|
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irq_put_desc_unlock(desc, flags);
|
2006-06-29 09:24:53 +00:00
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return 0;
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}
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2011-02-10 10:36:33 +00:00
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EXPORT_SYMBOL(irq_set_chip_data);
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2006-06-29 09:24:53 +00:00
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2010-09-28 15:34:01 +00:00
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struct irq_data *irq_get_irq_data(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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return desc ? &desc->irq_data : NULL;
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}
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EXPORT_SYMBOL_GPL(irq_get_irq_data);
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2011-02-07 21:11:30 +00:00
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static void irq_state_clr_disabled(struct irq_desc *desc)
|
|
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{
|
2011-03-27 09:02:49 +00:00
|
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irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
|
2011-02-07 21:11:30 +00:00
|
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}
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static void irq_state_set_disabled(struct irq_desc *desc)
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{
|
2011-03-27 09:02:49 +00:00
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irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
|
2011-02-07 21:11:30 +00:00
|
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}
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2011-02-08 11:36:06 +00:00
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static void irq_state_clr_masked(struct irq_desc *desc)
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{
|
2011-03-28 12:10:52 +00:00
|
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|
irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
|
2011-02-08 11:36:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void irq_state_set_masked(struct irq_desc *desc)
|
|
|
|
{
|
2011-03-28 12:10:52 +00:00
|
|
|
irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
|
2011-02-08 11:36:06 +00:00
|
|
|
}
|
|
|
|
|
2012-02-08 10:57:52 +00:00
|
|
|
int irq_startup(struct irq_desc *desc, bool resend)
|
2011-02-02 21:41:14 +00:00
|
|
|
{
|
2012-02-08 10:57:52 +00:00
|
|
|
int ret = 0;
|
|
|
|
|
2011-02-07 21:11:30 +00:00
|
|
|
irq_state_clr_disabled(desc);
|
2011-02-02 21:41:14 +00:00
|
|
|
desc->depth = 0;
|
|
|
|
|
2011-02-04 09:17:52 +00:00
|
|
|
if (desc->irq_data.chip->irq_startup) {
|
2012-02-08 10:57:52 +00:00
|
|
|
ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_clr_masked(desc);
|
2012-02-08 10:57:52 +00:00
|
|
|
} else {
|
|
|
|
irq_enable(desc);
|
2011-02-04 09:17:52 +00:00
|
|
|
}
|
2012-02-08 10:57:52 +00:00
|
|
|
if (resend)
|
|
|
|
check_irq_resend(desc, desc->irq_data.irq);
|
|
|
|
return ret;
|
2011-02-02 21:41:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void irq_shutdown(struct irq_desc *desc)
|
|
|
|
{
|
2011-02-07 21:11:30 +00:00
|
|
|
irq_state_set_disabled(desc);
|
2011-02-02 21:41:14 +00:00
|
|
|
desc->depth = 1;
|
2011-02-03 12:23:54 +00:00
|
|
|
if (desc->irq_data.chip->irq_shutdown)
|
|
|
|
desc->irq_data.chip->irq_shutdown(&desc->irq_data);
|
2011-09-11 11:59:27 +00:00
|
|
|
else if (desc->irq_data.chip->irq_disable)
|
2011-02-03 12:23:54 +00:00
|
|
|
desc->irq_data.chip->irq_disable(&desc->irq_data);
|
|
|
|
else
|
|
|
|
desc->irq_data.chip->irq_mask(&desc->irq_data);
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_set_masked(desc);
|
2011-02-02 21:41:14 +00:00
|
|
|
}
|
|
|
|
|
2011-02-03 11:27:44 +00:00
|
|
|
void irq_enable(struct irq_desc *desc)
|
|
|
|
{
|
2011-02-07 21:11:30 +00:00
|
|
|
irq_state_clr_disabled(desc);
|
2011-02-03 12:23:54 +00:00
|
|
|
if (desc->irq_data.chip->irq_enable)
|
|
|
|
desc->irq_data.chip->irq_enable(&desc->irq_data);
|
|
|
|
else
|
|
|
|
desc->irq_data.chip->irq_unmask(&desc->irq_data);
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_clr_masked(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
|
|
|
|
2013-05-10 10:21:30 +00:00
|
|
|
/**
|
2013-10-18 01:12:04 +00:00
|
|
|
* irq_disable - Mark interrupt disabled
|
2013-05-10 10:21:30 +00:00
|
|
|
* @desc: irq descriptor which should be disabled
|
|
|
|
*
|
|
|
|
* If the chip does not implement the irq_disable callback, we
|
|
|
|
* use a lazy disable approach. That means we mark the interrupt
|
|
|
|
* disabled, but leave the hardware unmasked. That's an
|
|
|
|
* optimization because we avoid the hardware access for the
|
|
|
|
* common case where no interrupt happens after we marked it
|
|
|
|
* disabled. If an interrupt happens, then the interrupt flow
|
|
|
|
* handler masks the line at the hardware level and marks it
|
|
|
|
* pending.
|
|
|
|
*/
|
2011-02-03 12:23:54 +00:00
|
|
|
void irq_disable(struct irq_desc *desc)
|
2008-02-18 17:25:17 +00:00
|
|
|
{
|
2011-02-07 21:11:30 +00:00
|
|
|
irq_state_set_disabled(desc);
|
2011-02-03 12:23:54 +00:00
|
|
|
if (desc->irq_data.chip->irq_disable) {
|
|
|
|
desc->irq_data.chip->irq_disable(&desc->irq_data);
|
2011-02-21 11:54:34 +00:00
|
|
|
irq_state_set_masked(desc);
|
2011-02-03 12:23:54 +00:00
|
|
|
}
|
2008-02-18 17:25:17 +00:00
|
|
|
}
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
|
|
|
|
{
|
|
|
|
if (desc->irq_data.chip->irq_enable)
|
|
|
|
desc->irq_data.chip->irq_enable(&desc->irq_data);
|
|
|
|
else
|
|
|
|
desc->irq_data.chip->irq_unmask(&desc->irq_data);
|
|
|
|
cpumask_set_cpu(cpu, desc->percpu_enabled);
|
|
|
|
}
|
|
|
|
|
|
|
|
void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
|
|
|
|
{
|
|
|
|
if (desc->irq_data.chip->irq_disable)
|
|
|
|
desc->irq_data.chip->irq_disable(&desc->irq_data);
|
|
|
|
else
|
|
|
|
desc->irq_data.chip->irq_mask(&desc->irq_data);
|
|
|
|
cpumask_clear_cpu(cpu, desc->percpu_enabled);
|
|
|
|
}
|
|
|
|
|
2010-09-27 12:44:50 +00:00
|
|
|
static inline void mask_ack_irq(struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2010-09-27 12:44:50 +00:00
|
|
|
if (desc->irq_data.chip->irq_mask_ack)
|
|
|
|
desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
|
2006-06-29 09:24:53 +00:00
|
|
|
else {
|
2010-09-27 12:44:42 +00:00
|
|
|
desc->irq_data.chip->irq_mask(&desc->irq_data);
|
2010-09-27 12:44:47 +00:00
|
|
|
if (desc->irq_data.chip->irq_ack)
|
|
|
|
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_set_masked(desc);
|
2010-03-09 18:45:54 +00:00
|
|
|
}
|
|
|
|
|
2011-02-10 12:16:14 +00:00
|
|
|
void mask_irq(struct irq_desc *desc)
|
2010-03-09 18:45:54 +00:00
|
|
|
{
|
2010-09-27 12:44:42 +00:00
|
|
|
if (desc->irq_data.chip->irq_mask) {
|
|
|
|
desc->irq_data.chip->irq_mask(&desc->irq_data);
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_set_masked(desc);
|
2010-03-09 18:45:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-02-10 12:16:14 +00:00
|
|
|
void unmask_irq(struct irq_desc *desc)
|
2010-03-09 18:45:54 +00:00
|
|
|
{
|
2010-09-27 12:44:44 +00:00
|
|
|
if (desc->irq_data.chip->irq_unmask) {
|
|
|
|
desc->irq_data.chip->irq_unmask(&desc->irq_data);
|
2011-02-08 11:36:06 +00:00
|
|
|
irq_state_clr_masked(desc);
|
2010-03-09 18:45:54 +00:00
|
|
|
}
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
|
|
|
|
2014-03-13 18:03:51 +00:00
|
|
|
void unmask_threaded_irq(struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct irq_chip *chip = desc->irq_data.chip;
|
|
|
|
|
|
|
|
if (chip->flags & IRQCHIP_EOI_THREADED)
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
|
|
|
|
if (chip->irq_unmask) {
|
|
|
|
chip->irq_unmask(&desc->irq_data);
|
|
|
|
irq_state_clr_masked(desc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-08-13 11:21:38 +00:00
|
|
|
/*
|
|
|
|
* handle_nested_irq - Handle a nested irq from a irq thread
|
|
|
|
* @irq: the interrupt number
|
|
|
|
*
|
|
|
|
* Handle interrupts which are nested into a threaded interrupt
|
|
|
|
* handler. The handler function is called inside the calling
|
|
|
|
* threads context.
|
|
|
|
*/
|
|
|
|
void handle_nested_irq(unsigned int irq)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
struct irqaction *action;
|
|
|
|
irqreturn_t action_ret;
|
|
|
|
|
|
|
|
might_sleep();
|
|
|
|
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock_irq(&desc->lock);
|
2009-08-13 11:21:38 +00:00
|
|
|
|
2012-10-16 22:07:49 +00:00
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
2009-08-13 11:21:38 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
|
|
|
|
action = desc->action;
|
2012-05-21 16:19:20 +00:00
|
|
|
if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
|
|
|
|
desc->istate |= IRQS_PENDING;
|
2009-08-13 11:21:38 +00:00
|
|
|
goto out_unlock;
|
2012-05-21 16:19:20 +00:00
|
|
|
}
|
2009-08-13 11:21:38 +00:00
|
|
|
|
2011-03-28 12:10:52 +00:00
|
|
|
irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
2009-08-13 11:21:38 +00:00
|
|
|
|
|
|
|
action_ret = action->thread_fn(action->irq, action->dev_id);
|
|
|
|
if (!noirqdebug)
|
|
|
|
note_interrupt(irq, desc, action_ret);
|
|
|
|
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock_irq(&desc->lock);
|
2011-03-28 12:10:52 +00:00
|
|
|
irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
|
2009-08-13 11:21:38 +00:00
|
|
|
|
|
|
|
out_unlock:
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
2009-08-13 11:21:38 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(handle_nested_irq);
|
|
|
|
|
2011-02-07 09:34:30 +00:00
|
|
|
static bool irq_check_poll(struct irq_desc *desc)
|
|
|
|
{
|
2011-02-07 19:55:35 +00:00
|
|
|
if (!(desc->istate & IRQS_POLL_INPROGRESS))
|
2011-02-07 09:34:30 +00:00
|
|
|
return false;
|
|
|
|
return irq_wait_for_poll(desc);
|
|
|
|
}
|
|
|
|
|
2006-06-29 09:24:53 +00:00
|
|
|
/**
|
|
|
|
* handle_simple_irq - Simple and software-decoded IRQs.
|
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Simple interrupts are either sent from a demultiplexing interrupt
|
|
|
|
* handler or come from hardware, where no interrupt hardware control
|
|
|
|
* is necessary.
|
|
|
|
*
|
|
|
|
* Note: The caller is expected to handle the ack, clear, mask and
|
|
|
|
* unmask issues if necessary.
|
|
|
|
*/
|
2008-02-08 12:19:53 +00:00
|
|
|
void
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 13:55:46 +00:00
|
|
|
handle_simple_irq(unsigned int irq, struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-03-28 12:10:52 +00:00
|
|
|
if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
|
2011-02-07 09:34:30 +00:00
|
|
|
if (!irq_check_poll(desc))
|
|
|
|
goto out_unlock;
|
|
|
|
|
2011-02-08 10:39:15 +00:00
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
2008-10-15 13:27:23 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2012-05-21 16:19:20 +00:00
|
|
|
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
|
|
|
|
desc->istate |= IRQS_PENDING;
|
2006-06-29 09:24:53 +00:00
|
|
|
goto out_unlock;
|
2012-05-21 16:19:20 +00:00
|
|
|
}
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-07 00:21:02 +00:00
|
|
|
handle_irq_event(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
out_unlock:
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2011-05-18 09:39:04 +00:00
|
|
|
EXPORT_SYMBOL_GPL(handle_simple_irq);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2012-02-07 16:58:03 +00:00
|
|
|
/*
|
|
|
|
* Called unconditionally from handle_level_irq() and only for oneshot
|
|
|
|
* interrupts from handle_fasteoi_irq()
|
|
|
|
*/
|
|
|
|
static void cond_unmask_irq(struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* We need to unmask in the following cases:
|
|
|
|
* - Standard level irq (IRQF_ONESHOT is not set)
|
|
|
|
* - Oneshot irq which did not wake the thread (caused by a
|
|
|
|
* spurious interrupt or a primary handler handling it
|
|
|
|
* completely).
|
|
|
|
*/
|
|
|
|
if (!irqd_irq_disabled(&desc->irq_data) &&
|
|
|
|
irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
|
|
|
|
unmask_irq(desc);
|
|
|
|
}
|
|
|
|
|
2006-06-29 09:24:53 +00:00
|
|
|
/**
|
|
|
|
* handle_level_irq - Level type irq handler
|
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Level type interrupts are active as long as the hardware line has
|
|
|
|
* the active level. This may require to mask the interrupt and unmask
|
|
|
|
* it after the associated handler has acknowledged the device, so the
|
|
|
|
* interrupt line is back to inactive.
|
|
|
|
*/
|
2008-02-08 12:19:53 +00:00
|
|
|
void
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 13:55:46 +00:00
|
|
|
handle_level_irq(unsigned int irq, struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock(&desc->lock);
|
2010-09-27 12:44:50 +00:00
|
|
|
mask_ack_irq(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-03-28 12:10:52 +00:00
|
|
|
if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
|
2011-02-07 09:34:30 +00:00
|
|
|
if (!irq_check_poll(desc))
|
|
|
|
goto out_unlock;
|
|
|
|
|
2011-02-08 10:39:15 +00:00
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
2008-10-15 13:27:23 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If its disabled or no action available
|
|
|
|
* keep it masked and get out of here
|
|
|
|
*/
|
2012-04-25 10:54:54 +00:00
|
|
|
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
|
|
|
|
desc->istate |= IRQS_PENDING;
|
2006-09-19 09:14:34 +00:00
|
|
|
goto out_unlock;
|
2012-04-25 10:54:54 +00:00
|
|
|
}
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-07 00:22:17 +00:00
|
|
|
handle_irq_event(desc);
|
2009-08-13 10:17:22 +00:00
|
|
|
|
2012-02-07 16:58:03 +00:00
|
|
|
cond_unmask_irq(desc);
|
|
|
|
|
2006-09-19 09:14:34 +00:00
|
|
|
out_unlock:
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2009-01-14 11:34:21 +00:00
|
|
|
EXPORT_SYMBOL_GPL(handle_level_irq);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-10 14:14:20 +00:00
|
|
|
#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
|
|
|
|
static inline void preflow_handler(struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
if (desc->preflow_handler)
|
|
|
|
desc->preflow_handler(&desc->irq_data);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void preflow_handler(struct irq_desc *desc) { }
|
|
|
|
#endif
|
|
|
|
|
2014-03-13 18:03:51 +00:00
|
|
|
static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
|
|
|
|
{
|
|
|
|
if (!(desc->istate & IRQS_ONESHOT)) {
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* We need to unmask in the following cases:
|
|
|
|
* - Oneshot irq which did not wake the thread (caused by a
|
|
|
|
* spurious interrupt or a primary handler handling it
|
|
|
|
* completely).
|
|
|
|
*/
|
|
|
|
if (!irqd_irq_disabled(&desc->irq_data) &&
|
|
|
|
irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
unmask_irq(desc);
|
|
|
|
} else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2006-06-29 09:24:53 +00:00
|
|
|
/**
|
2006-06-29 09:25:03 +00:00
|
|
|
* handle_fasteoi_irq - irq handler for transparent controllers
|
2006-06-29 09:24:53 +00:00
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
2006-06-29 09:25:03 +00:00
|
|
|
* Only a single callback will be issued to the chip: an ->eoi()
|
2006-06-29 09:24:53 +00:00
|
|
|
* call when the interrupt has been serviced. This enables support
|
|
|
|
* for modern forms of interrupt handlers, which handle the flow
|
|
|
|
* details in hardware, transparently.
|
|
|
|
*/
|
2008-02-08 12:19:53 +00:00
|
|
|
void
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 13:55:46 +00:00
|
|
|
handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2014-03-13 18:03:51 +00:00
|
|
|
struct irq_chip *chip = desc->irq_data.chip;
|
|
|
|
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-03-28 12:10:52 +00:00
|
|
|
if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
|
2011-02-07 09:34:30 +00:00
|
|
|
if (!irq_check_poll(desc))
|
|
|
|
goto out;
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-08 10:39:15 +00:00
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
2008-10-15 13:27:23 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If its disabled or no action available
|
2007-02-16 09:28:24 +00:00
|
|
|
* then mask it and get out of here:
|
2006-06-29 09:24:53 +00:00
|
|
|
*/
|
2011-03-28 12:10:52 +00:00
|
|
|
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
|
2011-02-08 11:17:57 +00:00
|
|
|
desc->istate |= IRQS_PENDING;
|
2010-09-27 12:44:42 +00:00
|
|
|
mask_irq(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
goto out;
|
2006-06-29 09:25:01 +00:00
|
|
|
}
|
2011-03-02 10:49:21 +00:00
|
|
|
|
|
|
|
if (desc->istate & IRQS_ONESHOT)
|
|
|
|
mask_irq(desc);
|
|
|
|
|
2011-02-10 14:14:20 +00:00
|
|
|
preflow_handler(desc);
|
2011-02-07 00:23:07 +00:00
|
|
|
handle_irq_event(desc);
|
2011-02-15 09:33:57 +00:00
|
|
|
|
2014-03-13 18:03:51 +00:00
|
|
|
cond_unmask_eoi_irq(desc, chip);
|
2012-02-07 16:58:03 +00:00
|
|
|
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2011-02-15 09:33:57 +00:00
|
|
|
return;
|
|
|
|
out:
|
2014-03-13 18:03:51 +00:00
|
|
|
if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
raw_spin_unlock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* handle_edge_irq - edge type IRQ handler
|
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Interrupt occures on the falling and/or rising edge of a hardware
|
2011-03-31 01:57:33 +00:00
|
|
|
* signal. The occurrence is latched into the irq controller hardware
|
2006-06-29 09:24:53 +00:00
|
|
|
* and must be acked in order to be reenabled. After the ack another
|
|
|
|
* interrupt can happen on the same source even before the first one
|
2010-02-12 20:58:11 +00:00
|
|
|
* is handled by the associated event handler. If this happens it
|
2006-06-29 09:24:53 +00:00
|
|
|
* might be necessary to disable (mask) the interrupt depending on the
|
|
|
|
* controller hardware. This requires to reenable the interrupt inside
|
|
|
|
* of the loop which handles the interrupts which have arrived while
|
|
|
|
* the handler was running. If all pending interrupts are handled, the
|
|
|
|
* loop is left.
|
|
|
|
*/
|
2008-02-08 12:19:53 +00:00
|
|
|
void
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 13:55:46 +00:00
|
|
|
handle_edge_irq(unsigned int irq, struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_lock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-08 10:39:15 +00:00
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
2006-06-29 09:24:53 +00:00
|
|
|
/*
|
|
|
|
* If we're currently running this IRQ, or its disabled,
|
|
|
|
* we shouldn't process the IRQ. Mark it pending, handle
|
|
|
|
* the necessary masking and go out
|
|
|
|
*/
|
2011-03-28 12:10:52 +00:00
|
|
|
if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
|
|
|
|
irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
|
2011-02-07 09:34:30 +00:00
|
|
|
if (!irq_check_poll(desc)) {
|
2011-02-08 11:17:57 +00:00
|
|
|
desc->istate |= IRQS_PENDING;
|
2011-02-07 09:34:30 +00:00
|
|
|
mask_ack_irq(desc);
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2008-10-15 13:27:23 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
/* Start handling the irq */
|
2010-09-27 12:44:47 +00:00
|
|
|
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
do {
|
2011-02-07 00:24:07 +00:00
|
|
|
if (unlikely(!desc->action)) {
|
2010-09-27 12:44:42 +00:00
|
|
|
mask_irq(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* When another irq arrived while we were handling
|
|
|
|
* one, we could have masked the irq.
|
|
|
|
* Renable it, if it was not disabled in meantime.
|
|
|
|
*/
|
2011-02-08 11:17:57 +00:00
|
|
|
if (unlikely(desc->istate & IRQS_PENDING)) {
|
2011-03-28 12:10:52 +00:00
|
|
|
if (!irqd_irq_disabled(&desc->irq_data) &&
|
|
|
|
irqd_irq_masked(&desc->irq_data))
|
2011-02-07 21:11:30 +00:00
|
|
|
unmask_irq(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
|
|
|
|
2011-02-07 00:24:07 +00:00
|
|
|
handle_irq_event(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-08 11:17:57 +00:00
|
|
|
} while ((desc->istate & IRQS_PENDING) &&
|
2011-03-28 12:10:52 +00:00
|
|
|
!irqd_irq_disabled(&desc->irq_data));
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
out_unlock:
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2012-05-13 10:13:15 +00:00
|
|
|
EXPORT_SYMBOL(handle_edge_irq);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-03-28 14:13:24 +00:00
|
|
|
#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
|
|
|
|
/**
|
|
|
|
* handle_edge_eoi_irq - edge eoi type IRQ handler
|
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Similar as the above handle_edge_irq, but using eoi and w/o the
|
|
|
|
* mask/unmask logic.
|
|
|
|
*/
|
|
|
|
void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct irq_chip *chip = irq_desc_get_chip(desc);
|
|
|
|
|
|
|
|
raw_spin_lock(&desc->lock);
|
|
|
|
|
|
|
|
desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
|
|
|
|
/*
|
|
|
|
* If we're currently running this IRQ, or its disabled,
|
|
|
|
* we shouldn't process the IRQ. Mark it pending, handle
|
|
|
|
* the necessary masking and go out
|
|
|
|
*/
|
|
|
|
if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
|
|
|
|
irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
|
|
|
|
if (!irq_check_poll(desc)) {
|
|
|
|
desc->istate |= IRQS_PENDING;
|
|
|
|
goto out_eoi;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
|
|
|
|
do {
|
|
|
|
if (unlikely(!desc->action))
|
|
|
|
goto out_eoi;
|
|
|
|
|
|
|
|
handle_irq_event(desc);
|
|
|
|
|
|
|
|
} while ((desc->istate & IRQS_PENDING) &&
|
|
|
|
!irqd_irq_disabled(&desc->irq_data));
|
|
|
|
|
2011-03-29 23:55:12 +00:00
|
|
|
out_eoi:
|
2011-03-28 14:13:24 +00:00
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
raw_spin_unlock(&desc->lock);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2006-06-29 09:24:53 +00:00
|
|
|
/**
|
2009-11-04 12:11:05 +00:00
|
|
|
* handle_percpu_irq - Per CPU local irq handler
|
2006-06-29 09:24:53 +00:00
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Per CPU interrupts on SMP machines without locking requirements
|
|
|
|
*/
|
2008-02-08 12:19:53 +00:00
|
|
|
void
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 13:55:46 +00:00
|
|
|
handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2011-02-10 11:20:23 +00:00
|
|
|
struct irq_chip *chip = irq_desc_get_chip(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2008-10-15 13:27:23 +00:00
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-07 00:25:41 +00:00
|
|
|
if (chip->irq_ack)
|
|
|
|
chip->irq_ack(&desc->irq_data);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-07 00:25:41 +00:00
|
|
|
handle_irq_event_percpu(desc, desc->action);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-07 00:25:41 +00:00
|
|
|
if (chip->irq_eoi)
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
/**
|
|
|
|
* handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
|
|
|
|
* @irq: the interrupt number
|
|
|
|
* @desc: the interrupt description structure for this irq
|
|
|
|
*
|
|
|
|
* Per CPU interrupts on SMP machines without locking requirements. Same as
|
|
|
|
* handle_percpu_irq() above but with the following extras:
|
|
|
|
*
|
|
|
|
* action->percpu_dev_id is a pointer to percpu variables which
|
|
|
|
* contain the real device id for the cpu on which this handler is
|
|
|
|
* called
|
|
|
|
*/
|
|
|
|
void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct irq_chip *chip = irq_desc_get_chip(desc);
|
|
|
|
struct irqaction *action = desc->action;
|
|
|
|
void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
|
|
|
|
irqreturn_t res;
|
|
|
|
|
|
|
|
kstat_incr_irqs_this_cpu(irq, desc);
|
|
|
|
|
|
|
|
if (chip->irq_ack)
|
|
|
|
chip->irq_ack(&desc->irq_data);
|
|
|
|
|
|
|
|
trace_irq_handler_entry(irq, action);
|
|
|
|
res = action->handler(irq, dev_id);
|
|
|
|
trace_irq_handler_exit(irq, action, res);
|
|
|
|
|
|
|
|
if (chip->irq_eoi)
|
|
|
|
chip->irq_eoi(&desc->irq_data);
|
|
|
|
}
|
|
|
|
|
2006-06-29 09:24:53 +00:00
|
|
|
void
|
2011-02-14 19:09:19 +00:00
|
|
|
__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
|
2006-10-17 07:10:03 +00:00
|
|
|
const char *name)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
2011-02-12 09:37:36 +00:00
|
|
|
if (!desc)
|
2006-06-29 09:24:53 +00:00
|
|
|
return;
|
|
|
|
|
2011-02-14 19:16:43 +00:00
|
|
|
if (!handle) {
|
2006-06-29 09:24:53 +00:00
|
|
|
handle = handle_bad_irq;
|
2011-02-14 19:16:43 +00:00
|
|
|
} else {
|
|
|
|
if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
|
2011-02-12 09:37:36 +00:00
|
|
|
goto out;
|
2006-07-01 21:30:08 +00:00
|
|
|
}
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
/* Uninstall? */
|
|
|
|
if (handle == handle_bad_irq) {
|
2010-10-01 10:58:38 +00:00
|
|
|
if (desc->irq_data.chip != &no_irq_chip)
|
2010-09-27 12:44:50 +00:00
|
|
|
mask_ack_irq(desc);
|
2011-03-27 09:02:49 +00:00
|
|
|
irq_state_set_disabled(desc);
|
2006-06-29 09:24:53 +00:00
|
|
|
desc->depth = 1;
|
|
|
|
}
|
|
|
|
desc->handle_irq = handle;
|
2006-10-17 07:10:03 +00:00
|
|
|
desc->name = name;
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
if (handle != handle_bad_irq && is_chained) {
|
2011-02-09 13:44:17 +00:00
|
|
|
irq_settings_set_noprobe(desc);
|
|
|
|
irq_settings_set_norequest(desc);
|
2011-04-06 21:01:44 +00:00
|
|
|
irq_settings_set_nothread(desc);
|
2012-02-08 10:57:52 +00:00
|
|
|
irq_startup(desc, true);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2011-02-12 09:37:36 +00:00
|
|
|
out:
|
|
|
|
irq_put_desc_busunlock(desc, flags);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2011-02-14 19:09:19 +00:00
|
|
|
EXPORT_SYMBOL_GPL(__irq_set_handler);
|
2006-06-29 09:24:53 +00:00
|
|
|
|
|
|
|
void
|
2011-02-14 19:09:19 +00:00
|
|
|
irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
|
2006-10-17 07:10:03 +00:00
|
|
|
irq_flow_handler_t handle, const char *name)
|
2006-06-29 09:24:53 +00:00
|
|
|
{
|
2011-02-10 11:20:23 +00:00
|
|
|
irq_set_chip(irq, chip);
|
2011-02-14 19:09:19 +00:00
|
|
|
__irq_set_handler(irq, handle, 0, name);
|
2006-06-29 09:24:53 +00:00
|
|
|
}
|
2012-07-31 05:39:06 +00:00
|
|
|
EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
|
2008-02-08 12:22:01 +00:00
|
|
|
|
2010-09-28 08:40:18 +00:00
|
|
|
void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
|
2008-02-08 12:22:01 +00:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 16:03:06 +00:00
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
2008-02-08 12:22:01 +00:00
|
|
|
|
2010-09-28 08:40:18 +00:00
|
|
|
if (!desc)
|
2008-02-08 12:22:01 +00:00
|
|
|
return;
|
2011-02-08 16:11:03 +00:00
|
|
|
irq_settings_clr_and_set(desc, clr, set);
|
|
|
|
|
2011-02-08 16:28:12 +00:00
|
|
|
irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
|
2011-02-10 21:25:31 +00:00
|
|
|
IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
|
2011-02-08 16:11:03 +00:00
|
|
|
if (irq_settings_has_no_balance_set(desc))
|
|
|
|
irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
|
|
|
|
if (irq_settings_is_per_cpu(desc))
|
|
|
|
irqd_set(&desc->irq_data, IRQD_PER_CPU);
|
2011-02-10 21:25:31 +00:00
|
|
|
if (irq_settings_can_move_pcntxt(desc))
|
|
|
|
irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
|
2011-03-28 19:59:37 +00:00
|
|
|
if (irq_settings_is_level(desc))
|
|
|
|
irqd_set(&desc->irq_data, IRQD_LEVEL);
|
2011-02-08 16:11:03 +00:00
|
|
|
|
2011-02-08 16:28:12 +00:00
|
|
|
irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
|
|
|
|
|
2011-02-12 09:37:36 +00:00
|
|
|
irq_put_desc_unlock(desc, flags);
|
2008-02-08 12:22:01 +00:00
|
|
|
}
|
2011-05-18 09:39:04 +00:00
|
|
|
EXPORT_SYMBOL_GPL(irq_modify_status);
|
2011-03-25 19:38:49 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_cpu_online - Invoke all irq_cpu_online functions.
|
|
|
|
*
|
|
|
|
* Iterate through all irqs and invoke the chip.irq_cpu_online()
|
|
|
|
* for each.
|
|
|
|
*/
|
|
|
|
void irq_cpu_online(void)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned int irq;
|
|
|
|
|
|
|
|
for_each_active_irq(irq) {
|
|
|
|
desc = irq_to_desc(irq);
|
|
|
|
if (!desc)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
|
|
|
|
chip = irq_data_get_irq_chip(&desc->irq_data);
|
2011-03-27 14:05:36 +00:00
|
|
|
if (chip && chip->irq_cpu_online &&
|
|
|
|
(!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
|
2011-03-28 12:10:52 +00:00
|
|
|
!irqd_irq_disabled(&desc->irq_data)))
|
2011-03-25 19:38:49 +00:00
|
|
|
chip->irq_cpu_online(&desc->irq_data);
|
|
|
|
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_cpu_offline - Invoke all irq_cpu_offline functions.
|
|
|
|
*
|
|
|
|
* Iterate through all irqs and invoke the chip.irq_cpu_offline()
|
|
|
|
* for each.
|
|
|
|
*/
|
|
|
|
void irq_cpu_offline(void)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned int irq;
|
|
|
|
|
|
|
|
for_each_active_irq(irq) {
|
|
|
|
desc = irq_to_desc(irq);
|
|
|
|
if (!desc)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
|
|
|
|
chip = irq_data_get_irq_chip(&desc->irq_data);
|
2011-03-27 14:05:36 +00:00
|
|
|
if (chip && chip->irq_cpu_offline &&
|
|
|
|
(!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
|
2011-03-28 12:10:52 +00:00
|
|
|
!irqd_irq_disabled(&desc->irq_data)))
|
2011-03-25 19:38:49 +00:00
|
|
|
chip->irq_cpu_offline(&desc->irq_data);
|
|
|
|
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
}
|
|
|
|
}
|