ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 14:58:08 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018, Intel Corporation. */
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#include "ice_sched.h"
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2018-03-20 14:58:09 +00:00
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/**
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* ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
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* @pi: port information structure
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* @info: Scheduler element information from firmware
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*
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* This function inserts the root node of the scheduling tree topology
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* to the SW DB.
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*/
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static enum ice_status
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ice_sched_add_root_node(struct ice_port_info *pi,
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struct ice_aqc_txsched_elem_data *info)
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{
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struct ice_sched_node *root;
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struct ice_hw *hw;
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u16 max_children;
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if (!pi)
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return ICE_ERR_PARAM;
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hw = pi->hw;
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root = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*root), GFP_KERNEL);
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if (!root)
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return ICE_ERR_NO_MEMORY;
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max_children = le16_to_cpu(hw->layer_info[0].max_children);
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root->children = devm_kcalloc(ice_hw_to_dev(hw), max_children,
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sizeof(*root), GFP_KERNEL);
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if (!root->children) {
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devm_kfree(ice_hw_to_dev(hw), root);
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return ICE_ERR_NO_MEMORY;
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}
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memcpy(&root->info, info, sizeof(*info));
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pi->root = root;
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return 0;
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}
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/**
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* ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
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* @start_node: pointer to the starting ice_sched_node struct in a sub-tree
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* @teid: node teid to search
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*
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* This function searches for a node matching the teid in the scheduling tree
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* from the SW DB. The search is recursive and is restricted by the number of
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* layers it has searched through; stopping at the max supported layer.
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*
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* This function needs to be called when holding the port_info->sched_lock
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*/
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struct ice_sched_node *
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ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
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{
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u16 i;
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/* The TEID is same as that of the start_node */
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if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
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return start_node;
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/* The node has no children or is at the max layer */
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if (!start_node->num_children ||
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start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
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start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
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return NULL;
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/* Check if teid matches to any of the children nodes */
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for (i = 0; i < start_node->num_children; i++)
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if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
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return start_node->children[i];
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/* Search within each child's sub-tree */
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for (i = 0; i < start_node->num_children; i++) {
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struct ice_sched_node *tmp;
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tmp = ice_sched_find_node_by_teid(start_node->children[i],
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teid);
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if (tmp)
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return tmp;
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}
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return NULL;
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}
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/**
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* ice_sched_add_node - Insert the Tx scheduler node in SW DB
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* @pi: port information structure
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* @layer: Scheduler layer of the node
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* @info: Scheduler element information from firmware
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*
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* This function inserts a scheduler node to the SW DB.
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*/
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enum ice_status
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ice_sched_add_node(struct ice_port_info *pi, u8 layer,
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struct ice_aqc_txsched_elem_data *info)
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{
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struct ice_sched_node *parent;
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struct ice_sched_node *node;
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struct ice_hw *hw;
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u16 max_children;
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if (!pi)
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return ICE_ERR_PARAM;
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hw = pi->hw;
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/* A valid parent node should be there */
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parent = ice_sched_find_node_by_teid(pi->root,
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le32_to_cpu(info->parent_teid));
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if (!parent) {
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ice_debug(hw, ICE_DBG_SCHED,
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"Parent Node not found for parent_teid=0x%x\n",
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le32_to_cpu(info->parent_teid));
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return ICE_ERR_PARAM;
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}
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node = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*node), GFP_KERNEL);
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if (!node)
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return ICE_ERR_NO_MEMORY;
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max_children = le16_to_cpu(hw->layer_info[layer].max_children);
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if (max_children) {
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node->children = devm_kcalloc(ice_hw_to_dev(hw), max_children,
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sizeof(*node), GFP_KERNEL);
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if (!node->children) {
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devm_kfree(ice_hw_to_dev(hw), node);
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return ICE_ERR_NO_MEMORY;
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}
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}
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node->in_use = true;
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node->parent = parent;
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node->tx_sched_layer = layer;
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parent->children[parent->num_children++] = node;
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memcpy(&node->info, info, sizeof(*info));
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return 0;
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}
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ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 14:58:08 +00:00
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/**
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* ice_aq_delete_sched_elems - delete scheduler elements
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* @hw: pointer to the hw struct
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* @grps_req: number of groups to delete
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* @buf: pointer to buffer
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* @buf_size: buffer size in bytes
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* @grps_del: returns total number of elements deleted
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* @cd: pointer to command details structure or NULL
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*
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* Delete scheduling elements (0x040F)
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*/
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static enum ice_status
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ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
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struct ice_aqc_delete_elem *buf, u16 buf_size,
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u16 *grps_del, struct ice_sq_cd *cd)
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{
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struct ice_aqc_add_move_delete_elem *cmd;
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struct ice_aq_desc desc;
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enum ice_status status;
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cmd = &desc.params.add_move_delete_elem;
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ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_delete_sched_elems);
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desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
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cmd->num_grps_req = cpu_to_le16(grps_req);
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status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
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if (!status && grps_del)
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*grps_del = le16_to_cpu(cmd->num_grps_updated);
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return status;
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}
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/**
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* ice_sched_remove_elems - remove nodes from hw
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* @hw: pointer to the hw struct
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* @parent: pointer to the parent node
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* @num_nodes: number of nodes
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* @node_teids: array of node teids to be deleted
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*
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* This function remove nodes from hw
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*/
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static enum ice_status
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ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
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u16 num_nodes, u32 *node_teids)
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{
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struct ice_aqc_delete_elem *buf;
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u16 i, num_groups_removed = 0;
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enum ice_status status;
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u16 buf_size;
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buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
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buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL);
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if (!buf)
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return ICE_ERR_NO_MEMORY;
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buf->hdr.parent_teid = parent->info.node_teid;
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buf->hdr.num_elems = cpu_to_le16(num_nodes);
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for (i = 0; i < num_nodes; i++)
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buf->teid[i] = cpu_to_le32(node_teids[i]);
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status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
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&num_groups_removed, NULL);
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if (status || num_groups_removed != 1)
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ice_debug(hw, ICE_DBG_SCHED, "remove elements failed\n");
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devm_kfree(ice_hw_to_dev(hw), buf);
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return status;
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}
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/**
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* ice_sched_get_first_node - get the first node of the given layer
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* @hw: pointer to the hw struct
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* @parent: pointer the base node of the subtree
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* @layer: layer number
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*
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* This function retrieves the first node of the given layer from the subtree
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*/
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static struct ice_sched_node *
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ice_sched_get_first_node(struct ice_hw *hw, struct ice_sched_node *parent,
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u8 layer)
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{
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u8 i;
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if (layer < hw->sw_entry_point_layer)
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return NULL;
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for (i = 0; i < parent->num_children; i++) {
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struct ice_sched_node *node = parent->children[i];
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if (node) {
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if (node->tx_sched_layer == layer)
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return node;
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/* this recursion is intentional, and wouldn't
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* go more than 9 calls
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*/
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return ice_sched_get_first_node(hw, node, layer);
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}
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}
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return NULL;
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}
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/**
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* ice_sched_get_tc_node - get pointer to TC node
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* @pi: port information structure
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* @tc: TC number
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*
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* This function returns the TC node pointer
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*/
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struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
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{
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u8 i;
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if (!pi)
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return NULL;
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for (i = 0; i < pi->root->num_children; i++)
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if (pi->root->children[i]->tc_num == tc)
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return pi->root->children[i];
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return NULL;
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}
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/**
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* ice_free_sched_node - Free a Tx scheduler node from SW DB
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* @pi: port information structure
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* @node: pointer to the ice_sched_node struct
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*
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* This function frees up a node from SW DB as well as from HW
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*
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* This function needs to be called with the port_info->sched_lock held
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*/
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void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
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{
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struct ice_sched_node *parent;
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struct ice_hw *hw = pi->hw;
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u8 i, j;
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/* Free the children before freeing up the parent node
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* The parent array is updated below and that shifts the nodes
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* in the array. So always pick the first child if num children > 0
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*/
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while (node->num_children)
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ice_free_sched_node(pi, node->children[0]);
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/* Leaf, TC and root nodes can't be deleted by SW */
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if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
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node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
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node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
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node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
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u32 teid = le32_to_cpu(node->info.node_teid);
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enum ice_status status;
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status = ice_sched_remove_elems(hw, node->parent, 1, &teid);
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if (status)
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ice_debug(hw, ICE_DBG_SCHED,
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"remove element failed %d\n", status);
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}
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parent = node->parent;
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/* root has no parent */
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if (parent) {
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struct ice_sched_node *p, *tc_node;
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/* update the parent */
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for (i = 0; i < parent->num_children; i++)
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if (parent->children[i] == node) {
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for (j = i + 1; j < parent->num_children; j++)
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parent->children[j - 1] =
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parent->children[j];
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parent->num_children--;
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break;
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}
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/* search for previous sibling that points to this node and
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* remove the reference
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*/
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tc_node = ice_sched_get_tc_node(pi, node->tc_num);
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if (!tc_node) {
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ice_debug(hw, ICE_DBG_SCHED,
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"Invalid TC number %d\n", node->tc_num);
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goto err_exit;
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}
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p = ice_sched_get_first_node(hw, tc_node, node->tx_sched_layer);
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while (p) {
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if (p->sibling == node) {
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p->sibling = node->sibling;
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break;
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}
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p = p->sibling;
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}
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}
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|
err_exit:
|
|
|
|
/* leaf nodes have no children */
|
|
|
|
if (node->children)
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), node->children);
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), node);
|
|
|
|
}
|
|
|
|
|
2018-03-20 14:58:09 +00:00
|
|
|
/**
|
|
|
|
* ice_aq_get_dflt_topo - gets default scheduler topology
|
|
|
|
* @hw: pointer to the hw struct
|
|
|
|
* @lport: logical port number
|
|
|
|
* @buf: pointer to buffer
|
|
|
|
* @buf_size: buffer size in bytes
|
|
|
|
* @num_branches: returns total number of queue to port branches
|
|
|
|
* @cd: pointer to command details structure or NULL
|
|
|
|
*
|
|
|
|
* Get default scheduler topology (0x400)
|
|
|
|
*/
|
|
|
|
static enum ice_status
|
|
|
|
ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
|
|
|
|
struct ice_aqc_get_topo_elem *buf, u16 buf_size,
|
|
|
|
u8 *num_branches, struct ice_sq_cd *cd)
|
|
|
|
{
|
|
|
|
struct ice_aqc_get_topo *cmd;
|
|
|
|
struct ice_aq_desc desc;
|
|
|
|
enum ice_status status;
|
|
|
|
|
|
|
|
cmd = &desc.params.get_topo;
|
|
|
|
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
|
|
|
|
cmd->port_num = lport;
|
|
|
|
status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
|
|
|
|
if (!status && num_branches)
|
|
|
|
*num_branches = cmd->num_branches;
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 14:58:08 +00:00
|
|
|
/**
|
|
|
|
* ice_aq_query_sched_res - query scheduler resource
|
|
|
|
* @hw: pointer to the hw struct
|
|
|
|
* @buf_size: buffer size in bytes
|
|
|
|
* @buf: pointer to buffer
|
|
|
|
* @cd: pointer to command details structure or NULL
|
|
|
|
*
|
|
|
|
* Query scheduler resource allocation (0x0412)
|
|
|
|
*/
|
|
|
|
static enum ice_status
|
|
|
|
ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
|
|
|
|
struct ice_aqc_query_txsched_res_resp *buf,
|
|
|
|
struct ice_sq_cd *cd)
|
|
|
|
{
|
|
|
|
struct ice_aq_desc desc;
|
|
|
|
|
|
|
|
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
|
|
|
|
return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_clear_tx_topo - clears the schduler tree nodes
|
|
|
|
* @pi: port information structure
|
|
|
|
*
|
|
|
|
* This function removes all the nodes from HW as well as from SW DB.
|
|
|
|
*/
|
|
|
|
static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
|
|
|
|
{
|
|
|
|
struct ice_sched_agg_info *agg_info;
|
|
|
|
struct ice_sched_vsi_info *vsi_elem;
|
|
|
|
struct ice_sched_agg_info *atmp;
|
|
|
|
struct ice_sched_vsi_info *tmp;
|
|
|
|
struct ice_hw *hw;
|
|
|
|
|
|
|
|
if (!pi)
|
|
|
|
return;
|
|
|
|
|
|
|
|
hw = pi->hw;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(agg_info, atmp, &pi->agg_list, list_entry) {
|
|
|
|
struct ice_sched_agg_vsi_info *agg_vsi_info;
|
|
|
|
struct ice_sched_agg_vsi_info *vtmp;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(agg_vsi_info, vtmp,
|
|
|
|
&agg_info->agg_vsi_list, list_entry) {
|
|
|
|
list_del(&agg_vsi_info->list_entry);
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), agg_vsi_info);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* remove the vsi list */
|
|
|
|
list_for_each_entry_safe(vsi_elem, tmp, &pi->vsi_info_list,
|
|
|
|
list_entry) {
|
|
|
|
list_del(&vsi_elem->list_entry);
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), vsi_elem);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pi->root) {
|
|
|
|
ice_free_sched_node(pi, pi->root);
|
|
|
|
pi->root = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_clear_port - clear the scheduler elements from SW DB for a port
|
|
|
|
* @pi: port information structure
|
|
|
|
*
|
|
|
|
* Cleanup scheduling elements from SW DB
|
|
|
|
*/
|
|
|
|
static void ice_sched_clear_port(struct ice_port_info *pi)
|
|
|
|
{
|
|
|
|
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
|
|
|
|
return;
|
|
|
|
|
|
|
|
pi->port_state = ICE_SCHED_PORT_STATE_INIT;
|
|
|
|
mutex_lock(&pi->sched_lock);
|
|
|
|
ice_sched_clear_tx_topo(pi);
|
|
|
|
mutex_unlock(&pi->sched_lock);
|
|
|
|
mutex_destroy(&pi->sched_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
|
|
|
|
* @hw: pointer to the hw struct
|
|
|
|
*
|
|
|
|
* Cleanup scheduling elements from SW DB for all the ports
|
|
|
|
*/
|
|
|
|
void ice_sched_cleanup_all(struct ice_hw *hw)
|
|
|
|
{
|
|
|
|
if (!hw || !hw->port_info)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (hw->layer_info)
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), hw->layer_info);
|
|
|
|
|
|
|
|
ice_sched_clear_port(hw->port_info);
|
|
|
|
|
|
|
|
hw->num_tx_sched_layers = 0;
|
|
|
|
hw->num_tx_sched_phys_layers = 0;
|
|
|
|
hw->flattened_layers = 0;
|
|
|
|
hw->max_cgds = 0;
|
|
|
|
}
|
|
|
|
|
2018-03-20 14:58:13 +00:00
|
|
|
/**
|
|
|
|
* ice_sched_get_qgrp_layer - get the current queue group layer number
|
|
|
|
* @hw: pointer to the hw struct
|
|
|
|
*
|
|
|
|
* This function returns the current queue group layer number
|
|
|
|
*/
|
|
|
|
static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
|
|
|
|
{
|
|
|
|
/* It's always total layers - 1, the array is 0 relative so -2 */
|
|
|
|
return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
|
|
|
|
}
|
|
|
|
|
2018-03-20 14:58:09 +00:00
|
|
|
/**
|
|
|
|
* ice_rm_dflt_leaf_node - remove the default leaf node in the tree
|
|
|
|
* @pi: port information structure
|
|
|
|
*
|
|
|
|
* This function removes the leaf node that was created by the FW
|
|
|
|
* during initialization
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ice_rm_dflt_leaf_node(struct ice_port_info *pi)
|
|
|
|
{
|
|
|
|
struct ice_sched_node *node;
|
|
|
|
|
|
|
|
node = pi->root;
|
|
|
|
while (node) {
|
|
|
|
if (!node->num_children)
|
|
|
|
break;
|
|
|
|
node = node->children[0];
|
|
|
|
}
|
|
|
|
if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
|
|
|
|
u32 teid = le32_to_cpu(node->info.node_teid);
|
|
|
|
enum ice_status status;
|
|
|
|
|
|
|
|
/* remove the default leaf node */
|
|
|
|
status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
|
|
|
|
if (!status)
|
|
|
|
ice_free_sched_node(pi, node);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_rm_dflt_nodes - free the default nodes in the tree
|
|
|
|
* @pi: port information structure
|
|
|
|
*
|
|
|
|
* This function frees all the nodes except root and TC that were created by
|
|
|
|
* the FW during initialization
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
|
|
|
|
{
|
|
|
|
struct ice_sched_node *node;
|
|
|
|
|
|
|
|
ice_rm_dflt_leaf_node(pi);
|
|
|
|
/* remove the default nodes except TC and root nodes */
|
|
|
|
node = pi->root;
|
|
|
|
while (node) {
|
|
|
|
if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
|
|
|
|
node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
|
|
|
|
node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
|
|
|
|
ice_free_sched_node(pi, node);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!node->num_children)
|
|
|
|
break;
|
|
|
|
node = node->children[0];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_init_port - Initialize scheduler by querying information from FW
|
|
|
|
* @pi: port info structure for the tree to cleanup
|
|
|
|
*
|
|
|
|
* This function is the initial call to find the total number of Tx scheduler
|
|
|
|
* resources, default topology created by firmware and storing the information
|
|
|
|
* in SW DB.
|
|
|
|
*/
|
|
|
|
enum ice_status ice_sched_init_port(struct ice_port_info *pi)
|
|
|
|
{
|
|
|
|
struct ice_aqc_get_topo_elem *buf;
|
|
|
|
enum ice_status status;
|
|
|
|
struct ice_hw *hw;
|
|
|
|
u8 num_branches;
|
|
|
|
u16 num_elems;
|
|
|
|
u8 i, j;
|
|
|
|
|
|
|
|
if (!pi)
|
|
|
|
return ICE_ERR_PARAM;
|
|
|
|
hw = pi->hw;
|
|
|
|
|
|
|
|
/* Query the Default Topology from FW */
|
|
|
|
buf = devm_kcalloc(ice_hw_to_dev(hw), ICE_TXSCHED_MAX_BRANCHES,
|
|
|
|
sizeof(*buf), GFP_KERNEL);
|
|
|
|
if (!buf)
|
|
|
|
return ICE_ERR_NO_MEMORY;
|
|
|
|
|
|
|
|
/* Query default scheduling tree topology */
|
|
|
|
status = ice_aq_get_dflt_topo(hw, pi->lport, buf,
|
|
|
|
sizeof(*buf) * ICE_TXSCHED_MAX_BRANCHES,
|
|
|
|
&num_branches, NULL);
|
|
|
|
if (status)
|
|
|
|
goto err_init_port;
|
|
|
|
|
|
|
|
/* num_branches should be between 1-8 */
|
|
|
|
if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
|
|
|
|
ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
|
|
|
|
num_branches);
|
|
|
|
status = ICE_ERR_PARAM;
|
|
|
|
goto err_init_port;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get the number of elements on the default/first branch */
|
|
|
|
num_elems = le16_to_cpu(buf[0].hdr.num_elems);
|
|
|
|
|
|
|
|
/* num_elems should always be between 1-9 */
|
|
|
|
if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
|
|
|
|
ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
|
|
|
|
num_elems);
|
|
|
|
status = ICE_ERR_PARAM;
|
|
|
|
goto err_init_port;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the last node is a leaf node then the index of the Q group
|
|
|
|
* layer is two less than the number of elements.
|
|
|
|
*/
|
|
|
|
if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
|
|
|
|
ICE_AQC_ELEM_TYPE_LEAF)
|
|
|
|
pi->last_node_teid =
|
|
|
|
le32_to_cpu(buf[0].generic[num_elems - 2].node_teid);
|
|
|
|
else
|
|
|
|
pi->last_node_teid =
|
|
|
|
le32_to_cpu(buf[0].generic[num_elems - 1].node_teid);
|
|
|
|
|
|
|
|
/* Insert the Tx Sched root node */
|
|
|
|
status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
|
|
|
|
if (status)
|
|
|
|
goto err_init_port;
|
|
|
|
|
|
|
|
/* Parse the default tree and cache the information */
|
|
|
|
for (i = 0; i < num_branches; i++) {
|
|
|
|
num_elems = le16_to_cpu(buf[i].hdr.num_elems);
|
|
|
|
|
|
|
|
/* Skip root element as already inserted */
|
|
|
|
for (j = 1; j < num_elems; j++) {
|
|
|
|
/* update the sw entry point */
|
|
|
|
if (buf[0].generic[j].data.elem_type ==
|
|
|
|
ICE_AQC_ELEM_TYPE_ENTRY_POINT)
|
|
|
|
hw->sw_entry_point_layer = j;
|
|
|
|
|
|
|
|
status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
|
|
|
|
if (status)
|
|
|
|
goto err_init_port;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Remove the default nodes. */
|
|
|
|
if (pi->root)
|
|
|
|
ice_sched_rm_dflt_nodes(pi);
|
|
|
|
|
|
|
|
/* initialize the port for handling the scheduler tree */
|
|
|
|
pi->port_state = ICE_SCHED_PORT_STATE_READY;
|
|
|
|
mutex_init(&pi->sched_lock);
|
|
|
|
INIT_LIST_HEAD(&pi->agg_list);
|
|
|
|
INIT_LIST_HEAD(&pi->vsi_info_list);
|
|
|
|
|
|
|
|
err_init_port:
|
|
|
|
if (status && pi->root) {
|
|
|
|
ice_free_sched_node(pi, pi->root);
|
|
|
|
pi->root = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), buf);
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
ice: Get switch config, scheduler config and device capabilities
This patch adds to the initialization flow by getting switch
configuration, scheduler configuration and device capabilities.
Switch configuration:
On boot, an L2 switch element is created in the firmware per physical
function. Each physical function is also mapped to a port, to which its
switch element is connected. In other words, this switch can be visualized
as an embedded vSwitch that can connect a physical function's virtual
station interfaces (VSIs) to the egress/ingress port. Egress/ingress
filters will be eventually created and applied on this switch element.
As part of the initialization flow, the driver gets configuration data
from this switch element and stores it.
Scheduler configuration:
The Tx scheduler is a subsystem responsible for setting and enforcing QoS.
As part of the initialization flow, the driver queries and stores the
default scheduler configuration for the given physical function.
Device capabilities:
As part of initialization, the driver has to determine what the device is
capable of (ex. max queues, VSIs, etc). This information is obtained from
the firmware and stored by the driver.
CC: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@oracle.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-20 14:58:08 +00:00
|
|
|
/**
|
|
|
|
* ice_sched_query_res_alloc - query the FW for num of logical sched layers
|
|
|
|
* @hw: pointer to the HW struct
|
|
|
|
*
|
|
|
|
* query FW for allocated scheduler resources and store in HW struct
|
|
|
|
*/
|
|
|
|
enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
|
|
|
|
{
|
|
|
|
struct ice_aqc_query_txsched_res_resp *buf;
|
|
|
|
enum ice_status status = 0;
|
|
|
|
|
|
|
|
if (hw->layer_info)
|
|
|
|
return status;
|
|
|
|
|
|
|
|
buf = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*buf), GFP_KERNEL);
|
|
|
|
if (!buf)
|
|
|
|
return ICE_ERR_NO_MEMORY;
|
|
|
|
|
|
|
|
status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
|
|
|
|
if (status)
|
|
|
|
goto sched_query_out;
|
|
|
|
|
|
|
|
hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels);
|
|
|
|
hw->num_tx_sched_phys_layers =
|
|
|
|
le16_to_cpu(buf->sched_props.phys_levels);
|
|
|
|
hw->flattened_layers = buf->sched_props.flattening_bitmap;
|
|
|
|
hw->max_cgds = buf->sched_props.max_pf_cgds;
|
|
|
|
|
|
|
|
hw->layer_info = devm_kmemdup(ice_hw_to_dev(hw), buf->layer_props,
|
|
|
|
(hw->num_tx_sched_layers *
|
|
|
|
sizeof(*hw->layer_info)),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!hw->layer_info) {
|
|
|
|
status = ICE_ERR_NO_MEMORY;
|
|
|
|
goto sched_query_out;
|
|
|
|
}
|
|
|
|
|
|
|
|
sched_query_out:
|
|
|
|
devm_kfree(ice_hw_to_dev(hw), buf);
|
|
|
|
return status;
|
|
|
|
}
|
2018-03-20 14:58:13 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_get_vsi_info_entry - Get the vsi entry list for given vsi_id
|
|
|
|
* @pi: port information structure
|
|
|
|
* @vsi_id: vsi id
|
|
|
|
*
|
|
|
|
* This function retrieves the vsi list for the given vsi id
|
|
|
|
*/
|
|
|
|
static struct ice_sched_vsi_info *
|
|
|
|
ice_sched_get_vsi_info_entry(struct ice_port_info *pi, u16 vsi_id)
|
|
|
|
{
|
|
|
|
struct ice_sched_vsi_info *list_elem;
|
|
|
|
|
|
|
|
if (!pi)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
list_for_each_entry(list_elem, &pi->vsi_info_list, list_entry)
|
|
|
|
if (list_elem->vsi_id == vsi_id)
|
|
|
|
return list_elem;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
|
|
|
|
* @hw: pointer to the hw struct
|
|
|
|
* @base: pointer to the base node
|
|
|
|
* @node: pointer to the node to search
|
|
|
|
*
|
|
|
|
* This function checks whether a given node is part of the base node
|
|
|
|
* subtree or not
|
|
|
|
*/
|
|
|
|
static bool
|
|
|
|
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
|
|
|
|
struct ice_sched_node *node)
|
|
|
|
{
|
|
|
|
u8 i;
|
|
|
|
|
|
|
|
for (i = 0; i < base->num_children; i++) {
|
|
|
|
struct ice_sched_node *child = base->children[i];
|
|
|
|
|
|
|
|
if (node == child)
|
|
|
|
return true;
|
|
|
|
if (child->tx_sched_layer > node->tx_sched_layer)
|
|
|
|
return false;
|
|
|
|
/* this recursion is intentional, and wouldn't
|
|
|
|
* go more than 8 calls
|
|
|
|
*/
|
|
|
|
if (ice_sched_find_node_in_subtree(hw, child, node))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_sched_get_free_qparent - Get a free lan or rdma q group node
|
|
|
|
* @pi: port information structure
|
|
|
|
* @vsi_id: vsi id
|
|
|
|
* @tc: branch number
|
|
|
|
* @owner: lan or rdma
|
|
|
|
*
|
|
|
|
* This function retrieves a free lan or rdma q group node
|
|
|
|
*/
|
|
|
|
struct ice_sched_node *
|
|
|
|
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_id, u8 tc,
|
|
|
|
u8 owner)
|
|
|
|
{
|
|
|
|
struct ice_sched_node *vsi_node, *qgrp_node = NULL;
|
|
|
|
struct ice_sched_vsi_info *list_elem;
|
|
|
|
u16 max_children;
|
|
|
|
u8 qgrp_layer;
|
|
|
|
|
|
|
|
qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
|
|
|
|
max_children = le16_to_cpu(pi->hw->layer_info[qgrp_layer].max_children);
|
|
|
|
list_elem = ice_sched_get_vsi_info_entry(pi, vsi_id);
|
|
|
|
if (!list_elem)
|
|
|
|
goto lan_q_exit;
|
|
|
|
vsi_node = list_elem->vsi_node[tc];
|
|
|
|
/* validate invalid VSI id */
|
|
|
|
if (!vsi_node)
|
|
|
|
goto lan_q_exit;
|
|
|
|
/* get the first q group node from VSI sub-tree */
|
|
|
|
qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
|
|
|
|
while (qgrp_node) {
|
|
|
|
/* make sure the qgroup node is part of the VSI subtree */
|
|
|
|
if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
|
|
|
|
if (qgrp_node->num_children < max_children &&
|
|
|
|
qgrp_node->owner == owner)
|
|
|
|
break;
|
|
|
|
qgrp_node = qgrp_node->sibling;
|
|
|
|
}
|
|
|
|
lan_q_exit:
|
|
|
|
return qgrp_node;
|
|
|
|
}
|