rtw89: add Realtek 802.11ax driver
This driver named rtw89, which is the next generation of rtw88, supports
Realtek 8852AE 802.11ax 2x2 chip whose new features are OFDMA, DBCC,
Spatial reuse, TWT and BSS coloring; now some of them aren't implemented
though.
The chip architecture is entirely different from the chips supported by
rtw88 like RTL8822CE 802.11ac chip. First of all, register address ranges
are totally redefined, so it's impossible to reuse register definition. To
communicate with firmware, new H2C/C2H format is proposed. In order to have
better utilization, TX DMA flow is changed to two stages DMA. To provide
rich RX status information, additional RX PPDU packets are added.
Since there are so many differences mentioned above, we decide to propose
a new driver. It has many authors, they are listed in alphabetic order:
Chin-Yen Lee <timlee@realtek.com>
Ping-Ke Shih <pkshih@realtek.com>
Po Hao Huang <phhuang@realtek.com>
Tzu-En Huang <tehuang@realtek.com>
Vincent Fann <vincent_fann@realtek.com>
Yan-Hsuan Chuang <tony0620emma@gmail.com>
Zong-Zhe Yang <kevin_yang@realtek.com>
Tested-by: Aaron Ma <aaron.ma@canonical.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20211008035627.19463-1-pkshih@realtek.com
2021-10-11 11:47:27 +00:00
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2019-2020 Realtek Corporation
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*/
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#ifndef __RTW89_CAM_H__
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#define __RTW89_CAM_H__
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#include "core.h"
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#define RTW89_SEC_CAM_LEN 20
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2021-11-19 05:45:12 +00:00
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static inline void FWCMD_SET_ADDR_IDX(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_OFFSET(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_LEN(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_VALID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(0));
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}
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static inline void FWCMD_SET_ADDR_NET_TYPE(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(2, 1));
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}
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static inline void FWCMD_SET_ADDR_BCN_HIT_COND(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(4, 3));
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}
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static inline void FWCMD_SET_ADDR_HIT_RULE(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(6, 5));
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}
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static inline void FWCMD_SET_ADDR_BB_SEL(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(7));
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}
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static inline void FWCMD_SET_ADDR_ADDR_MASK(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(13, 8));
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}
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static inline void FWCMD_SET_ADDR_MASK_SEL(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(15, 14));
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}
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static inline void FWCMD_SET_ADDR_SMA_HASH(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_TMA_HASH(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_BSSID_CAM_IDX(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 3, value, GENMASK(5, 0));
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}
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static inline void FWCMD_SET_ADDR_SMA0(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_SMA1(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_SMA2(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_SMA3(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_SMA4(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_SMA5(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_TMA0(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_TMA1(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_TMA2(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_TMA3(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_TMA4(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_TMA5(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_MACID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_PORT_INT(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(10, 8));
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}
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static inline void FWCMD_SET_ADDR_TSF_SYNC(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(13, 11));
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}
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static inline void FWCMD_SET_ADDR_TF_TRS(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(14));
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}
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static inline void FWCMD_SET_ADDR_LSIG_TXOP(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(15));
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}
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static inline void FWCMD_SET_ADDR_TGT_IND(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(26, 24));
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}
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static inline void FWCMD_SET_ADDR_FRM_TGT_IND(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(29, 27));
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}
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static inline void FWCMD_SET_ADDR_AID12(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 0));
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}
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static inline void FWCMD_SET_ADDR_AID12_0(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_AID12_1(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 8));
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}
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static inline void FWCMD_SET_ADDR_WOL_PATTERN(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(12));
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}
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static inline void FWCMD_SET_ADDR_WOL_UC(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(13));
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}
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static inline void FWCMD_SET_ADDR_WOL_MAGIC(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(14));
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}
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static inline void FWCMD_SET_ADDR_WAPI(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(15));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT_MODE(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(17, 16));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT0_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(19, 18));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT1_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(21, 20));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT2_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(23, 22));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT3_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(25, 24));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT4_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(27, 26));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT5_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(29, 28));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT6_KEYID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(31, 30));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT_VALID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT0(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT1(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT2(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT3(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT4(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT5(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_SEC_ENT6(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_BSSID_IDX(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_BSSID_OFFSET(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_BSSID_LEN(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_BSSID_VALID(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(0));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BB_SEL(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(1));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSS_COLOR(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(13, 8));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID0(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID1(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(31, 24));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID2(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(7, 0));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID3(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(15, 8));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID4(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(23, 16));
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}
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static inline void FWCMD_SET_ADDR_BSSID_BSSID5(void *cmd, u32 value)
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{
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le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(31, 24));
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}
|
rtw89: add Realtek 802.11ax driver
This driver named rtw89, which is the next generation of rtw88, supports
Realtek 8852AE 802.11ax 2x2 chip whose new features are OFDMA, DBCC,
Spatial reuse, TWT and BSS coloring; now some of them aren't implemented
though.
The chip architecture is entirely different from the chips supported by
rtw88 like RTL8822CE 802.11ac chip. First of all, register address ranges
are totally redefined, so it's impossible to reuse register definition. To
communicate with firmware, new H2C/C2H format is proposed. In order to have
better utilization, TX DMA flow is changed to two stages DMA. To provide
rich RX status information, additional RX PPDU packets are added.
Since there are so many differences mentioned above, we decide to propose
a new driver. It has many authors, they are listed in alphabetic order:
Chin-Yen Lee <timlee@realtek.com>
Ping-Ke Shih <pkshih@realtek.com>
Po Hao Huang <phhuang@realtek.com>
Tzu-En Huang <tehuang@realtek.com>
Vincent Fann <vincent_fann@realtek.com>
Yan-Hsuan Chuang <tony0620emma@gmail.com>
Zong-Zhe Yang <kevin_yang@realtek.com>
Tested-by: Aaron Ma <aaron.ma@canonical.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20211008035627.19463-1-pkshih@realtek.com
2021-10-11 11:47:27 +00:00
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|
|
int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *vif);
|
|
|
|
void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *vif);
|
|
|
|
void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev,
|
2021-11-11 02:37:05 +00:00
|
|
|
struct rtw89_vif *vif,
|
2021-12-01 08:06:06 +00:00
|
|
|
struct rtw89_sta *rtwsta,
|
2021-11-11 02:37:05 +00:00
|
|
|
const u8 *scan_mac_addr, u8 *cmd);
|
rtw89: add Realtek 802.11ax driver
This driver named rtw89, which is the next generation of rtw88, supports
Realtek 8852AE 802.11ax 2x2 chip whose new features are OFDMA, DBCC,
Spatial reuse, TWT and BSS coloring; now some of them aren't implemented
though.
The chip architecture is entirely different from the chips supported by
rtw88 like RTL8822CE 802.11ac chip. First of all, register address ranges
are totally redefined, so it's impossible to reuse register definition. To
communicate with firmware, new H2C/C2H format is proposed. In order to have
better utilization, TX DMA flow is changed to two stages DMA. To provide
rich RX status information, additional RX PPDU packets are added.
Since there are so many differences mentioned above, we decide to propose
a new driver. It has many authors, they are listed in alphabetic order:
Chin-Yen Lee <timlee@realtek.com>
Ping-Ke Shih <pkshih@realtek.com>
Po Hao Huang <phhuang@realtek.com>
Tzu-En Huang <tehuang@realtek.com>
Vincent Fann <vincent_fann@realtek.com>
Yan-Hsuan Chuang <tony0620emma@gmail.com>
Zong-Zhe Yang <kevin_yang@realtek.com>
Tested-by: Aaron Ma <aaron.ma@canonical.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20211008035627.19463-1-pkshih@realtek.com
2021-10-11 11:47:27 +00:00
|
|
|
int rtw89_cam_fill_bssid_cam_info(struct rtw89_dev *rtwdev,
|
|
|
|
struct rtw89_vif *vif, u8 *cmd);
|
|
|
|
int rtw89_cam_sec_key_add(struct rtw89_dev *rtwdev,
|
|
|
|
struct ieee80211_vif *vif,
|
|
|
|
struct ieee80211_sta *sta,
|
|
|
|
struct ieee80211_key_conf *key);
|
|
|
|
int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev,
|
|
|
|
struct ieee80211_vif *vif,
|
|
|
|
struct ieee80211_sta *sta,
|
|
|
|
struct ieee80211_key_conf *key,
|
|
|
|
bool inform_fw);
|
|
|
|
void rtw89_cam_bssid_changed(struct rtw89_dev *rtwdev,
|
|
|
|
struct rtw89_vif *rtwvif);
|
|
|
|
void rtw89_cam_reset_keys(struct rtw89_dev *rtwdev);
|
|
|
|
#endif
|