2011-07-22 23:20:08 +00:00
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/*
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* Broadcom specific AMBA
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* System on Chip (SoC) Host
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include "bcma_private.h"
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#include "scan.h"
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#include <linux/bcma/bcma.h>
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#include <linux/bcma/bcma_soc.h>
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static u8 bcma_host_soc_read8(struct bcma_device *core, u16 offset)
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{
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return readb(core->io_addr + offset);
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}
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static u16 bcma_host_soc_read16(struct bcma_device *core, u16 offset)
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{
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return readw(core->io_addr + offset);
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}
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static u32 bcma_host_soc_read32(struct bcma_device *core, u16 offset)
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{
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return readl(core->io_addr + offset);
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}
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static void bcma_host_soc_write8(struct bcma_device *core, u16 offset,
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u8 value)
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{
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writeb(value, core->io_addr + offset);
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}
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static void bcma_host_soc_write16(struct bcma_device *core, u16 offset,
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u16 value)
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{
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writew(value, core->io_addr + offset);
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}
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static void bcma_host_soc_write32(struct bcma_device *core, u16 offset,
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u32 value)
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{
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writel(value, core->io_addr + offset);
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}
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#ifdef CONFIG_BCMA_BLOCKIO
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static void bcma_host_soc_block_read(struct bcma_device *core, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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void __iomem *addr = core->io_addr + offset;
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switch (reg_width) {
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case sizeof(u8): {
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u8 *buf = buffer;
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while (count) {
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*buf = __raw_readb(addr);
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buf++;
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count--;
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}
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break;
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}
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case sizeof(u16): {
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__le16 *buf = buffer;
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WARN_ON(count & 1);
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while (count) {
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*buf = (__force __le16)__raw_readw(addr);
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buf++;
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count -= 2;
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}
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break;
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}
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case sizeof(u32): {
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__le32 *buf = buffer;
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WARN_ON(count & 3);
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while (count) {
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*buf = (__force __le32)__raw_readl(addr);
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buf++;
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count -= 4;
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}
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break;
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}
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default:
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WARN_ON(1);
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}
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}
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static void bcma_host_soc_block_write(struct bcma_device *core,
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const void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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void __iomem *addr = core->io_addr + offset;
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switch (reg_width) {
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case sizeof(u8): {
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const u8 *buf = buffer;
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while (count) {
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__raw_writeb(*buf, addr);
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buf++;
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count--;
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}
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break;
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}
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case sizeof(u16): {
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const __le16 *buf = buffer;
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WARN_ON(count & 1);
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while (count) {
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__raw_writew((__force u16)(*buf), addr);
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buf++;
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count -= 2;
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}
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break;
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}
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case sizeof(u32): {
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const __le32 *buf = buffer;
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WARN_ON(count & 3);
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while (count) {
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__raw_writel((__force u32)(*buf), addr);
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buf++;
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count -= 4;
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}
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break;
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}
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default:
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WARN_ON(1);
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}
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}
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#endif /* CONFIG_BCMA_BLOCKIO */
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static u32 bcma_host_soc_aread32(struct bcma_device *core, u16 offset)
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{
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return readl(core->io_wrap + offset);
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}
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static void bcma_host_soc_awrite32(struct bcma_device *core, u16 offset,
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u32 value)
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{
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writel(value, core->io_wrap + offset);
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}
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2012-08-05 14:54:41 +00:00
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static const struct bcma_host_ops bcma_host_soc_ops = {
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2011-07-22 23:20:08 +00:00
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.read8 = bcma_host_soc_read8,
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.read16 = bcma_host_soc_read16,
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.read32 = bcma_host_soc_read32,
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.write8 = bcma_host_soc_write8,
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.write16 = bcma_host_soc_write16,
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.write32 = bcma_host_soc_write32,
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#ifdef CONFIG_BCMA_BLOCKIO
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.block_read = bcma_host_soc_block_read,
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.block_write = bcma_host_soc_block_write,
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#endif
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.aread32 = bcma_host_soc_aread32,
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.awrite32 = bcma_host_soc_awrite32,
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};
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int __init bcma_host_soc_register(struct bcma_soc *soc)
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{
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struct bcma_bus *bus = &soc->bus;
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int err;
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/* iomap only first core. We have to read some register on this core
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* to scan the bus.
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*/
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bus->mmio = ioremap_nocache(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1);
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if (!bus->mmio)
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return -ENOMEM;
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/* Host specific */
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bus->hosttype = BCMA_HOSTTYPE_SOC;
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bus->ops = &bcma_host_soc_ops;
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/* Register */
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err = bcma_bus_early_register(bus, &soc->core_cc, &soc->core_mips);
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if (err)
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iounmap(bus->mmio);
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return err;
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}
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