2011-10-17 00:42:16 +00:00
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/*
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* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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2012-05-11 05:09:45 +00:00
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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2011-10-17 00:42:16 +00:00
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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2012-09-13 13:01:00 +00:00
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#include "common.h"
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2012-09-14 06:14:45 +00:00
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#include "mx53.h"
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2012-09-13 13:01:00 +00:00
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2011-10-17 00:42:16 +00:00
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/*
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* Lookup table for attaching a specific name and platform_data pointer to
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* devices as they get created by of_platform_populate(). Ideally this table
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* would not exist, but the current clock implementation depends on some devices
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* having a specific name.
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*/
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static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
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OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
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OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
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OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
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OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
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OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
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OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
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OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
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OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
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OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
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OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
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OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
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OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
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2012-09-14 07:19:00 +00:00
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OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
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OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
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OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL),
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2011-10-17 00:42:16 +00:00
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OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
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OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
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{ /* sentinel */ }
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};
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2012-05-11 05:09:45 +00:00
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static void __init imx53_qsb_init(void)
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{
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struct clk *clk;
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clk = clk_get_sys(NULL, "ssi_ext1");
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if (IS_ERR(clk)) {
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pr_err("failed to get clk ssi_ext1\n");
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return;
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}
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clk_register_clkdev(clk, NULL, "0-000a");
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}
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2011-10-17 00:42:16 +00:00
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static void __init imx53_dt_init(void)
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{
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2012-05-11 05:09:45 +00:00
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if (of_machine_is_compatible("fsl,imx53-qsb"))
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imx53_qsb_init();
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2011-10-17 00:42:16 +00:00
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of_platform_populate(NULL, of_default_bus_match_table,
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imx53_auxdata_lookup, NULL);
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}
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static void __init imx53_timer_init(void)
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{
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mx53_clocks_init_dt();
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}
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static struct sys_timer imx53_timer = {
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.init = imx53_timer_init,
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};
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static const char *imx53_dt_board_compat[] __initdata = {
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2012-02-17 11:07:00 +00:00
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"fsl,imx53",
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2011-10-17 00:42:16 +00:00
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NULL
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};
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DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
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.map_io = mx53_map_io,
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.init_early = imx53_init_early,
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.init_irq = mx53_init_irq,
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.handle_irq = imx53_handle_irq,
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.timer = &imx53_timer,
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.init_machine = imx53_dt_init,
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2012-05-21 22:50:27 +00:00
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.init_late = imx53_init_late,
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2011-10-17 00:42:16 +00:00
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.dt_compat = imx53_dt_board_compat,
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2011-11-06 17:12:08 +00:00
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.restart = mxc_restart,
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2011-10-17 00:42:16 +00:00
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MACHINE_END
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