linux/arch/riscv/include/asm/sparsemem.h

/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _ASM_RISCV_SPARSEMEM_H
#define _ASM_RISCV_SPARSEMEM_H

#ifdef CONFIG_SPARSEMEM
#define MAX_PHYSMEM_BITS	CONFIG_PA_BITS
#define SECTION_SIZE_BITS	27
#endif /* CONFIG_SPARSEMEM */

#endif /* _ASM_RISCV_SPARSEMEM_H */
RISC-V: Implement sparsemem Implement sparsemem support for Risc-v which helps pave the way for memory hotplug and eventually P2P support. Introduce Kconfig options for virtual and physical address bits which are used to calculate the size of the vmemmap and set the MAX_PHYSMEM_BITS. The vmemmap is located directly before the VMALLOC region and sized such that we can allocate enough pages to populate all the virtual address space in the system (similar to the way it's done in arm64). During initialization, call memblocks_present() and sparse_init(), and provide a stub for vmemmap_populate() (all of which is similar to arm64). [greentime.hu@sifive.com: fixed pfn_valid, FIXADDR_TOP and fixed a bug rebasing onto v5.3] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Andrew Waterman <andrew@sifive.com> Cc: Olof Johansson <olof@lixom.net> Cc: Michael Clark <michaeljclark@mac.com> Cc: Rob Herring <robh@kernel.org> Cc: Zong Li <zong@andestech.com> Reviewed-by: Mike Rapoport <rppt@linux.ibm.com> [paul.walmsley@sifive.com: updated to apply; minor commit message reformat] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> 2019-08-28 21:40:54 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`

riscv: clean up the macro format in each header file There are many different formats in each header now, such as _ASM_XXX_H, __ASM_XXX_H, _ASM_RISCV_XXX_H, RISCV_XXX_H, etc., This patch tries to unify the format by using _ASM_RISCV_XXX_H, because the most header use it now. This patch also adds the conditional to the headers if they lost it. Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> 2019-10-28 07:42:47 +00:00			`#ifndef _ASM_RISCV_SPARSEMEM_H`
			`#define _ASM_RISCV_SPARSEMEM_H`
RISC-V: Implement sparsemem Implement sparsemem support for Risc-v which helps pave the way for memory hotplug and eventually P2P support. Introduce Kconfig options for virtual and physical address bits which are used to calculate the size of the vmemmap and set the MAX_PHYSMEM_BITS. The vmemmap is located directly before the VMALLOC region and sized such that we can allocate enough pages to populate all the virtual address space in the system (similar to the way it's done in arm64). During initialization, call memblocks_present() and sparse_init(), and provide a stub for vmemmap_populate() (all of which is similar to arm64). [greentime.hu@sifive.com: fixed pfn_valid, FIXADDR_TOP and fixed a bug rebasing onto v5.3] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Andrew Waterman <andrew@sifive.com> Cc: Olof Johansson <olof@lixom.net> Cc: Michael Clark <michaeljclark@mac.com> Cc: Rob Herring <robh@kernel.org> Cc: Zong Li <zong@andestech.com> Reviewed-by: Mike Rapoport <rppt@linux.ibm.com> [paul.walmsley@sifive.com: updated to apply; minor commit message reformat] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> 2019-08-28 21:40:54 +00:00
			`#ifdef CONFIG_SPARSEMEM`
			`#define MAX_PHYSMEM_BITS CONFIG_PA_BITS`
			`#define SECTION_SIZE_BITS 27`
			`#endif /* CONFIG_SPARSEMEM */`

riscv: clean up the macro format in each header file There are many different formats in each header now, such as _ASM_XXX_H, __ASM_XXX_H, _ASM_RISCV_XXX_H, RISCV_XXX_H, etc., This patch tries to unify the format by using _ASM_RISCV_XXX_H, because the most header use it now. This patch also adds the conditional to the headers if they lost it. Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> 2019-10-28 07:42:47 +00:00			`#endif /* _ASM_RISCV_SPARSEMEM_H */`