173 lines
5.8 KiB
C
173 lines
5.8 KiB
C
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/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*/
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#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_EQ_H__
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#define __INCLUDE_UAPI_SOUND_SOF_USER_EQ_H__
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/* FIR EQ type */
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#define SOF_EQ_FIR_IDX_SWITCH 0
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#define SOF_EQ_FIR_MAX_SIZE 4096 /* Max size allowed for coef data in bytes */
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#define SOF_EQ_FIR_MAX_LENGTH 192 /* Max length for individual filter */
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#define SOF_EQ_FIR_MAX_RESPONSES 8 /* A blob can define max 8 FIR EQs */
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/*
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* eq_fir_configuration data structure contains this information
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* uint32_t size
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* This is the number of bytes need to store the received EQ
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* configuration.
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* uint16_t channels_in_config
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* This describes the number of channels in this EQ config data. It
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* can be different from PLATFORM_MAX_CHANNELS.
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* uint16_t number_of_responses
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* 0=no responses, 1=one response defined, 2=two responses defined, etc.
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* int16_t data[]
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* assign_response[channels_in_config]
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* 0 = use first response, 1 = use 2nd response, etc.
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* E.g. {0, 0, 0, 0, 1, 1, 1, 1} would apply to channels 0-3 the
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* same first defined response and for to channels 4-7 the second.
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* coef_data[]
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* Repeated data
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* { filter_length, output_shift, h[] }
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* for every EQ response defined where vector h has filter_length
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* number of coefficients. Coefficients in h[] are in Q1.15 format.
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* E.g. 16384 (Q1.15) = 0.5. The shifts are number of right shifts.
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*
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* NOTE: The channels_in_config must be even to have coef_data aligned to
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* 32 bit word in RAM. Therefore a mono EQ assign must be duplicated to 2ch
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* even if it would never used. Similarly a 5ch EQ assign must be increased
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* to 6ch. EQ init will return an error if this is not met.
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*
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* NOTE: The filter_length must be multiple of four. Therefore the filter must
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* be padded from the end with zeros have this condition met.
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*/
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struct sof_eq_fir_config {
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uint32_t size;
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uint16_t channels_in_config;
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uint16_t number_of_responses;
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/* reserved */
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uint32_t reserved[4];
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int16_t data[];
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} __packed;
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struct sof_eq_fir_coef_data {
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int16_t length; /* Number of FIR taps */
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int16_t out_shift; /* Amount of right shifts at output */
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/* reserved */
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uint32_t reserved[4];
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int16_t coef[]; /* FIR coefficients */
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} __packed;
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/* In the struct above there's two 16 bit words (length, shift) and four
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* reserved 32 bit words before the actual FIR coefficients. This information
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* is used in parsing of the configuration blob.
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*/
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#define SOF_EQ_FIR_COEF_NHEADER \
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(sizeof(struct sof_eq_fir_coef_data) / sizeof(int16_t))
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/* IIR EQ type */
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#define SOF_EQ_IIR_IDX_SWITCH 0
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#define SOF_EQ_IIR_MAX_SIZE 1024 /* Max size allowed for coef data in bytes */
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#define SOF_EQ_IIR_MAX_RESPONSES 8 /* A blob can define max 8 IIR EQs */
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/* eq_iir_configuration
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* uint32_t channels_in_config
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* This describes the number of channels in this EQ config data. It
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* can be different from PLATFORM_MAX_CHANNELS.
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* uint32_t number_of_responses_defined
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* 0=no responses, 1=one response defined, 2=two responses defined, etc.
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* int32_t data[]
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* Data consist of two parts. First is the response assign vector that
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* has length of channels_in_config. The latter part is coefficient
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* data.
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* uint32_t assign_response[channels_in_config]
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* -1 = not defined, 0 = use first response, 1 = use 2nd, etc.
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* E.g. {0, 0, 0, 0, -1, -1, -1, -1} would apply to channels 0-3 the
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* same first defined response and leave channels 4-7 unequalized.
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* coefficient_data[]
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* <1st EQ>
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* uint32_t num_biquads
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* uint32_t num_biquads_in_series
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* <1st biquad>
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* int32_t coef_a2 Q2.30 format
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* int32_t coef_a1 Q2.30 format
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* int32_t coef_b2 Q2.30 format
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* int32_t coef_b1 Q2.30 format
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* int32_t coef_b0 Q2.30 format
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* int32_t output_shift number of shifts right, shift left is negative
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* int32_t output_gain Q2.14 format
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* <2nd biquad>
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* ...
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* <2nd EQ>
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*
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* Note: A flat response biquad can be made with a section set to
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* b0 = 1.0, gain = 1.0, and other parameters set to 0
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* {0, 0, 0, 0, 1073741824, 0, 16484}
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*/
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struct sof_eq_iir_config {
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uint32_t size;
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uint32_t channels_in_config;
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uint32_t number_of_responses;
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/* reserved */
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uint32_t reserved[4];
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int32_t data[]; /* eq_assign[channels], eq 0, eq 1, ... */
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} __packed;
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struct sof_eq_iir_header_df2t {
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uint32_t num_sections;
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uint32_t num_sections_in_series;
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/* reserved */
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uint32_t reserved[4];
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int32_t biquads[]; /* Repeated biquad coefficients */
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} __packed;
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struct sof_eq_iir_biquad_df2t {
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int32_t a2; /* Q2.30 */
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int32_t a1; /* Q2.30 */
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int32_t b2; /* Q2.30 */
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int32_t b1; /* Q2.30 */
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int32_t b0; /* Q2.30 */
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int32_t output_shift; /* Number of right shifts */
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int32_t output_gain; /* Q2.14 */
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} __packed;
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/* A full 22th order equalizer with 11 biquads cover octave bands 1-11 in
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* in the 0 - 20 kHz bandwidth.
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*/
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#define SOF_EQ_IIR_DF2T_BIQUADS_MAX 11
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/* The number of int32_t words in sof_eq_iir_header_df2t:
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* num_sections, num_sections_in_series, reserved[4]
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*/
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#define SOF_EQ_IIR_NHEADER_DF2T \
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(sizeof(struct sof_eq_iir_header_df2t) / sizeof(int32_t))
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/* The number of int32_t words in sof_eq_iir_biquad_df2t:
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* a2, a1, b2, b1, b0, output_shift, output_gain
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*/
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#define SOF_EQ_IIR_NBIQUAD_DF2T \
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(sizeof(struct sof_eq_iir_biquad_df2t) / sizeof(int32_t))
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#endif
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