2019-02-14 13:59:15 -06:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2009-2014 Realtek Corporation.*/
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2014-09-26 16:40:23 -05:00
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#include "../wifi.h"
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#include "../pci.h"
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#include "../base.h"
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#include "../stats.h"
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#include "reg.h"
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#include "def.h"
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#include "phy.h"
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#include "trx.h"
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#include "led.h"
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#include "dm.h"
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#include "fw.h"
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static u8 _rtl92ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
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{
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__le16 fc = rtl_get_fc(skb);
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if (unlikely(ieee80211_is_beacon(fc)))
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return QSLT_BEACON;
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if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
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return QSLT_MGNT;
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return skb->priority;
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}
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static void _rtl92ee_query_rxphystatus(struct ieee80211_hw *hw,
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struct rtl_stats *pstatus, u8 *pdesc,
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struct rx_fwinfo *p_drvinfo,
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bool bpacket_match_bssid,
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bool bpacket_toself,
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bool packet_beacon)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
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2019-08-31 13:06:44 -05:00
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s8 rx_pwr_all, rx_pwr[4];
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2014-09-26 16:40:23 -05:00
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u8 rf_rx_num = 0, evm, pwdb_all;
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u8 i, max_spatial_stream;
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u32 rssi, total_rssi = 0;
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bool is_cck = pstatus->is_cck;
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u8 lan_idx, vga_idx;
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/* Record it for next packet processing */
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pstatus->packet_matchbssid = bpacket_match_bssid;
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pstatus->packet_toself = bpacket_toself;
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pstatus->packet_beacon = packet_beacon;
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pstatus->rx_mimo_signalquality[0] = -1;
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pstatus->rx_mimo_signalquality[1] = -1;
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if (is_cck) {
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u8 cck_highpwr;
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u8 cck_agc_rpt;
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/* CCK Driver info Structure is not the same as OFDM packet. */
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cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
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/* (1)Hardware does not provide RSSI for CCK
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2022-04-08 09:58:03 +00:00
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* (2)PWDB, Average PWDB calculated by
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2014-09-26 16:40:23 -05:00
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* hardware (for rate adaptive)
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*/
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cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
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BIT(9));
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lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
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vga_idx = (cck_agc_rpt & 0x1f);
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switch (lan_idx) {
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case 7: /*VGA_idx = 27~2*/
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if (vga_idx <= 27)
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rx_pwr_all = -100 + 2 * (27 - vga_idx);
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else
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rx_pwr_all = -100;
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break;
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case 6: /*VGA_idx = 2~0*/
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rx_pwr_all = -48 + 2 * (2 - vga_idx);
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break;
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case 5: /*VGA_idx = 7~5*/
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rx_pwr_all = -42 + 2 * (7 - vga_idx);
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break;
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case 4: /*VGA_idx = 7~4*/
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rx_pwr_all = -36 + 2 * (7 - vga_idx);
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break;
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case 3: /*VGA_idx = 7~0*/
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rx_pwr_all = -24 + 2 * (7 - vga_idx);
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break;
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case 2: /*VGA_idx = 5~0*/
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if (cck_highpwr)
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rx_pwr_all = -12 + 2 * (5 - vga_idx);
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else
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rx_pwr_all = -6 + 2 * (5 - vga_idx);
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break;
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case 1:
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rx_pwr_all = 8 - 2 * vga_idx;
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break;
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case 0:
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rx_pwr_all = 14 - 2 * vga_idx;
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break;
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default:
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2019-08-31 13:06:44 -05:00
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rx_pwr_all = 0;
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2014-09-26 16:40:23 -05:00
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break;
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}
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rx_pwr_all += 16;
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pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
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if (!cck_highpwr) {
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if (pwdb_all >= 80)
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pwdb_all = ((pwdb_all - 80) << 1) +
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((pwdb_all - 80) >> 1) + 80;
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else if ((pwdb_all <= 78) && (pwdb_all >= 20))
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pwdb_all += 3;
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if (pwdb_all > 100)
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pwdb_all = 100;
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}
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pstatus->rx_pwdb_all = pwdb_all;
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pstatus->bt_rx_rssi_percentage = pwdb_all;
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pstatus->recvsignalpower = rx_pwr_all;
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/* (3) Get Signal Quality (EVM) */
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if (bpacket_match_bssid) {
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u8 sq, sq_rpt;
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if (pstatus->rx_pwdb_all > 40) {
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sq = 100;
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} else {
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sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
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if (sq_rpt > 64)
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sq = 0;
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else if (sq_rpt < 20)
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sq = 100;
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else
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sq = ((64 - sq_rpt) * 100) / 44;
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}
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pstatus->signalquality = sq;
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pstatus->rx_mimo_signalquality[0] = sq;
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pstatus->rx_mimo_signalquality[1] = -1;
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}
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} else {
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/* (1)Get RSSI for HT rate */
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for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
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/* we will judge RF RX path now. */
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if (rtlpriv->dm.rfpath_rxenable[i])
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rf_rx_num++;
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rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
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- 110;
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pstatus->rx_pwr[i] = rx_pwr[i];
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/* Translate DBM to percentage. */
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rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
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total_rssi += rssi;
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pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
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}
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2022-04-08 09:58:03 +00:00
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/* (2)PWDB, Average PWDB calculated by
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2014-09-26 16:40:23 -05:00
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* hardware (for rate adaptive)
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*/
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rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1)
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& 0x7f) - 110;
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pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
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pstatus->rx_pwdb_all = pwdb_all;
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pstatus->bt_rx_rssi_percentage = pwdb_all;
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pstatus->rxpower = rx_pwr_all;
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pstatus->recvsignalpower = rx_pwr_all;
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/* (3)EVM of HT rate */
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2014-12-18 03:05:36 -06:00
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if (pstatus->rate >= DESC_RATEMCS8 &&
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pstatus->rate <= DESC_RATEMCS15)
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2014-09-26 16:40:23 -05:00
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max_spatial_stream = 2;
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else
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max_spatial_stream = 1;
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for (i = 0; i < max_spatial_stream; i++) {
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evm = rtl_evm_db_to_percentage(
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p_phystrpt->stream_rxevm[i]);
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if (bpacket_match_bssid) {
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/* Fill value in RFD, Get the first
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* spatial stream only
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*/
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if (i == 0)
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pstatus->signalquality = (u8)(evm &
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0xff);
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pstatus->rx_mimo_signalquality[i] = (u8)(evm &
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0xff);
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}
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}
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if (bpacket_match_bssid) {
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for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
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rtl_priv(hw)->dm.cfo_tail[i] =
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(int)p_phystrpt->path_cfotail[i];
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if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
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rtl_priv(hw)->dm.packet_count = 0;
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else
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rtl_priv(hw)->dm.packet_count++;
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}
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}
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/* UI BSS List signal strength(in percentage),
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* make it good looking, from 0~100.
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*/
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if (is_cck)
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pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
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pwdb_all));
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else if (rf_rx_num != 0)
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pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
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total_rssi /= rf_rx_num));
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}
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static void _rtl92ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
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struct sk_buff *skb,
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struct rtl_stats *pstatus,
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u8 *pdesc,
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struct rx_fwinfo *p_drvinfo)
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{
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
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struct ieee80211_hdr *hdr;
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u8 *tmp_buf;
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u8 *praddr;
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u8 *psaddr;
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__le16 fc;
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bool packet_matchbssid, packet_toself, packet_beacon;
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tmp_buf = skb->data + pstatus->rx_drvinfo_size +
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pstatus->rx_bufshift + 24;
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hdr = (struct ieee80211_hdr *)tmp_buf;
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fc = hdr->frame_control;
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praddr = hdr->addr1;
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psaddr = ieee80211_get_SA(hdr);
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ether_addr_copy(pstatus->psaddr, psaddr);
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packet_matchbssid = (!ieee80211_is_ctl(fc) &&
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(ether_addr_equal(mac->bssid,
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ieee80211_has_tods(fc) ?
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hdr->addr1 :
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ieee80211_has_fromds(fc) ?
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hdr->addr2 : hdr->addr3)) &&
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(!pstatus->hwerror) && (!pstatus->crc) &&
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(!pstatus->icv));
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packet_toself = packet_matchbssid &&
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(ether_addr_equal(praddr, rtlefuse->dev_addr));
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if (ieee80211_is_beacon(fc))
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packet_beacon = true;
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else
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packet_beacon = false;
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if (packet_beacon && packet_matchbssid)
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rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
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if (packet_matchbssid && ieee80211_is_data_qos(hdr->frame_control) &&
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!is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
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struct ieee80211_qos_hdr *hdr_qos =
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(struct ieee80211_qos_hdr *)tmp_buf;
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u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
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if (tid != 0 && tid != 3)
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rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
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}
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_rtl92ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
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packet_matchbssid, packet_toself,
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packet_beacon);
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rtl_process_phyinfo(hw, tmp_buf, pstatus);
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}
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static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
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2019-08-31 13:06:43 -05:00
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u8 *virtualaddress8)
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2014-09-26 16:40:23 -05:00
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{
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2019-08-31 13:06:44 -05:00
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u32 dwtmp;
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2019-08-31 13:06:43 -05:00
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__le32 *virtualaddress = (__le32 *)virtualaddress8;
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2014-09-26 16:40:23 -05:00
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memset(virtualaddress, 0, 8);
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2019-08-31 13:06:42 -05:00
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set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
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2014-09-26 16:40:23 -05:00
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if (ptcb_desc->empkt_num == 1) {
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dwtmp = ptcb_desc->empkt_len[0];
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} else {
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dwtmp = ptcb_desc->empkt_len[0];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += ptcb_desc->empkt_len[1];
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}
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2019-08-31 13:06:42 -05:00
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set_earlymode_len0(virtualaddress, dwtmp);
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2014-09-26 16:40:23 -05:00
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if (ptcb_desc->empkt_num <= 3) {
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dwtmp = ptcb_desc->empkt_len[2];
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} else {
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dwtmp = ptcb_desc->empkt_len[2];
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|
|
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
|
|
|
|
|
dwtmp += ptcb_desc->empkt_len[3];
|
|
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_earlymode_len1(virtualaddress, dwtmp);
|
2014-09-26 16:40:23 -05:00
|
|
|
if (ptcb_desc->empkt_num <= 5) {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[4];
|
|
|
|
|
} else {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[4];
|
|
|
|
|
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
|
|
|
|
|
dwtmp += ptcb_desc->empkt_len[5];
|
|
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
|
|
|
|
|
set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
|
2014-09-26 16:40:23 -05:00
|
|
|
if (ptcb_desc->empkt_num <= 7) {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[6];
|
|
|
|
|
} else {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[6];
|
|
|
|
|
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
|
|
|
|
|
dwtmp += ptcb_desc->empkt_len[7];
|
|
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_earlymode_len3(virtualaddress, dwtmp);
|
2014-09-26 16:40:23 -05:00
|
|
|
if (ptcb_desc->empkt_num <= 9) {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[8];
|
|
|
|
|
} else {
|
|
|
|
|
dwtmp = ptcb_desc->empkt_len[8];
|
|
|
|
|
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
|
|
|
|
|
dwtmp += ptcb_desc->empkt_len[9];
|
|
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_earlymode_len4(virtualaddress, dwtmp);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
|
|
|
|
|
struct rtl_stats *status,
|
|
|
|
|
struct ieee80211_rx_status *rx_status,
|
2019-08-31 13:06:43 -05:00
|
|
|
u8 *pdesc8, struct sk_buff *skb)
|
2014-09-26 16:40:23 -05:00
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
struct rx_fwinfo *p_drvinfo;
|
|
|
|
|
struct ieee80211_hdr *hdr;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
2019-08-31 13:06:42 -05:00
|
|
|
u32 phystatus = get_rx_desc_physt(pdesc);
|
2019-04-04 13:29:31 -05:00
|
|
|
u8 wake_match;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
if (get_rx_status_desc_rpt_sel(pdesc) == 0)
|
2015-01-20 11:01:24 -06:00
|
|
|
status->packet_report_type = NORMAL_RX;
|
|
|
|
|
else
|
|
|
|
|
status->packet_report_type = C2H_PACKET;
|
2019-08-31 13:06:42 -05:00
|
|
|
status->length = (u16)get_rx_desc_pkt_len(pdesc);
|
|
|
|
|
status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
|
2014-09-26 16:40:23 -05:00
|
|
|
RX_DRV_INFO_SIZE_UNIT;
|
2019-08-31 13:06:42 -05:00
|
|
|
status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
|
|
|
|
|
status->icv = (u16)get_rx_desc_icv(pdesc);
|
|
|
|
|
status->crc = (u16)get_rx_desc_crc32(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
status->hwerror = (status->crc | status->icv);
|
2019-08-31 13:06:42 -05:00
|
|
|
status->decrypted = !get_rx_desc_swdec(pdesc);
|
|
|
|
|
status->rate = (u8)get_rx_desc_rxmcs(pdesc);
|
|
|
|
|
status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
|
|
|
|
|
status->timestamp_low = get_rx_desc_tsfl(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
status->is_cck = RTL92EE_RX_HAL_IS_CCK_RATE(status->rate);
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
status->macid = get_rx_desc_macid(pdesc);
|
|
|
|
|
if (get_rx_status_desc_pattern_match(pdesc))
|
2019-04-04 13:29:31 -05:00
|
|
|
wake_match = BIT(2);
|
2019-08-31 13:06:42 -05:00
|
|
|
else if (get_rx_status_desc_magic_match(pdesc))
|
2019-04-04 13:29:31 -05:00
|
|
|
wake_match = BIT(1);
|
2019-08-31 13:06:42 -05:00
|
|
|
else if (get_rx_status_desc_unicast_match(pdesc))
|
2019-04-04 13:29:31 -05:00
|
|
|
wake_match = BIT(0);
|
2014-09-26 16:40:23 -05:00
|
|
|
else
|
2019-04-04 13:29:31 -05:00
|
|
|
wake_match = 0;
|
|
|
|
|
if (wake_match)
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
|
|
|
|
|
"GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
|
|
|
|
|
wake_match);
|
2014-09-26 16:40:23 -05:00
|
|
|
rx_status->freq = hw->conf.chandef.chan->center_freq;
|
|
|
|
|
rx_status->band = hw->conf.chandef.chan->band;
|
|
|
|
|
|
|
|
|
|
hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
|
|
|
|
|
status->rx_bufshift + 24);
|
|
|
|
|
|
|
|
|
|
if (status->crc)
|
|
|
|
|
rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
|
|
|
|
|
|
2019-02-14 16:36:37 -06:00
|
|
|
if (status->rx_is40mhzpacket)
|
2017-04-26 12:14:59 +02:00
|
|
|
rx_status->bw = RATE_INFO_BW_40;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (status->is_ht)
|
2017-04-26 12:14:59 +02:00
|
|
|
rx_status->encoding = RX_ENC_HT;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
rx_status->flag |= RX_FLAG_MACTIME_START;
|
|
|
|
|
|
|
|
|
|
/* hw will set status->decrypted true, if it finds the
|
|
|
|
|
* frame is open data frame or mgmt frame.
|
|
|
|
|
* So hw will not decryption robust managment frame
|
|
|
|
|
* for IEEE80211w but still set status->decrypted
|
|
|
|
|
* true, so here we should set it back to undecrypted
|
|
|
|
|
* for IEEE80211w frame, and mac80211 sw will help
|
|
|
|
|
* to decrypt it
|
|
|
|
|
*/
|
|
|
|
|
if (status->decrypted) {
|
|
|
|
|
if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
|
|
|
|
|
(ieee80211_has_protected(hdr->frame_control)))
|
|
|
|
|
rx_status->flag |= RX_FLAG_DECRYPTED;
|
|
|
|
|
else
|
|
|
|
|
rx_status->flag &= ~RX_FLAG_DECRYPTED;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* rate_idx: index of data rate into band's
|
|
|
|
|
* supported rates or MCS index if HT rates
|
|
|
|
|
* are use (RX_FLAG_HT)
|
|
|
|
|
* Notice: this is diff with windows define
|
|
|
|
|
*/
|
2014-12-18 03:05:35 -06:00
|
|
|
rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
|
2014-12-18 03:05:40 -06:00
|
|
|
false, status->rate);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
rx_status->mactime = status->timestamp_low;
|
|
|
|
|
if (phystatus) {
|
|
|
|
|
p_drvinfo = (struct rx_fwinfo *)(skb->data +
|
|
|
|
|
status->rx_bufshift + 24);
|
|
|
|
|
|
2019-08-31 13:06:43 -05:00
|
|
|
_rtl92ee_translate_rx_signal_stuff(hw, skb, status, pdesc8,
|
2014-09-26 16:40:23 -05:00
|
|
|
p_drvinfo);
|
|
|
|
|
}
|
|
|
|
|
rx_status->signal = status->recvsignalpower + 10;
|
|
|
|
|
if (status->packet_report_type == TX_REPORT2) {
|
|
|
|
|
status->macid_valid_entry[0] =
|
2019-08-31 13:06:42 -05:00
|
|
|
get_rx_rpt2_desc_macid_valid_1(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
status->macid_valid_entry[1] =
|
2019-08-31 13:06:42 -05:00
|
|
|
get_rx_rpt2_desc_macid_valid_2(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*in Windows, this == Rx_92EE_Interrupt*/
|
2019-08-31 13:06:43 -05:00
|
|
|
void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc8,
|
2014-09-26 16:40:23 -05:00
|
|
|
u8 queue_index)
|
|
|
|
|
{
|
|
|
|
|
u8 first_seg = 0;
|
|
|
|
|
u8 last_seg = 0;
|
|
|
|
|
u16 total_len = 0;
|
|
|
|
|
u16 read_cnt = 0;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *header_desc = (__le32 *)header_desc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (header_desc == NULL)
|
|
|
|
|
return;
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
while (total_len == 0 && first_seg == 0 && last_seg == 0) {
|
|
|
|
|
read_cnt++;
|
2019-08-31 13:06:42 -05:00
|
|
|
total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
|
|
|
|
|
first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
|
|
|
|
|
last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (read_cnt > 20)
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
u16 rtl92ee_rx_desc_buff_remained_cnt(struct ieee80211_hw *hw, u8 queue_index)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
2019-08-31 13:06:44 -05:00
|
|
|
u16 read_point, write_point, remind_cnt;
|
|
|
|
|
u32 tmp_4byte;
|
2014-09-26 16:40:23 -05:00
|
|
|
static bool start_rx;
|
|
|
|
|
|
|
|
|
|
tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_TXBD_IDX);
|
|
|
|
|
read_point = (u16)((tmp_4byte>>16) & 0x7ff);
|
|
|
|
|
write_point = (u16)(tmp_4byte & 0x7ff);
|
|
|
|
|
|
|
|
|
|
if (write_point != rtlpci->rx_ring[queue_index].next_rx_rp) {
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_RXDESC, DBG_DMESG,
|
|
|
|
|
"!!!write point is 0x%x, reg 0x3B4 value is 0x%x\n",
|
|
|
|
|
write_point, tmp_4byte);
|
2014-09-26 16:40:23 -05:00
|
|
|
tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_TXBD_IDX);
|
|
|
|
|
read_point = (u16)((tmp_4byte>>16) & 0x7ff);
|
|
|
|
|
write_point = (u16)(tmp_4byte & 0x7ff);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (read_point > 0)
|
|
|
|
|
start_rx = true;
|
|
|
|
|
if (!start_rx)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2017-11-13 17:39:34 +08:00
|
|
|
remind_cnt = calc_fifo_space(read_point, write_point,
|
|
|
|
|
RTL_PCI_MAX_RX_COUNT);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (remind_cnt == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
rtlpci->rx_ring[queue_index].next_rx_rp = write_point;
|
|
|
|
|
|
|
|
|
|
return remind_cnt;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static u16 get_desc_addr_fr_q_idx(u16 queue_index)
|
|
|
|
|
{
|
2019-08-31 13:06:44 -05:00
|
|
|
u16 desc_address;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
switch (queue_index) {
|
|
|
|
|
case BK_QUEUE:
|
|
|
|
|
desc_address = REG_BKQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case BE_QUEUE:
|
|
|
|
|
desc_address = REG_BEQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case VI_QUEUE:
|
|
|
|
|
desc_address = REG_VIQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case VO_QUEUE:
|
|
|
|
|
desc_address = REG_VOQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case BEACON_QUEUE:
|
|
|
|
|
desc_address = REG_BEQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case TXCMD_QUEUE:
|
|
|
|
|
desc_address = REG_BEQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case MGNT_QUEUE:
|
|
|
|
|
desc_address = REG_MGQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case HIGH_QUEUE:
|
|
|
|
|
desc_address = REG_HI0Q_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
case HCCA_QUEUE:
|
|
|
|
|
desc_address = REG_BEQ_TXBD_IDX;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
2019-08-31 13:06:44 -05:00
|
|
|
desc_address = REG_BEQ_TXBD_IDX;
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return desc_address;
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-03 11:15:17 -06:00
|
|
|
u16 rtl92ee_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
u16 point_diff = 0;
|
2019-08-31 13:06:44 -05:00
|
|
|
u16 current_tx_read_point, current_tx_write_point;
|
2015-02-03 11:15:17 -06:00
|
|
|
u32 tmp_4byte;
|
|
|
|
|
|
|
|
|
|
tmp_4byte = rtl_read_dword(rtlpriv,
|
|
|
|
|
get_desc_addr_fr_q_idx(q_idx));
|
|
|
|
|
current_tx_read_point = (u16)((tmp_4byte >> 16) & 0x0fff);
|
|
|
|
|
current_tx_write_point = (u16)((tmp_4byte) & 0x0fff);
|
|
|
|
|
|
|
|
|
|
point_diff = calc_fifo_space(current_tx_read_point,
|
2017-11-13 17:39:34 +08:00
|
|
|
current_tx_write_point,
|
|
|
|
|
TX_DESC_NUM_92E);
|
2015-02-03 11:15:17 -06:00
|
|
|
|
|
|
|
|
return point_diff;
|
|
|
|
|
}
|
|
|
|
|
|
2014-09-26 16:40:23 -05:00
|
|
|
void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
|
2019-08-31 13:06:43 -05:00
|
|
|
u8 *tx_bd_desc8, u8 *desc8, u8 queue_index,
|
2014-09-26 16:40:23 -05:00
|
|
|
struct sk_buff *skb, dma_addr_t addr)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
u32 pkt_len = skb->len;
|
|
|
|
|
u16 desc_size = 40; /*tx desc size*/
|
|
|
|
|
u32 psblen = 0;
|
2019-08-31 13:06:44 -05:00
|
|
|
u16 tx_page_size;
|
|
|
|
|
u32 total_packet_size;
|
2014-09-26 16:40:23 -05:00
|
|
|
u16 current_bd_desc;
|
2019-08-31 13:06:44 -05:00
|
|
|
u8 i;
|
2014-09-26 16:40:23 -05:00
|
|
|
u16 real_desc_size = 0x28;
|
|
|
|
|
u16 append_early_mode_size = 0;
|
2017-09-29 14:47:53 -05:00
|
|
|
u8 segmentnum = 1 << (RTL8192EE_SEG_NUM + 1);
|
|
|
|
|
dma_addr_t desc_dma_addr;
|
|
|
|
|
bool dma64 = rtlpriv->cfg->mod_params->dma64;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *desc = (__le32 *)desc8;
|
|
|
|
|
__le32 *tx_bd_desc = (__le32 *)tx_bd_desc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
tx_page_size = 2;
|
|
|
|
|
current_bd_desc = rtlpci->tx_ring[queue_index].cur_tx_wp;
|
|
|
|
|
|
|
|
|
|
total_packet_size = desc_size+pkt_len;
|
|
|
|
|
|
|
|
|
|
if (rtlpriv->rtlhal.earlymode_enable) {
|
|
|
|
|
if (queue_index < BEACON_QUEUE) {
|
|
|
|
|
append_early_mode_size = 8;
|
|
|
|
|
total_packet_size += append_early_mode_size;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (tx_page_size > 0) {
|
|
|
|
|
psblen = (pkt_len + real_desc_size + append_early_mode_size) /
|
|
|
|
|
(tx_page_size * 128);
|
|
|
|
|
|
|
|
|
|
if (psblen * (tx_page_size * 128) < total_packet_size)
|
|
|
|
|
psblen += 1;
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-29 14:47:53 -05:00
|
|
|
/* tx desc addr */
|
|
|
|
|
desc_dma_addr = rtlpci->tx_ring[queue_index].dma +
|
|
|
|
|
(current_bd_desc * TX_DESC_SIZE);
|
|
|
|
|
|
2014-09-26 16:40:23 -05:00
|
|
|
/* Reset */
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_len_0(tx_bd_desc, 0);
|
|
|
|
|
set_tx_buff_desc_psb(tx_bd_desc, 0);
|
|
|
|
|
set_tx_buff_desc_own(tx_bd_desc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
for (i = 1; i < segmentnum; i++) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_txbuffer_desc_len_with_offset(tx_bd_desc, i, 0);
|
|
|
|
|
set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, i, 0);
|
|
|
|
|
set_txbuffer_desc_add_low_with_offset(tx_bd_desc, i, 0);
|
|
|
|
|
set_txbuffer_desc_add_high_with_offset(tx_bd_desc, i, 0, dma64);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Clear all status */
|
2019-08-31 13:06:43 -05:00
|
|
|
clear_pci_tx_desc_content(desc, TX_DESC_SIZE);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (rtlpriv->rtlhal.earlymode_enable) {
|
|
|
|
|
if (queue_index < BEACON_QUEUE) {
|
|
|
|
|
/* This if needs braces */
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_len_0(tx_bd_desc, desc_size + 8);
|
2014-09-26 16:40:23 -05:00
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_psb(tx_bd_desc, psblen);
|
|
|
|
|
set_tx_buff_desc_addr_low_0(tx_bd_desc, desc_dma_addr);
|
|
|
|
|
set_tx_buff_desc_addr_high_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
|
2017-09-29 14:47:53 -05:00
|
|
|
dma64);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_txbuffer_desc_len_with_offset(tx_bd_desc, 1, pkt_len);
|
2014-09-26 16:40:23 -05:00
|
|
|
/* don't using extendsion mode. */
|
2019-08-31 13:06:42 -05:00
|
|
|
set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, 1, 0);
|
|
|
|
|
set_txbuffer_desc_add_low_with_offset(tx_bd_desc, 1, addr);
|
|
|
|
|
set_txbuffer_desc_add_high_with_offset(tx_bd_desc, 1,
|
2017-09-29 14:47:53 -05:00
|
|
|
((u64)addr >> 32), dma64);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_pkt_size(desc, (u16)(pkt_len));
|
|
|
|
|
set_tx_desc_tx_buffer_size(desc, (u16)(pkt_len));
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
|
2019-08-31 13:06:43 -05:00
|
|
|
struct ieee80211_hdr *hdr, u8 *pdesc8,
|
2014-09-26 16:40:23 -05:00
|
|
|
u8 *pbd_desc_tx,
|
|
|
|
|
struct ieee80211_tx_info *info,
|
|
|
|
|
struct ieee80211_sta *sta,
|
|
|
|
|
struct sk_buff *skb,
|
|
|
|
|
u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
|
2018-05-18 17:29:54 +08:00
|
|
|
struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
|
2014-09-26 16:40:23 -05:00
|
|
|
u16 seq_number;
|
|
|
|
|
__le16 fc = hdr->frame_control;
|
|
|
|
|
u8 fw_qsel = _rtl92ee_map_hwqueue_to_fwqueue(skb, hw_queue);
|
|
|
|
|
bool firstseg = ((hdr->seq_ctrl &
|
|
|
|
|
cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
|
|
|
|
|
bool lastseg = ((hdr->frame_control &
|
|
|
|
|
cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
|
|
|
|
|
dma_addr_t mapping;
|
|
|
|
|
u8 bw_40 = 0;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (mac->opmode == NL80211_IFTYPE_STATION) {
|
|
|
|
|
bw_40 = mac->bw_40;
|
|
|
|
|
} else if (mac->opmode == NL80211_IFTYPE_AP ||
|
|
|
|
|
mac->opmode == NL80211_IFTYPE_ADHOC) {
|
|
|
|
|
if (sta)
|
mac80211: prepare sta handling for MLO support
Currently in mac80211 each STA object is represented
using sta_info datastructure with the associated
STA specific information and drivers access ieee80211_sta
part of it.
With MLO (Multi Link Operation) support being added
in 802.11be standard, though the association is logically
with a single Multi Link capable STA, at the physical level
communication can happen via different advertised
links (uniquely identified by Channel, operating class,
BSSID) and hence the need to handle multiple link
STA parameters within a composite sta_info object
called the MLD STA. The different link STA part of
MLD STA are identified using the link address which can
be same or different as the MLD STA address and unique
link id based on the link vif.
To support extension of such a model, the sta_info
datastructure is modified to hold multiple link STA
objects with link specific params currently within
sta_info moved to this new structure. Similarly this is
done for ieee80211_sta as well which will be accessed
within mac80211 as well as by drivers, hence trivial
driver changes are expected to support this.
For current non MLO supported drivers, only one link STA
is present and link information is accessed via 'deflink'
member.
For MLO drivers, we still need to define the APIs etc. to
get the correct link ID and access the correct part of
the station info.
Currently in mac80211, all link STA info are accessed directly
via deflink. These will be updated to access via link pointers
indexed by link id with MLO support patches, with link id
being 0 for non MLO supported cases.
Except for couple of macro related changes, below spatch takes
care of updating mac80211 and driver code to access to the
link STA info via deflink.
@ieee80211_sta@
struct ieee80211_sta *s;
struct sta_info *si;
identifier var = {supp_rates, ht_cap, vht_cap, he_cap, he_6ghz_capa, eht_cap, rx_nss, bandwidth, txpwr};
@@
(
s->
- var
+ deflink.var
|
si->sta.
- var
+ deflink.var
)
@sta_info@
struct sta_info *si;
identifier var = {gtk, pcpu_rx_stats, rx_stats, rx_stats_avg, status_stats, tx_stats, cur_max_bandwidth};
@@
(
si->
- var
+ deflink.var
)
Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
Link: https://lore.kernel.org/r/1649086883-13246-1-git-send-email-quic_srirrama@quicinc.com
[remove MLO-drivers notes from commit message, not clear yet; run spatch]
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-04-04 21:11:23 +05:30
|
|
|
bw_40 = sta->deflink.ht_cap.cap &
|
2014-09-26 16:40:23 -05:00
|
|
|
IEEE80211_HT_CAP_SUP_WIDTH_20_40;
|
|
|
|
|
}
|
|
|
|
|
seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
|
|
|
|
|
rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
|
|
|
|
|
/* reserve 8 byte for AMPDU early mode */
|
|
|
|
|
if (rtlhal->earlymode_enable) {
|
|
|
|
|
skb_push(skb, EM_HDR_LEN);
|
|
|
|
|
memset(skb->data, 0, EM_HDR_LEN);
|
|
|
|
|
}
|
rtlwifi: switch from 'pci_' to 'dma_' API
The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.
The only file where some GFP_ flags are updated is 'pci.c'.
When memory is allocated in '_rtl_pci_init_tx_ring()' and
'_rtl_pci_init_rx_ring()' GFP_KERNEL can be used because both functions are
called from a probe function and no spinlock is taken.
The call chain is:
rtl_pci_probe
--> rtl_pci_init
--> _rtl_pci_init_trx_ring
--> _rtl_pci_init_rx_ring
--> _rtl_pci_init_tx_ring
@@
@@
- PCI_DMA_BIDIRECTIONAL
+ DMA_BIDIRECTIONAL
@@
@@
- PCI_DMA_TODEVICE
+ DMA_TO_DEVICE
@@
@@
- PCI_DMA_FROMDEVICE
+ DMA_FROM_DEVICE
@@
@@
- PCI_DMA_NONE
+ DMA_NONE
@@
expression e1, e2, e3;
@@
- pci_alloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3;
@@
- pci_zalloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3, e4;
@@
- pci_free_consistent(e1, e2, e3, e4)
+ dma_free_coherent(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_single(e1, e2, e3, e4)
+ dma_map_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_single(e1, e2, e3, e4)
+ dma_unmap_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4, e5;
@@
- pci_map_page(e1, e2, e3, e4, e5)
+ dma_map_page(&e1->dev, e2, e3, e4, e5)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_page(e1, e2, e3, e4)
+ dma_unmap_page(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_sg(e1, e2, e3, e4)
+ dma_map_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_sg(e1, e2, e3, e4)
+ dma_unmap_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+ dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_device(e1, e2, e3, e4)
+ dma_sync_single_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+ dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+ dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2;
@@
- pci_dma_mapping_error(e1, e2)
+ dma_mapping_error(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_dma_mask(e1, e2)
+ dma_set_mask(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_consistent_dma_mask(e1, e2)
+ dma_set_coherent_mask(&e1->dev, e2)
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200907193828.318233-1-christophe.jaillet@wanadoo.fr
2020-09-07 21:38:28 +02:00
|
|
|
mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
|
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
|
if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
|
"DMA mapping error\n");
|
2014-09-26 16:40:23 -05:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (pbd_desc_tx != NULL)
|
2019-08-31 13:06:43 -05:00
|
|
|
rtl92ee_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc8, hw_queue,
|
2014-09-26 16:40:23 -05:00
|
|
|
skb, mapping);
|
|
|
|
|
|
|
|
|
|
if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
|
|
|
|
|
firstseg = true;
|
|
|
|
|
lastseg = true;
|
|
|
|
|
}
|
|
|
|
|
if (firstseg) {
|
|
|
|
|
if (rtlhal->earlymode_enable) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_pkt_offset(pdesc, 1);
|
|
|
|
|
set_tx_desc_offset(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
USB_HWDESC_HEADER_LEN + EM_HDR_LEN);
|
|
|
|
|
if (ptcb_desc->empkt_num) {
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
|
"Insert 8 byte.pTcb->EMPktNum:%d\n",
|
|
|
|
|
ptcb_desc->empkt_num);
|
2014-09-26 16:40:23 -05:00
|
|
|
_rtl92ee_insert_emcontent(ptcb_desc,
|
|
|
|
|
(u8 *)(skb->data));
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
2017-06-18 11:12:44 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (ieee80211_is_mgmt(fc)) {
|
|
|
|
|
ptcb_desc->use_driver_rate = true;
|
|
|
|
|
} else {
|
|
|
|
|
if (rtlpriv->ra.is_special_data) {
|
|
|
|
|
ptcb_desc->use_driver_rate = true;
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_tx_rate(pdesc, DESC_RATE11M);
|
2014-09-26 16:40:23 -05:00
|
|
|
} else {
|
|
|
|
|
ptcb_desc->use_driver_rate = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_AMPDU) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_agg_enable(pdesc, 1);
|
|
|
|
|
set_tx_desc_max_agg_num(pdesc, 0x14);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_seq(pdesc, seq_number);
|
|
|
|
|
set_tx_desc_rts_enable(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
((ptcb_desc->rts_enable &&
|
|
|
|
|
!ptcb_desc->cts_enable) ? 1 : 0));
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_hw_rts_enable(pdesc, 0);
|
|
|
|
|
set_tx_desc_cts2self(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
((ptcb_desc->cts_enable) ? 1 : 0));
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
|
|
|
|
|
set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
|
|
|
|
|
set_tx_desc_rts_short(pdesc,
|
2014-12-18 03:05:36 -06:00
|
|
|
((ptcb_desc->rts_rate <= DESC_RATE54M) ?
|
2014-09-26 16:40:23 -05:00
|
|
|
(ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
|
|
|
|
|
(ptcb_desc->rts_use_shortgi ? 1 : 0)));
|
|
|
|
|
|
|
|
|
|
if (ptcb_desc->tx_enable_sw_calc_duration)
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_nav_use_hdr(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (bw_40) {
|
|
|
|
|
if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_data_bw(pdesc, 1);
|
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc, 3);
|
2014-09-26 16:40:23 -05:00
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_data_bw(pdesc, 0);
|
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
mac->cur_40_prime_sc);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_data_bw(pdesc, 0);
|
|
|
|
|
set_tx_desc_tx_sub_carrier(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_linip(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
if (sta) {
|
mac80211: prepare sta handling for MLO support
Currently in mac80211 each STA object is represented
using sta_info datastructure with the associated
STA specific information and drivers access ieee80211_sta
part of it.
With MLO (Multi Link Operation) support being added
in 802.11be standard, though the association is logically
with a single Multi Link capable STA, at the physical level
communication can happen via different advertised
links (uniquely identified by Channel, operating class,
BSSID) and hence the need to handle multiple link
STA parameters within a composite sta_info object
called the MLD STA. The different link STA part of
MLD STA are identified using the link address which can
be same or different as the MLD STA address and unique
link id based on the link vif.
To support extension of such a model, the sta_info
datastructure is modified to hold multiple link STA
objects with link specific params currently within
sta_info moved to this new structure. Similarly this is
done for ieee80211_sta as well which will be accessed
within mac80211 as well as by drivers, hence trivial
driver changes are expected to support this.
For current non MLO supported drivers, only one link STA
is present and link information is accessed via 'deflink'
member.
For MLO drivers, we still need to define the APIs etc. to
get the correct link ID and access the correct part of
the station info.
Currently in mac80211, all link STA info are accessed directly
via deflink. These will be updated to access via link pointers
indexed by link id with MLO support patches, with link id
being 0 for non MLO supported cases.
Except for couple of macro related changes, below spatch takes
care of updating mac80211 and driver code to access to the
link STA info via deflink.
@ieee80211_sta@
struct ieee80211_sta *s;
struct sta_info *si;
identifier var = {supp_rates, ht_cap, vht_cap, he_cap, he_6ghz_capa, eht_cap, rx_nss, bandwidth, txpwr};
@@
(
s->
- var
+ deflink.var
|
si->sta.
- var
+ deflink.var
)
@sta_info@
struct sta_info *si;
identifier var = {gtk, pcpu_rx_stats, rx_stats, rx_stats_avg, status_stats, tx_stats, cur_max_bandwidth};
@@
(
si->
- var
+ deflink.var
)
Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
Link: https://lore.kernel.org/r/1649086883-13246-1-git-send-email-quic_srirrama@quicinc.com
[remove MLO-drivers notes from commit message, not clear yet; run spatch]
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-04-04 21:11:23 +05:30
|
|
|
u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_ampdu_density(pdesc, ampdu_density);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
if (info->control.hw_key) {
|
|
|
|
|
struct ieee80211_key_conf *key = info->control.hw_key;
|
|
|
|
|
|
|
|
|
|
switch (key->cipher) {
|
|
|
|
|
case WLAN_CIPHER_SUITE_WEP40:
|
|
|
|
|
case WLAN_CIPHER_SUITE_WEP104:
|
|
|
|
|
case WLAN_CIPHER_SUITE_TKIP:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_sec_type(pdesc, 0x1);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case WLAN_CIPHER_SUITE_CCMP:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_sec_type(pdesc, 0x3);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
default:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_sec_type(pdesc, 0x0);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_queue_sel(pdesc, fw_qsel);
|
|
|
|
|
set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
|
|
|
|
|
set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
|
|
|
|
|
set_tx_desc_disable_fb(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
ptcb_desc->disable_ratefallback ? 1 : 0);
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
/*set_tx_desc_pwr_status(pdesc, pwr_status);*/
|
2014-09-26 16:40:23 -05:00
|
|
|
/* Set TxRate and RTSRate in TxDesc */
|
|
|
|
|
/* This prevent Tx initial rate of new-coming packets */
|
|
|
|
|
/* from being overwritten by retried packet rate.*/
|
|
|
|
|
if (!ptcb_desc->use_driver_rate) {
|
2019-08-31 13:06:42 -05:00
|
|
|
/*set_tx_desc_rts_rate(pdesc, 0x08); */
|
|
|
|
|
/* set_tx_desc_tx_rate(pdesc, 0x0b); */
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
if (ieee80211_is_data_qos(fc)) {
|
|
|
|
|
if (mac->rdg_en) {
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
|
"Enable RDG function.\n");
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_rdg_enable(pdesc, 1);
|
|
|
|
|
set_tx_desc_htc(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
}
|
2018-05-18 17:29:54 +08:00
|
|
|
/* tx report */
|
2019-08-31 13:06:43 -05:00
|
|
|
rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
|
|
|
|
|
set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
|
|
|
|
|
set_tx_desc_tx_buffer_address(pdesc, mapping);
|
2014-09-26 16:40:23 -05:00
|
|
|
if (rtlpriv->dm.useramask) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
|
|
|
|
|
set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
|
2014-09-26 16:40:23 -05:00
|
|
|
} else {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
|
|
|
|
|
set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
|
2014-09-26 16:40:23 -05:00
|
|
|
if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
|
|
|
|
|
is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_bmc(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
|
2019-08-31 13:06:43 -05:00
|
|
|
u8 *pdesc8, bool firstseg,
|
2014-09-26 16:40:23 -05:00
|
|
|
bool lastseg, struct sk_buff *skb)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
u8 fw_queue = QSLT_BEACON;
|
rtlwifi: switch from 'pci_' to 'dma_' API
The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.
The only file where some GFP_ flags are updated is 'pci.c'.
When memory is allocated in '_rtl_pci_init_tx_ring()' and
'_rtl_pci_init_rx_ring()' GFP_KERNEL can be used because both functions are
called from a probe function and no spinlock is taken.
The call chain is:
rtl_pci_probe
--> rtl_pci_init
--> _rtl_pci_init_trx_ring
--> _rtl_pci_init_rx_ring
--> _rtl_pci_init_tx_ring
@@
@@
- PCI_DMA_BIDIRECTIONAL
+ DMA_BIDIRECTIONAL
@@
@@
- PCI_DMA_TODEVICE
+ DMA_TO_DEVICE
@@
@@
- PCI_DMA_FROMDEVICE
+ DMA_FROM_DEVICE
@@
@@
- PCI_DMA_NONE
+ DMA_NONE
@@
expression e1, e2, e3;
@@
- pci_alloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3;
@@
- pci_zalloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3, e4;
@@
- pci_free_consistent(e1, e2, e3, e4)
+ dma_free_coherent(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_single(e1, e2, e3, e4)
+ dma_map_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_single(e1, e2, e3, e4)
+ dma_unmap_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4, e5;
@@
- pci_map_page(e1, e2, e3, e4, e5)
+ dma_map_page(&e1->dev, e2, e3, e4, e5)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_page(e1, e2, e3, e4)
+ dma_unmap_page(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_sg(e1, e2, e3, e4)
+ dma_map_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_sg(e1, e2, e3, e4)
+ dma_unmap_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+ dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_device(e1, e2, e3, e4)
+ dma_sync_single_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+ dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+ dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2;
@@
- pci_dma_mapping_error(e1, e2)
+ dma_mapping_error(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_dma_mask(e1, e2)
+ dma_set_mask(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_consistent_dma_mask(e1, e2)
+ dma_set_coherent_mask(&e1->dev, e2)
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200907193828.318233-1-christophe.jaillet@wanadoo.fr
2020-09-07 21:38:28 +02:00
|
|
|
dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
|
|
|
|
|
skb->len, DMA_TO_DEVICE);
|
2014-09-26 16:40:23 -05:00
|
|
|
u8 txdesc_len = 40;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
rtlwifi: switch from 'pci_' to 'dma_' API
The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.
The only file where some GFP_ flags are updated is 'pci.c'.
When memory is allocated in '_rtl_pci_init_tx_ring()' and
'_rtl_pci_init_rx_ring()' GFP_KERNEL can be used because both functions are
called from a probe function and no spinlock is taken.
The call chain is:
rtl_pci_probe
--> rtl_pci_init
--> _rtl_pci_init_trx_ring
--> _rtl_pci_init_rx_ring
--> _rtl_pci_init_tx_ring
@@
@@
- PCI_DMA_BIDIRECTIONAL
+ DMA_BIDIRECTIONAL
@@
@@
- PCI_DMA_TODEVICE
+ DMA_TO_DEVICE
@@
@@
- PCI_DMA_FROMDEVICE
+ DMA_FROM_DEVICE
@@
@@
- PCI_DMA_NONE
+ DMA_NONE
@@
expression e1, e2, e3;
@@
- pci_alloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3;
@@
- pci_zalloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3, e4;
@@
- pci_free_consistent(e1, e2, e3, e4)
+ dma_free_coherent(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_single(e1, e2, e3, e4)
+ dma_map_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_single(e1, e2, e3, e4)
+ dma_unmap_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4, e5;
@@
- pci_map_page(e1, e2, e3, e4, e5)
+ dma_map_page(&e1->dev, e2, e3, e4, e5)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_page(e1, e2, e3, e4)
+ dma_unmap_page(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_sg(e1, e2, e3, e4)
+ dma_map_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_sg(e1, e2, e3, e4)
+ dma_unmap_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+ dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_device(e1, e2, e3, e4)
+ dma_sync_single_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+ dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+ dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2;
@@
- pci_dma_mapping_error(e1, e2)
+ dma_mapping_error(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_dma_mask(e1, e2)
+ dma_set_mask(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_consistent_dma_mask(e1, e2)
+ dma_set_coherent_mask(&e1->dev, e2)
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200907193828.318233-1-christophe.jaillet@wanadoo.fr
2020-09-07 21:38:28 +02:00
|
|
|
if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
|
2020-07-23 15:42:38 -05:00
|
|
|
rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
|
|
|
|
|
"DMA mapping error\n");
|
2014-09-26 16:40:23 -05:00
|
|
|
return;
|
|
|
|
|
}
|
2019-08-31 13:06:43 -05:00
|
|
|
clear_pci_tx_desc_content(pdesc, txdesc_len);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (firstseg)
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_offset(pdesc, txdesc_len);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_seq(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_linip(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_queue_sel(pdesc, fw_queue);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_first_seg(pdesc, 1);
|
|
|
|
|
set_tx_desc_last_seg(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_tx_buffer_address(pdesc, mapping);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_rate_id(pdesc, 7);
|
|
|
|
|
set_tx_desc_macid(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_own(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:43 -05:00
|
|
|
set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_first_seg(pdesc, 1);
|
|
|
|
|
set_tx_desc_last_seg(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_offset(pdesc, 40);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_use_rate(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
|
|
"H2C Tx Cmd Content\n", pdesc, txdesc_len);
|
|
|
|
|
}
|
|
|
|
|
|
2019-08-31 13:06:43 -05:00
|
|
|
void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
|
2014-09-26 16:40:23 -05:00
|
|
|
u8 desc_name, u8 *val)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
u8 q_idx = *val;
|
2017-09-29 14:47:53 -05:00
|
|
|
bool dma64 = rtlpriv->cfg->mod_params->dma64;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (istx) {
|
|
|
|
|
switch (desc_name) {
|
|
|
|
|
case HW_DESC_TX_NEXTDESC_ADDR:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case HW_DESC_OWN:{
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[q_idx];
|
|
|
|
|
u16 max_tx_desc = ring->entries;
|
|
|
|
|
|
|
|
|
|
if (q_idx == BEACON_QUEUE) {
|
|
|
|
|
ring->cur_tx_wp = 0;
|
|
|
|
|
ring->cur_tx_rp = 0;
|
2019-08-31 13:06:42 -05:00
|
|
|
set_tx_buff_desc_own(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2017-11-13 17:39:35 +08:00
|
|
|
/* make sure tx desc is available by caller */
|
2014-09-26 16:40:23 -05:00
|
|
|
ring->cur_tx_wp = ((ring->cur_tx_wp + 1) % max_tx_desc);
|
|
|
|
|
|
2017-11-13 17:39:35 +08:00
|
|
|
rtl_write_word(rtlpriv,
|
|
|
|
|
get_desc_addr_fr_q_idx(q_idx),
|
|
|
|
|
ring->cur_tx_wp);
|
2014-09-26 16:40:23 -05:00
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
switch (desc_name) {
|
|
|
|
|
case HW_DESC_RX_PREPARE:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_rx_buffer_desc_ls(pdesc, 0);
|
|
|
|
|
set_rx_buffer_desc_fs(pdesc, 0);
|
|
|
|
|
set_rx_buffer_desc_total_length(pdesc, 0);
|
2014-09-26 16:40:23 -05:00
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_rx_buffer_desc_data_length(pdesc,
|
2014-09-26 16:40:23 -05:00
|
|
|
MAX_RECEIVE_BUFFER_SIZE +
|
|
|
|
|
RX_DESC_SIZE);
|
|
|
|
|
|
2019-08-31 13:06:42 -05:00
|
|
|
set_rx_buffer_physical_low(pdesc, (*(dma_addr_t *)val) &
|
2017-09-29 14:47:53 -05:00
|
|
|
DMA_BIT_MASK(32));
|
2019-08-31 13:06:42 -05:00
|
|
|
set_rx_buffer_physical_high(pdesc,
|
2017-09-29 14:47:53 -05:00
|
|
|
((u64)(*(dma_addr_t *)val)
|
|
|
|
|
>> 32),
|
|
|
|
|
dma64);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case HW_DESC_RXERO:
|
2019-08-31 13:06:42 -05:00
|
|
|
set_rx_desc_eor(pdesc, 1);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
default:
|
2016-12-15 12:22:57 -06:00
|
|
|
WARN_ONCE(true,
|
|
|
|
|
"rtl8192ee: ERR rxdesc :%d not processed\n",
|
|
|
|
|
desc_name);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-09-29 14:47:53 -05:00
|
|
|
u64 rtl92ee_get_desc(struct ieee80211_hw *hw,
|
2019-08-31 13:06:43 -05:00
|
|
|
u8 *pdesc8, bool istx, u8 desc_name)
|
2014-09-26 16:40:23 -05:00
|
|
|
{
|
2017-09-29 14:47:53 -05:00
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
|
|
|
|
u64 ret = 0;
|
|
|
|
|
bool dma64 = rtlpriv->cfg->mod_params->dma64;
|
2019-08-31 13:06:43 -05:00
|
|
|
__le32 *pdesc = (__le32 *)pdesc8;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
if (istx) {
|
|
|
|
|
switch (desc_name) {
|
|
|
|
|
case HW_DESC_OWN:
|
2019-08-31 13:06:42 -05:00
|
|
|
ret = get_tx_desc_own(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case HW_DESC_TXBUFF_ADDR:
|
2019-08-31 13:06:42 -05:00
|
|
|
ret = get_txbuffer_desc_addr_low(pdesc, 1);
|
|
|
|
|
ret |= (u64)get_txbuffer_desc_addr_high(pdesc, 1,
|
2017-09-29 14:47:53 -05:00
|
|
|
dma64) << 32;
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
default:
|
2016-12-15 12:22:57 -06:00
|
|
|
WARN_ONCE(true,
|
|
|
|
|
"rtl8192ee: ERR txdesc :%d not processed\n",
|
|
|
|
|
desc_name);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
switch (desc_name) {
|
|
|
|
|
case HW_DESC_OWN:
|
2019-08-31 13:06:42 -05:00
|
|
|
ret = get_rx_desc_own(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case HW_DESC_RXPKT_LEN:
|
2019-08-31 13:06:42 -05:00
|
|
|
ret = get_rx_desc_pkt_len(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
case HW_DESC_RXBUFF_ADDR:
|
2019-08-31 13:06:42 -05:00
|
|
|
ret = get_rx_desc_buff_addr(pdesc);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
default:
|
2016-12-15 12:22:57 -06:00
|
|
|
WARN_ONCE(true,
|
|
|
|
|
"rtl8192ee: ERR rxdesc :%d not processed\n",
|
|
|
|
|
desc_name);
|
2014-09-26 16:40:23 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool rtl92ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
|
|
|
|
|
{
|
|
|
|
|
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
|
|
|
|
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
2017-11-13 17:39:35 +08:00
|
|
|
u16 read_point, write_point;
|
2014-09-26 16:40:23 -05:00
|
|
|
bool ret = false;
|
|
|
|
|
static u8 stop_report_cnt;
|
|
|
|
|
struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
|
|
|
|
|
|
2015-01-20 11:01:23 -06:00
|
|
|
{
|
2019-10-08 10:01:40 +08:00
|
|
|
u16 cur_tx_rp;
|
2019-08-31 13:06:44 -05:00
|
|
|
u32 tmpu32;
|
2014-09-26 16:40:23 -05:00
|
|
|
|
|
|
|
|
tmpu32 =
|
|
|
|
|
rtl_read_dword(rtlpriv,
|
|
|
|
|
get_desc_addr_fr_q_idx(hw_queue));
|
|
|
|
|
cur_tx_rp = (u16)((tmpu32 >> 16) & 0x0fff);
|
|
|
|
|
|
2017-11-13 17:39:35 +08:00
|
|
|
/* don't need to update ring->cur_tx_wp */
|
2014-09-26 16:40:23 -05:00
|
|
|
ring->cur_tx_rp = cur_tx_rp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
read_point = ring->cur_tx_rp;
|
|
|
|
|
write_point = ring->cur_tx_wp;
|
|
|
|
|
|
|
|
|
|
if (write_point > read_point) {
|
|
|
|
|
if (index < write_point && index >= read_point)
|
|
|
|
|
ret = false;
|
|
|
|
|
else
|
|
|
|
|
ret = true;
|
|
|
|
|
} else if (write_point < read_point) {
|
|
|
|
|
if (index > write_point && index < read_point)
|
|
|
|
|
ret = true;
|
|
|
|
|
else
|
|
|
|
|
ret = false;
|
|
|
|
|
} else {
|
|
|
|
|
if (index != read_point)
|
|
|
|
|
ret = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (hw_queue == BEACON_QUEUE)
|
|
|
|
|
ret = true;
|
|
|
|
|
|
|
|
|
|
if (rtlpriv->rtlhal.driver_is_goingto_unload ||
|
|
|
|
|
rtlpriv->psc.rfoff_reason > RF_CHANGE_BY_PS)
|
|
|
|
|
ret = true;
|
|
|
|
|
|
|
|
|
|
if (hw_queue < BEACON_QUEUE) {
|
|
|
|
|
if (!ret)
|
|
|
|
|
stop_report_cnt++;
|
|
|
|
|
else
|
|
|
|
|
stop_report_cnt = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void rtl92ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
|
|
|
|
|
{
|
|
|
|
|
}
|
