31 lines
919 B
C
31 lines
919 B
C
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#ifndef __INTEL_DMC_REGS_H__
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#define __INTEL_DMC_REGS_H__
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#include "i915_reg_defs.h"
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#define DMC_PROGRAM(addr, i) _MMIO((addr) + (i) * 4)
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#define DMC_SSP_BASE_ADDR_GEN9 0x00002FC0
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#define DMC_HTP_ADDR_SKL 0x00500034
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#define DMC_SSP_BASE _MMIO(0x8F074)
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#define DMC_HTP_SKL _MMIO(0x8F004)
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#define DMC_LAST_WRITE _MMIO(0x8F034)
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#define DMC_LAST_WRITE_VALUE 0xc003b400
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#define DMC_MMIO_START_RANGE 0x80000
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#define DMC_MMIO_END_RANGE 0x8FFFF
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#define SKL_DMC_DC3_DC5_COUNT _MMIO(0x80030)
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#define SKL_DMC_DC5_DC6_COUNT _MMIO(0x8002C)
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#define BXT_DMC_DC3_DC5_COUNT _MMIO(0x80038)
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#define TGL_DMC_DEBUG_DC5_COUNT _MMIO(0x101084)
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#define TGL_DMC_DEBUG_DC6_COUNT _MMIO(0x101088)
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#define DG1_DMC_DEBUG_DC5_COUNT _MMIO(0x134154)
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#define TGL_DMC_DEBUG3 _MMIO(0x101090)
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#define DG1_DMC_DEBUG3 _MMIO(0x13415c)
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#endif /* __INTEL_DMC_REGS_H__ */
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