2005-04-16 22:20:36 +00:00
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/* $Id: isdnl1.c,v 2.46.2.5 2004/02/11 13:21:34 keil Exp $
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*
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* common low level stuff for Siemens Chipsetbased isdn cards
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*
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* Author Karsten Keil
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* based on the teles driver from Jan den Ouden
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* Copyright by Karsten Keil <keil@isdn4linux.de>
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2012-02-20 03:52:38 +00:00
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*
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2005-04-16 22:20:36 +00:00
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* This software may be used and distributed according to the terms
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* of the GNU General Public License, incorporated herein by reference.
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*
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* For changes and modifications please read
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* Documentation/isdn/HiSax.cert
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*
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* Thanks to Jan den Ouden
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* Fritz Elfert
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* Beat Doebeli
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*
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*/
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#include <linux/init.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/gfp.h>
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2005-04-16 22:20:36 +00:00
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#include "hisax.h"
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#include "isdnl1.h"
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2009-02-25 13:11:03 +00:00
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const char *l1_revision = "$Revision: 2.46.2.5 $";
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2005-04-16 22:20:36 +00:00
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#define TIMER3_VALUE 7000
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static struct Fsm l1fsm_b;
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static struct Fsm l1fsm_s;
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enum {
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ST_L1_F2,
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ST_L1_F3,
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ST_L1_F4,
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ST_L1_F5,
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ST_L1_F6,
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ST_L1_F7,
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ST_L1_F8,
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};
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2012-02-20 03:52:38 +00:00
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#define L1S_STATE_COUNT (ST_L1_F8 + 1)
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2005-04-16 22:20:36 +00:00
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static char *strL1SState[] =
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{
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"ST_L1_F2",
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"ST_L1_F3",
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"ST_L1_F4",
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"ST_L1_F5",
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"ST_L1_F6",
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"ST_L1_F7",
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"ST_L1_F8",
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};
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#ifdef HISAX_UINTERFACE
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static
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struct Fsm l1fsm_u =
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{NULL, 0, 0, NULL, NULL};
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enum {
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ST_L1_RESET,
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ST_L1_DEACT,
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ST_L1_SYNC2,
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ST_L1_TRANS,
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};
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2012-02-20 03:52:38 +00:00
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#define L1U_STATE_COUNT (ST_L1_TRANS + 1)
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2005-04-16 22:20:36 +00:00
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static char *strL1UState[] =
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{
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"ST_L1_RESET",
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"ST_L1_DEACT",
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"ST_L1_SYNC2",
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"ST_L1_TRANS",
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};
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#endif
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enum {
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ST_L1_NULL,
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ST_L1_WAIT_ACT,
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ST_L1_WAIT_DEACT,
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ST_L1_ACTIV,
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};
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2012-02-20 03:52:38 +00:00
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#define L1B_STATE_COUNT (ST_L1_ACTIV + 1)
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2005-04-16 22:20:36 +00:00
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static char *strL1BState[] =
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{
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"ST_L1_NULL",
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"ST_L1_WAIT_ACT",
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"ST_L1_WAIT_DEACT",
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"ST_L1_ACTIV",
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};
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enum {
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EV_PH_ACTIVATE,
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EV_PH_DEACTIVATE,
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EV_RESET_IND,
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EV_DEACT_CNF,
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EV_DEACT_IND,
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EV_POWER_UP,
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2012-02-20 03:52:38 +00:00
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EV_RSYNC_IND,
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2005-04-16 22:20:36 +00:00
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EV_INFO2_IND,
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EV_INFO4_IND,
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EV_TIMER_DEACT,
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EV_TIMER_ACT,
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EV_TIMER3,
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};
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#define L1_EVENT_COUNT (EV_TIMER3 + 1)
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static char *strL1Event[] =
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{
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"EV_PH_ACTIVATE",
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"EV_PH_DEACTIVATE",
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"EV_RESET_IND",
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"EV_DEACT_CNF",
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"EV_DEACT_IND",
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"EV_POWER_UP",
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2012-02-20 03:52:38 +00:00
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"EV_RSYNC_IND",
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2005-04-16 22:20:36 +00:00
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"EV_INFO2_IND",
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"EV_INFO4_IND",
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"EV_TIMER_DEACT",
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"EV_TIMER_ACT",
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"EV_TIMER3",
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};
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void
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debugl1(struct IsdnCardState *cs, char *fmt, ...)
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{
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va_list args;
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char tmp[8];
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2012-02-20 03:52:38 +00:00
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2005-04-16 22:20:36 +00:00
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va_start(args, fmt);
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sprintf(tmp, "Card%d ", cs->cardnr + 1);
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VHiSax_putstatus(cs, tmp, fmt, args);
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va_end(args);
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}
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static void
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l1m_debug(struct FsmInst *fi, char *fmt, ...)
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{
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va_list args;
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struct PStack *st = fi->userdata;
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struct IsdnCardState *cs = st->l1.hardware;
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char tmp[8];
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2012-02-20 03:52:38 +00:00
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2005-04-16 22:20:36 +00:00
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va_start(args, fmt);
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sprintf(tmp, "Card%d ", cs->cardnr + 1);
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VHiSax_putstatus(cs, tmp, fmt, args);
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va_end(args);
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}
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2005-06-25 21:59:18 +00:00
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static void
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2005-04-16 22:20:36 +00:00
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L1activated(struct IsdnCardState *cs)
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{
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struct PStack *st;
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st = cs->stlist;
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while (st) {
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if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags))
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st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
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else
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st->l1.l1l2(st, PH_ACTIVATE | INDICATION, NULL);
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st = st->next;
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}
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}
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2005-06-25 21:59:18 +00:00
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static void
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2005-04-16 22:20:36 +00:00
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L1deactivated(struct IsdnCardState *cs)
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{
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struct PStack *st;
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st = cs->stlist;
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while (st) {
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if (test_bit(FLG_L1_DBUSY, &cs->HW_Flags))
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st->l1.l1l2(st, PH_PAUSE | CONFIRM, NULL);
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st->l1.l1l2(st, PH_DEACTIVATE | INDICATION, NULL);
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st = st->next;
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}
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test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags);
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}
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void
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DChannel_proc_xmt(struct IsdnCardState *cs)
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{
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struct PStack *stptr;
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if (cs->tx_skb)
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return;
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stptr = cs->stlist;
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while (stptr != NULL) {
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if (test_and_clear_bit(FLG_L1_PULL_REQ, &stptr->l1.Flags)) {
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stptr->l1.l1l2(stptr, PH_PULL | CONFIRM, NULL);
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break;
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} else
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stptr = stptr->next;
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}
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}
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void
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DChannel_proc_rcv(struct IsdnCardState *cs)
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{
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struct sk_buff *skb, *nskb;
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struct PStack *stptr = cs->stlist;
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int found, tei, sapi;
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if (stptr)
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if (test_bit(FLG_L1_ACTTIMER, &stptr->l1.Flags))
|
2012-02-20 03:52:38 +00:00
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FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL);
|
2005-04-16 22:20:36 +00:00
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while ((skb = skb_dequeue(&cs->rq))) {
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#ifdef L2FRAME_DEBUG /* psa */
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if (cs->debug & L1_DEB_LAPD)
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Logl2Frame(cs, skb, "PH_DATA", 1);
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#endif
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stptr = cs->stlist;
|
2012-02-20 03:52:38 +00:00
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if (skb->len < 3) {
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debugl1(cs, "D-channel frame too short(%d)", skb->len);
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2005-04-16 22:20:36 +00:00
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dev_kfree_skb(skb);
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return;
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}
|
2012-02-20 03:52:38 +00:00
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if ((skb->data[0] & 1) || !(skb->data[1] & 1)) {
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2005-04-16 22:20:36 +00:00
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debugl1(cs, "D-channel frame wrong EA0/EA1");
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dev_kfree_skb(skb);
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return;
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}
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sapi = skb->data[0] >> 2;
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tei = skb->data[1] >> 1;
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if (cs->debug & DEB_DLOG_HEX)
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LogFrame(cs, skb->data, skb->len);
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if (cs->debug & DEB_DLOG_VERBOSE)
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dlogframe(cs, skb, 1);
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if (tei == GROUP_TEI) {
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if (sapi == CTRL_SAPI) { /* sapi 0 */
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while (stptr != NULL) {
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if ((nskb = skb_clone(skb, GFP_ATOMIC)))
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stptr->l1.l1l2(stptr, PH_DATA | INDICATION, nskb);
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else
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printk(KERN_WARNING "HiSax: isdn broadcast buffer shortage\n");
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stptr = stptr->next;
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}
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} else if (sapi == TEI_SAPI) {
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while (stptr != NULL) {
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if ((nskb = skb_clone(skb, GFP_ATOMIC)))
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stptr->l1.l1tei(stptr, PH_DATA | INDICATION, nskb);
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else
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printk(KERN_WARNING "HiSax: tei broadcast buffer shortage\n");
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stptr = stptr->next;
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}
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}
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dev_kfree_skb(skb);
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|
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} else if (sapi == CTRL_SAPI) { /* sapi 0 */
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found = 0;
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|
|
while (stptr != NULL)
|
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|
|
if (tei == stptr->l2.tei) {
|
|
|
|
stptr->l1.l1l2(stptr, PH_DATA | INDICATION, skb);
|
|
|
|
found = !0;
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|
|
break;
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|
} else
|
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|
|
stptr = stptr->next;
|
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|
|
if (!found)
|
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|
|
dev_kfree_skb(skb);
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|
} else
|
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|
|
dev_kfree_skb(skb);
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|
}
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|
}
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|
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|
static void
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|
|
BChannel_proc_xmt(struct BCState *bcs)
|
|
|
|
{
|
|
|
|
struct PStack *st = bcs->st;
|
|
|
|
|
|
|
|
if (test_bit(BC_FLG_BUSY, &bcs->Flag)) {
|
|
|
|
debugl1(bcs->cs, "BC_BUSY Error");
|
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|
|
return;
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|
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|
}
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|
if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags))
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|
|
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
|
|
|
|
if (!test_bit(BC_FLG_ACTIV, &bcs->Flag)) {
|
2005-07-08 21:57:23 +00:00
|
|
|
if (!test_bit(BC_FLG_BUSY, &bcs->Flag) &&
|
|
|
|
skb_queue_empty(&bcs->squeue)) {
|
2005-04-16 22:20:36 +00:00
|
|
|
st->l2.l2l1(st, PH_DEACTIVATE | CONFIRM, NULL);
|
|
|
|
}
|
|
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|
}
|
|
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|
}
|
|
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|
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|
|
|
static void
|
|
|
|
BChannel_proc_rcv(struct BCState *bcs)
|
|
|
|
{
|
|
|
|
struct sk_buff *skb;
|
|
|
|
|
|
|
|
if (bcs->st->l1.l1m.state == ST_L1_WAIT_ACT) {
|
|
|
|
FsmDelTimer(&bcs->st->l1.timer, 4);
|
|
|
|
FsmEvent(&bcs->st->l1.l1m, EV_TIMER_ACT, NULL);
|
|
|
|
}
|
|
|
|
while ((skb = skb_dequeue(&bcs->rqueue))) {
|
|
|
|
bcs->st->l1.l1l2(bcs->st, PH_DATA | INDICATION, skb);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
BChannel_proc_ack(struct BCState *bcs)
|
|
|
|
{
|
|
|
|
u_long flags;
|
|
|
|
int ack;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&bcs->aclock, flags);
|
|
|
|
ack = bcs->ackcnt;
|
|
|
|
bcs->ackcnt = 0;
|
|
|
|
spin_unlock_irqrestore(&bcs->aclock, flags);
|
|
|
|
if (ack)
|
|
|
|
lli_writewakeup(bcs->st, ack);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2006-11-22 14:57:56 +00:00
|
|
|
BChannel_bh(struct work_struct *work)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2006-11-22 14:57:56 +00:00
|
|
|
struct BCState *bcs = container_of(work, struct BCState, tqueue);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
if (!bcs)
|
|
|
|
return;
|
|
|
|
if (test_and_clear_bit(B_RCVBUFREADY, &bcs->event))
|
|
|
|
BChannel_proc_rcv(bcs);
|
|
|
|
if (test_and_clear_bit(B_XMTBUFREADY, &bcs->event))
|
|
|
|
BChannel_proc_xmt(bcs);
|
|
|
|
if (test_and_clear_bit(B_ACKPENDING, &bcs->event))
|
|
|
|
BChannel_proc_ack(bcs);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
HiSax_addlist(struct IsdnCardState *cs,
|
|
|
|
struct PStack *st)
|
|
|
|
{
|
|
|
|
st->next = cs->stlist;
|
|
|
|
cs->stlist = st;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
HiSax_rmlist(struct IsdnCardState *cs,
|
|
|
|
struct PStack *st)
|
|
|
|
{
|
|
|
|
struct PStack *p;
|
|
|
|
|
|
|
|
FsmDelTimer(&st->l1.timer, 0);
|
|
|
|
if (cs->stlist == st)
|
|
|
|
cs->stlist = st->next;
|
|
|
|
else {
|
|
|
|
p = cs->stlist;
|
|
|
|
while (p)
|
|
|
|
if (p->next == st) {
|
|
|
|
p->next = st->next;
|
|
|
|
return;
|
|
|
|
} else
|
|
|
|
p = p->next;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
init_bcstate(struct IsdnCardState *cs, int bc)
|
|
|
|
{
|
|
|
|
struct BCState *bcs = cs->bcs + bc;
|
|
|
|
|
|
|
|
bcs->cs = cs;
|
|
|
|
bcs->channel = bc;
|
2006-11-22 14:57:56 +00:00
|
|
|
INIT_WORK(&bcs->tqueue, BChannel_bh);
|
2005-04-16 22:20:36 +00:00
|
|
|
spin_lock_init(&bcs->aclock);
|
|
|
|
bcs->BC_SetStack = NULL;
|
|
|
|
bcs->BC_Close = NULL;
|
|
|
|
bcs->Flag = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef L2FRAME_DEBUG /* psa */
|
|
|
|
|
2005-06-25 21:59:18 +00:00
|
|
|
static char *
|
2005-04-16 22:20:36 +00:00
|
|
|
l2cmd(u_char cmd)
|
|
|
|
{
|
|
|
|
switch (cmd & ~0x10) {
|
2012-02-20 03:52:38 +00:00
|
|
|
case 1:
|
|
|
|
return "RR";
|
|
|
|
case 5:
|
|
|
|
return "RNR";
|
|
|
|
case 9:
|
|
|
|
return "REJ";
|
|
|
|
case 0x6f:
|
|
|
|
return "SABME";
|
|
|
|
case 0x0f:
|
|
|
|
return "DM";
|
|
|
|
case 3:
|
|
|
|
return "UI";
|
|
|
|
case 0x43:
|
|
|
|
return "DISC";
|
|
|
|
case 0x63:
|
|
|
|
return "UA";
|
|
|
|
case 0x87:
|
|
|
|
return "FRMR";
|
|
|
|
case 0xaf:
|
|
|
|
return "XID";
|
|
|
|
default:
|
|
|
|
if (!(cmd & 1))
|
|
|
|
return "I";
|
|
|
|
else
|
|
|
|
return "invalid command";
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static char tmpdeb[32];
|
|
|
|
|
2005-06-25 21:59:18 +00:00
|
|
|
static char *
|
2012-02-20 03:52:38 +00:00
|
|
|
l2frames(u_char *ptr)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
switch (ptr[2] & ~0x10) {
|
2012-02-20 03:52:38 +00:00
|
|
|
case 1:
|
|
|
|
case 5:
|
|
|
|
case 9:
|
|
|
|
sprintf(tmpdeb, "%s[%d](nr %d)", l2cmd(ptr[2]), ptr[3] & 1, ptr[3] >> 1);
|
|
|
|
break;
|
|
|
|
case 0x6f:
|
|
|
|
case 0x0f:
|
|
|
|
case 3:
|
|
|
|
case 0x43:
|
|
|
|
case 0x63:
|
|
|
|
case 0x87:
|
|
|
|
case 0xaf:
|
|
|
|
sprintf(tmpdeb, "%s[%d]", l2cmd(ptr[2]), (ptr[2] & 0x10) >> 4);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (!(ptr[2] & 1)) {
|
|
|
|
sprintf(tmpdeb, "I[%d](ns %d, nr %d)", ptr[3] & 1, ptr[2] >> 1, ptr[3] >> 1);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
2012-02-20 03:52:38 +00:00
|
|
|
} else
|
|
|
|
return "invalid command";
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return tmpdeb;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir)
|
|
|
|
{
|
|
|
|
u_char *ptr;
|
|
|
|
|
|
|
|
ptr = skb->data;
|
|
|
|
|
|
|
|
if (ptr[0] & 1 || !(ptr[1] & 1))
|
|
|
|
debugl1(cs, "Address not LAPD");
|
|
|
|
else
|
|
|
|
debugl1(cs, "%s %s: %s%c (sapi %d, tei %d)",
|
|
|
|
(dir ? "<-" : "->"), buf, l2frames(ptr),
|
|
|
|
((ptr[0] & 2) >> 1) == dir ? 'C' : 'R', ptr[0] >> 2, ptr[1] >> 1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_reset(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
FsmChangeState(fi, ST_L1_F3);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_deact_cnf(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_F3);
|
|
|
|
if (test_bit(FLG_L1_ACTIVATING, &st->l1.Flags))
|
|
|
|
st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_deact_req_s(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_F3);
|
|
|
|
FsmRestartTimer(&st->l1.timer, 550, EV_TIMER_DEACT, NULL, 2);
|
|
|
|
test_and_set_bit(FLG_L1_DEACTTIMER, &st->l1.Flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_power_up_s(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
if (test_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) {
|
|
|
|
FsmChangeState(fi, ST_L1_F4);
|
|
|
|
st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL);
|
|
|
|
FsmRestartTimer(&st->l1.timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);
|
|
|
|
test_and_set_bit(FLG_L1_T3RUN, &st->l1.Flags);
|
|
|
|
} else
|
|
|
|
FsmChangeState(fi, ST_L1_F3);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_go_F5(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
FsmChangeState(fi, ST_L1_F5);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_go_F8(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
FsmChangeState(fi, ST_L1_F8);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_info2_ind(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
if (test_bit(FLG_L1_UINT, &st->l1.Flags))
|
|
|
|
FsmChangeState(fi, ST_L1_SYNC2);
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
FsmChangeState(fi, ST_L1_F6);
|
|
|
|
st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_info4_ind(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
if (test_bit(FLG_L1_UINT, &st->l1.Flags))
|
|
|
|
FsmChangeState(fi, ST_L1_TRANS);
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
FsmChangeState(fi, ST_L1_F7);
|
|
|
|
st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL);
|
|
|
|
if (test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags))
|
|
|
|
FsmDelTimer(&st->l1.timer, 4);
|
|
|
|
if (!test_bit(FLG_L1_ACTIVATED, &st->l1.Flags)) {
|
|
|
|
if (test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags))
|
|
|
|
FsmDelTimer(&st->l1.timer, 3);
|
|
|
|
FsmRestartTimer(&st->l1.timer, 110, EV_TIMER_ACT, NULL, 2);
|
|
|
|
test_and_set_bit(FLG_L1_ACTTIMER, &st->l1.Flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_timer3(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
2012-02-20 03:52:38 +00:00
|
|
|
test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags))
|
|
|
|
L1deactivated(st->l1.hardware);
|
|
|
|
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
if (!test_bit(FLG_L1_UINT, &st->l1.Flags))
|
|
|
|
#endif
|
2012-02-20 03:52:38 +00:00
|
|
|
if (st->l1.l1m.state != ST_L1_F6) {
|
|
|
|
FsmChangeState(fi, ST_L1_F3);
|
|
|
|
st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_timer_act(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
2012-02-20 03:52:38 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
test_and_clear_bit(FLG_L1_ACTTIMER, &st->l1.Flags);
|
|
|
|
test_and_set_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
|
|
|
|
L1activated(st->l1.hardware);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_timer_deact(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
2012-02-20 03:52:38 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags);
|
|
|
|
test_and_clear_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
|
|
|
|
L1deactivated(st->l1.hardware);
|
|
|
|
st->l1.l1hw(st, HW_DEACTIVATE | RESPONSE, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_activate_s(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
2012-02-20 03:52:38 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
st->l1.l1hw(st, HW_RESET | REQUEST, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_activate_no(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
if ((!test_bit(FLG_L1_DEACTTIMER, &st->l1.Flags)) && (!test_bit(FLG_L1_T3RUN, &st->l1.Flags))) {
|
|
|
|
test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags);
|
|
|
|
L1deactivated(st->l1.hardware);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct FsmNode L1SFnList[] __initdata =
|
|
|
|
{
|
|
|
|
{ST_L1_F3, EV_PH_ACTIVATE, l1_activate_s},
|
|
|
|
{ST_L1_F6, EV_PH_ACTIVATE, l1_activate_no},
|
|
|
|
{ST_L1_F8, EV_PH_ACTIVATE, l1_activate_no},
|
|
|
|
{ST_L1_F3, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F4, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F5, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F6, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F7, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F8, EV_RESET_IND, l1_reset},
|
|
|
|
{ST_L1_F3, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F4, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F5, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F6, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F7, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F8, EV_DEACT_CNF, l1_deact_cnf},
|
|
|
|
{ST_L1_F6, EV_DEACT_IND, l1_deact_req_s},
|
|
|
|
{ST_L1_F7, EV_DEACT_IND, l1_deact_req_s},
|
|
|
|
{ST_L1_F8, EV_DEACT_IND, l1_deact_req_s},
|
|
|
|
{ST_L1_F3, EV_POWER_UP, l1_power_up_s},
|
|
|
|
{ST_L1_F4, EV_RSYNC_IND, l1_go_F5},
|
|
|
|
{ST_L1_F6, EV_RSYNC_IND, l1_go_F8},
|
|
|
|
{ST_L1_F7, EV_RSYNC_IND, l1_go_F8},
|
|
|
|
{ST_L1_F3, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_F4, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_F5, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_F7, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_F8, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_F3, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_F4, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_F5, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_F6, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_F8, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_F3, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_F4, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_F5, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_F6, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_F8, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_F7, EV_TIMER_ACT, l1_timer_act},
|
|
|
|
{ST_L1_F3, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_F4, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_F5, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_F6, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_F7, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_F8, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
};
|
|
|
|
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
static void
|
|
|
|
l1_deact_req_u(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_RESET);
|
|
|
|
FsmRestartTimer(&st->l1.timer, 550, EV_TIMER_DEACT, NULL, 2);
|
|
|
|
test_and_set_bit(FLG_L1_DEACTTIMER, &st->l1.Flags);
|
|
|
|
st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_power_up_u(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmRestartTimer(&st->l1.timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);
|
|
|
|
test_and_set_bit(FLG_L1_T3RUN, &st->l1.Flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_info0_ind(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
FsmChangeState(fi, ST_L1_DEACT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1_activate_u(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
2012-02-20 03:52:38 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
st->l1.l1hw(st, HW_INFO1 | REQUEST, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct FsmNode L1UFnList[] __initdata =
|
|
|
|
{
|
|
|
|
{ST_L1_RESET, EV_DEACT_IND, l1_deact_req_u},
|
|
|
|
{ST_L1_DEACT, EV_DEACT_IND, l1_deact_req_u},
|
|
|
|
{ST_L1_SYNC2, EV_DEACT_IND, l1_deact_req_u},
|
|
|
|
{ST_L1_TRANS, EV_DEACT_IND, l1_deact_req_u},
|
|
|
|
{ST_L1_DEACT, EV_PH_ACTIVATE, l1_activate_u},
|
|
|
|
{ST_L1_DEACT, EV_POWER_UP, l1_power_up_u},
|
|
|
|
{ST_L1_DEACT, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_TRANS, EV_INFO2_IND, l1_info2_ind},
|
|
|
|
{ST_L1_RESET, EV_DEACT_CNF, l1_info0_ind},
|
|
|
|
{ST_L1_DEACT, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_SYNC2, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_RESET, EV_INFO4_IND, l1_info4_ind},
|
|
|
|
{ST_L1_DEACT, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_SYNC2, EV_TIMER3, l1_timer3},
|
|
|
|
{ST_L1_TRANS, EV_TIMER_ACT, l1_timer_act},
|
|
|
|
{ST_L1_DEACT, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_SYNC2, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
{ST_L1_RESET, EV_TIMER_DEACT, l1_timer_deact},
|
|
|
|
};
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1b_activate(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_WAIT_ACT);
|
|
|
|
FsmRestartTimer(&st->l1.timer, st->l1.delay, EV_TIMER_ACT, NULL, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1b_deactivate(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_WAIT_DEACT);
|
|
|
|
FsmRestartTimer(&st->l1.timer, 10, EV_TIMER_DEACT, NULL, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1b_timer_act(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_ACTIV);
|
|
|
|
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
l1b_timer_deact(struct FsmInst *fi, int event, void *arg)
|
|
|
|
{
|
|
|
|
struct PStack *st = fi->userdata;
|
|
|
|
|
|
|
|
FsmChangeState(fi, ST_L1_NULL);
|
|
|
|
st->l2.l2l1(st, PH_DEACTIVATE | CONFIRM, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct FsmNode L1BFnList[] __initdata =
|
|
|
|
{
|
|
|
|
{ST_L1_NULL, EV_PH_ACTIVATE, l1b_activate},
|
|
|
|
{ST_L1_WAIT_ACT, EV_TIMER_ACT, l1b_timer_act},
|
|
|
|
{ST_L1_ACTIV, EV_PH_DEACTIVATE, l1b_deactivate},
|
|
|
|
{ST_L1_WAIT_DEACT, EV_TIMER_DEACT, l1b_timer_deact},
|
|
|
|
};
|
|
|
|
|
2012-02-20 03:52:38 +00:00
|
|
|
int __init
|
2005-04-16 22:20:36 +00:00
|
|
|
Isdnl1New(void)
|
|
|
|
{
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
l1fsm_s.state_count = L1S_STATE_COUNT;
|
|
|
|
l1fsm_s.event_count = L1_EVENT_COUNT;
|
|
|
|
l1fsm_s.strEvent = strL1Event;
|
|
|
|
l1fsm_s.strState = strL1SState;
|
2009-07-24 16:26:08 +00:00
|
|
|
retval = FsmNew(&l1fsm_s, L1SFnList, ARRAY_SIZE(L1SFnList));
|
2005-04-16 22:20:36 +00:00
|
|
|
if (retval)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
l1fsm_b.state_count = L1B_STATE_COUNT;
|
|
|
|
l1fsm_b.event_count = L1_EVENT_COUNT;
|
|
|
|
l1fsm_b.strEvent = strL1Event;
|
|
|
|
l1fsm_b.strState = strL1BState;
|
2009-07-24 16:26:08 +00:00
|
|
|
retval = FsmNew(&l1fsm_b, L1BFnList, ARRAY_SIZE(L1BFnList));
|
2005-04-16 22:20:36 +00:00
|
|
|
if (retval) {
|
|
|
|
FsmFree(&l1fsm_s);
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
l1fsm_u.state_count = L1U_STATE_COUNT;
|
|
|
|
l1fsm_u.event_count = L1_EVENT_COUNT;
|
|
|
|
l1fsm_u.strEvent = strL1Event;
|
|
|
|
l1fsm_u.strState = strL1UState;
|
2009-07-24 16:26:08 +00:00
|
|
|
retval = FsmNew(&l1fsm_u, L1UFnList, ARRAY_SIZE(L1UFnList));
|
2005-04-16 22:20:36 +00:00
|
|
|
if (retval) {
|
|
|
|
FsmFree(&l1fsm_s);
|
|
|
|
FsmFree(&l1fsm_b);
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void Isdnl1Free(void)
|
|
|
|
{
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
FsmFree(&l1fsm_u);
|
|
|
|
#endif
|
|
|
|
FsmFree(&l1fsm_s);
|
|
|
|
FsmFree(&l1fsm_b);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
dch_l2l1(struct PStack *st, int pr, void *arg)
|
|
|
|
{
|
|
|
|
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
|
|
|
|
|
|
|
|
switch (pr) {
|
2012-02-20 03:52:38 +00:00
|
|
|
case (PH_DATA | REQUEST):
|
|
|
|
case (PH_PULL | REQUEST):
|
|
|
|
case (PH_PULL | INDICATION):
|
|
|
|
st->l1.l1hw(st, pr, arg);
|
|
|
|
break;
|
|
|
|
case (PH_ACTIVATE | REQUEST):
|
|
|
|
if (cs->debug)
|
|
|
|
debugl1(cs, "PH_ACTIVATE_REQ %s",
|
|
|
|
st->l1.l1m.fsm->strState[st->l1.l1m.state]);
|
|
|
|
if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags))
|
|
|
|
st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
|
|
|
|
else {
|
|
|
|
test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags);
|
|
|
|
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case (PH_TESTLOOP | REQUEST):
|
|
|
|
if (1 & (long) arg)
|
|
|
|
debugl1(cs, "PH_TEST_LOOP B1");
|
|
|
|
if (2 & (long) arg)
|
|
|
|
debugl1(cs, "PH_TEST_LOOP B2");
|
|
|
|
if (!(3 & (long) arg))
|
|
|
|
debugl1(cs, "PH_TEST_LOOP DISABLED");
|
|
|
|
st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (cs->debug)
|
|
|
|
debugl1(cs, "dch_l2l1 msg %04X unhandled", pr);
|
|
|
|
break;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
l1_msg(struct IsdnCardState *cs, int pr, void *arg) {
|
|
|
|
struct PStack *st;
|
|
|
|
|
|
|
|
st = cs->stlist;
|
2012-02-20 03:52:38 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
while (st) {
|
2012-02-20 03:52:38 +00:00
|
|
|
switch (pr) {
|
|
|
|
case (HW_RESET | INDICATION):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_RESET_IND, arg);
|
|
|
|
break;
|
|
|
|
case (HW_DEACTIVATE | CONFIRM):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg);
|
|
|
|
break;
|
|
|
|
case (HW_DEACTIVATE | INDICATION):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg);
|
|
|
|
break;
|
|
|
|
case (HW_POWERUP | CONFIRM):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_POWER_UP, arg);
|
|
|
|
break;
|
|
|
|
case (HW_RSYNC | INDICATION):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg);
|
|
|
|
break;
|
|
|
|
case (HW_INFO2 | INDICATION):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg);
|
|
|
|
break;
|
|
|
|
case (HW_INFO4_P8 | INDICATION):
|
|
|
|
case (HW_INFO4_P10 | INDICATION):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (cs->debug)
|
2014-12-07 19:20:47 +00:00
|
|
|
debugl1(cs, "%s %04X unhandled", __func__, pr);
|
2012-02-20 03:52:38 +00:00
|
|
|
break;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
st = st->next;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
l1_msg_b(struct PStack *st, int pr, void *arg) {
|
2012-02-20 03:52:38 +00:00
|
|
|
switch (pr) {
|
|
|
|
case (PH_ACTIVATE | REQUEST):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL);
|
|
|
|
break;
|
|
|
|
case (PH_DEACTIVATE | REQUEST):
|
|
|
|
FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL);
|
|
|
|
break;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
setstack_HiSax(struct PStack *st, struct IsdnCardState *cs)
|
|
|
|
{
|
|
|
|
st->l1.hardware = cs;
|
|
|
|
st->protocol = cs->protocol;
|
|
|
|
st->l1.l1m.fsm = &l1fsm_s;
|
|
|
|
st->l1.l1m.state = ST_L1_F3;
|
|
|
|
st->l1.Flags = 0;
|
|
|
|
#ifdef HISAX_UINTERFACE
|
|
|
|
if (test_bit(FLG_HW_L1_UINT, &cs->HW_Flags)) {
|
|
|
|
st->l1.l1m.fsm = &l1fsm_u;
|
|
|
|
st->l1.l1m.state = ST_L1_RESET;
|
|
|
|
st->l1.Flags = FLG_L1_UINT;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
st->l1.l1m.debug = cs->debug;
|
|
|
|
st->l1.l1m.userdata = st;
|
|
|
|
st->l1.l1m.userint = 0;
|
|
|
|
st->l1.l1m.printdebug = l1m_debug;
|
|
|
|
FsmInitTimer(&st->l1.l1m, &st->l1.timer);
|
|
|
|
setstack_tei(st);
|
|
|
|
setstack_manager(st);
|
|
|
|
st->l1.stlistp = &(cs->stlist);
|
|
|
|
st->l2.l2l1 = dch_l2l1;
|
|
|
|
if (cs->setstack_d)
|
|
|
|
cs->setstack_d(st, cs);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
setstack_l1_B(struct PStack *st)
|
|
|
|
{
|
|
|
|
struct IsdnCardState *cs = st->l1.hardware;
|
|
|
|
|
|
|
|
st->l1.l1m.fsm = &l1fsm_b;
|
|
|
|
st->l1.l1m.state = ST_L1_NULL;
|
|
|
|
st->l1.l1m.debug = cs->debug;
|
|
|
|
st->l1.l1m.userdata = st;
|
|
|
|
st->l1.l1m.userint = 0;
|
|
|
|
st->l1.l1m.printdebug = l1m_debug;
|
|
|
|
st->l1.Flags = 0;
|
|
|
|
FsmInitTimer(&st->l1.l1m, &st->l1.timer);
|
|
|
|
}
|