2005-09-26 06:04:21 +00:00
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/*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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2007-05-03 12:31:38 +00:00
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#include <linux/suspend.h>
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2008-02-05 05:16:48 +00:00
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#include <linux/hrtimer.h>
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2005-09-28 14:35:31 +00:00
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#ifdef CONFIG_PPC64
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2005-09-26 06:04:21 +00:00
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#include <linux/time.h>
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#include <linux/hardirq.h>
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2005-09-28 14:35:31 +00:00
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#endif
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2008-04-29 08:04:08 +00:00
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#include <linux/kbuild.h>
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2005-09-28 14:35:31 +00:00
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2005-09-26 06:04:21 +00:00
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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2005-10-26 07:05:24 +00:00
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#include <asm/rtas.h>
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2005-11-11 10:15:21 +00:00
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#include <asm/vdso_datapage.h>
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2005-09-26 06:04:21 +00:00
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#include <asm/cache.h>
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#include <asm/compat.h>
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2006-08-09 07:00:30 +00:00
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#include <asm/mmu.h>
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2006-09-13 18:32:39 +00:00
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#include <asm/hvcall.h>
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2005-09-26 06:04:21 +00:00
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#endif
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2008-04-10 06:39:18 +00:00
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#ifdef CONFIG_PPC_ISERIES
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#include <asm/iseries/alpaca.h>
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#endif
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2008-11-05 15:36:18 +00:00
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#ifdef CONFIG_KVM
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2009-01-03 22:23:08 +00:00
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#include <linux/kvm_host.h>
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2010-04-15 22:11:44 +00:00
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#ifndef CONFIG_BOOKE
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#include <asm/kvm_book3s.h>
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#endif
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2008-11-05 15:36:18 +00:00
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#endif
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2005-09-26 06:04:21 +00:00
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2009-07-28 01:59:34 +00:00
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#ifdef CONFIG_PPC32
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2008-04-30 10:23:21 +00:00
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#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
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#include "head_booke.h"
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#endif
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2009-07-28 01:59:34 +00:00
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#endif
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2008-04-30 10:23:21 +00:00
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2008-12-09 03:34:55 +00:00
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#if defined(CONFIG_FSL_BOOKE)
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#include "../mm/mmu_decl.h"
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#endif
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2005-09-26 06:04:21 +00:00
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int main(void)
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{
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2005-09-28 14:35:31 +00:00
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DEFINE(THREAD, offsetof(struct task_struct, thread));
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DEFINE(MM, offsetof(struct task_struct, mm));
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2008-12-18 19:13:24 +00:00
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DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
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2005-09-26 06:04:21 +00:00
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#ifdef CONFIG_PPC64
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2005-09-28 14:35:31 +00:00
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DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
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powerpc: Allow perf_counters to access user memory at interrupt time
This provides a mechanism to allow the perf_counters code to access
user memory in a PMU interrupt routine. Such an access can cause
various kinds of interrupt: SLB miss, MMU hash table miss, segment
table miss, or TLB miss, depending on the processor. This commit
only deals with 64-bit classic/server processors, which use an MMU
hash table. 32-bit processors are already able to access user memory
at interrupt time. Since we don't soft-disable on 32-bit, we avoid
the possibility of reentering hash_page or the TLB miss handlers,
since they run with interrupts disabled.
On 64-bit processors, an SLB miss interrupt on a user address will
update the slb_cache and slb_cache_ptr fields in the paca. This is
OK except in the case where a PMU interrupt occurs in switch_slb,
which also accesses those fields. To prevent this, we hard-disable
interrupts in switch_slb. Interrupts are already soft-disabled at
this point, and will get hard-enabled when they get soft-enabled
later.
This also reworks slb_flush_and_rebolt: to avoid hard-disabling twice,
and to make sure that it clears the slb_cache_ptr when called from
other callers than switch_slb, the existing routine is renamed to
__slb_flush_and_rebolt, which is called by switch_slb and the new
version of slb_flush_and_rebolt.
Similarly, switch_stab (used on POWER3 and RS64 processors) gets a
hard_irq_disable() to protect the per-cpu variables used there and
in ste_allocate.
If a MMU hashtable miss interrupt occurs, normally we would call
hash_page to look up the Linux PTE for the address and create a HPTE.
However, hash_page is fairly complex and takes some locks, so to
avoid the possibility of deadlock, we check the preemption count
to see if we are in a (pseudo-)NMI handler, and if so, we don't call
hash_page but instead treat it like a bad access that will get
reported up through the exception table mechanism. An interrupt
whose handler runs even though the interrupt occurred when
soft-disabled (such as the PMU interrupt) is considered a pseudo-NMI
handler, which should use nmi_enter()/nmi_exit() rather than
irq_enter()/irq_exit().
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2009-08-17 05:17:54 +00:00
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DEFINE(SIGSEGV, SIGSEGV);
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DEFINE(NMI_MASK, NMI_MASK);
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2005-09-28 14:35:31 +00:00
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#else
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2007-05-09 09:35:17 +00:00
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DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
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2005-09-28 14:35:31 +00:00
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#endif /* CONFIG_PPC64 */
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2005-09-26 06:04:21 +00:00
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DEFINE(KSP, offsetof(struct thread_struct, ksp));
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2008-04-28 06:21:22 +00:00
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DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
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2005-09-26 06:04:21 +00:00
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DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
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DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
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DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
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DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
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#ifdef CONFIG_ALTIVEC
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DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
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DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
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DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
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DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
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#endif /* CONFIG_ALTIVEC */
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2008-06-25 04:07:18 +00:00
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#ifdef CONFIG_VSX
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DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
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DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
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#endif /* CONFIG_VSX */
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2005-09-28 14:35:31 +00:00
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#ifdef CONFIG_PPC64
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DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
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#else /* CONFIG_PPC64 */
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DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
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#endif
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2005-09-26 06:04:21 +00:00
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#ifdef CONFIG_SPE
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DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
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DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
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DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
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DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
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#endif /* CONFIG_SPE */
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2005-09-28 14:35:31 +00:00
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#endif /* CONFIG_PPC64 */
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2010-04-15 22:11:51 +00:00
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#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
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#endif
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2005-09-28 14:35:31 +00:00
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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2006-04-18 11:49:11 +00:00
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DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
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2005-09-28 14:35:31 +00:00
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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#ifdef CONFIG_PPC64
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DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
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DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
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DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
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DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
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DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
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DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
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/* paca */
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DEFINE(PACA_SIZE, sizeof(struct paca_struct));
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DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
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DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
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DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
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DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
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DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
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DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
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DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
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DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
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2008-08-30 01:40:24 +00:00
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DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
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DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 06:47:49 +00:00
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DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
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DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
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2005-09-28 14:35:31 +00:00
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DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
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2007-05-08 06:27:27 +00:00
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#ifdef CONFIG_PPC_MM_SLICES
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DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
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context.low_slices_psize));
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DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
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context.high_slices_psize));
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DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
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2009-06-02 21:17:41 +00:00
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#endif /* CONFIG_PPC_MM_SLICES */
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2009-07-23 23:15:42 +00:00
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#ifdef CONFIG_PPC_BOOK3E
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DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
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DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
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DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
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DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
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DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
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DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
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DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
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DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
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DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
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DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
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#endif /* CONFIG_PPC_BOOK3E */
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2009-06-02 21:17:41 +00:00
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#ifdef CONFIG_PPC_STD_MMU_64
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DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
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DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
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DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
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DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
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DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
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#ifdef CONFIG_PPC_MM_SLICES
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2007-05-08 06:27:27 +00:00
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DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
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#else
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DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
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#endif /* CONFIG_PPC_MM_SLICES */
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2005-09-28 14:35:31 +00:00
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DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
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DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
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DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
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2006-01-12 23:26:42 +00:00
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DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
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2006-08-07 06:19:19 +00:00
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DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
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2006-08-09 07:00:30 +00:00
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DEFINE(SLBSHADOW_STACKVSID,
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offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
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DEFINE(SLBSHADOW_STACKESID,
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offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
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2005-09-28 14:35:31 +00:00
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DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
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DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
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DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
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DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
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2006-08-07 06:19:19 +00:00
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DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
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2009-06-02 21:17:41 +00:00
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#endif /* CONFIG_PPC_STD_MMU_64 */
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DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
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DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
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2010-05-13 19:40:11 +00:00
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DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
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2009-06-02 21:17:41 +00:00
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DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr));
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DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr));
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DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
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DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
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DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset));
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DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
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2009-10-30 05:47:23 +00:00
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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2010-04-15 22:11:44 +00:00
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DEFINE(PACA_KVM_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
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DEFINE(SVCPU_SLB, offsetof(struct kvmppc_book3s_shadow_vcpu, slb));
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DEFINE(SVCPU_SLB_MAX, offsetof(struct kvmppc_book3s_shadow_vcpu, slb_max));
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2009-10-30 05:47:23 +00:00
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#endif
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2005-10-26 07:05:24 +00:00
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#endif /* CONFIG_PPC64 */
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2005-09-28 14:35:31 +00:00
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/* RTAS */
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DEFINE(RTASBASE, offsetof(struct rtas_t, base));
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DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
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2005-09-26 06:04:21 +00:00
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/* Interrupt register frame */
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DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
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2008-04-23 20:33:49 +00:00
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DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
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2005-09-26 06:04:21 +00:00
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|
|
DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
|
2010-04-15 22:11:55 +00:00
|
|
|
#ifdef CONFIG_PPC64
|
2005-09-28 14:35:31 +00:00
|
|
|
/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
|
|
|
|
DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
|
|
|
DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
2006-09-06 23:23:12 +00:00
|
|
|
|
|
|
|
/* hcall statistics */
|
|
|
|
DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
|
|
|
|
DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
|
|
|
|
DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
|
|
|
|
DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
|
2005-09-28 14:35:31 +00:00
|
|
|
#endif /* CONFIG_PPC64 */
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
|
|
|
|
DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
|
|
|
|
DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
|
|
|
|
DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
|
|
|
|
DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
|
|
|
|
DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
|
|
|
|
DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
|
|
|
|
DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
|
|
|
|
DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
|
|
|
|
DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
|
|
|
|
DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
|
|
|
|
DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
|
|
|
|
DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
|
|
|
|
DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
|
2005-09-28 14:35:31 +00:00
|
|
|
#ifndef CONFIG_PPC64
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
|
|
|
|
DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
|
|
|
|
DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
|
|
|
|
DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
|
|
|
|
DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
|
|
|
|
DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
|
|
|
|
DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
|
|
|
|
DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
|
|
|
|
DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
|
|
|
|
DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
|
|
|
|
DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
|
|
|
|
DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
|
|
|
|
DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
|
|
|
|
DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
|
|
|
|
DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
|
|
|
|
DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
|
|
|
|
DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
|
|
|
|
DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
|
2005-09-28 14:35:31 +00:00
|
|
|
#endif /* CONFIG_PPC64 */
|
2005-09-26 06:04:21 +00:00
|
|
|
/*
|
|
|
|
* Note: these symbols include _ because they overlap with special
|
|
|
|
* register names
|
|
|
|
*/
|
|
|
|
DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
|
|
|
|
DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
|
|
|
|
DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
|
|
|
|
DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
|
|
|
|
DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
|
|
|
|
DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
|
|
|
|
DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
|
|
|
DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
2005-09-28 14:35:31 +00:00
|
|
|
DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
|
|
|
|
DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
|
2005-10-28 12:45:25 +00:00
|
|
|
DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
|
2005-09-28 14:35:31 +00:00
|
|
|
#ifndef CONFIG_PPC64
|
|
|
|
DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
|
|
|
|
/*
|
|
|
|
* The PowerPC 400-class & Book-E processors have neither the DAR
|
|
|
|
* nor the DSISR SPRs. Hence, we overload them to hold the similar
|
|
|
|
* DEAR and ESR SPRs for such processors. For critical interrupts
|
|
|
|
* we use them to hold SRR0 and SRR1.
|
2005-09-26 06:04:21 +00:00
|
|
|
*/
|
|
|
|
DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
|
|
|
DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
2005-09-28 14:35:31 +00:00
|
|
|
#else /* CONFIG_PPC64 */
|
|
|
|
DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
|
|
|
|
|
|
|
|
/* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
|
|
|
|
DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
|
|
|
|
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
|
2009-07-28 01:59:34 +00:00
|
|
|
#if defined(CONFIG_PPC32)
|
2008-04-30 10:23:21 +00:00
|
|
|
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
|
|
|
DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
|
|
|
|
DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
|
|
|
|
/* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
|
|
|
|
DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
|
|
|
|
DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
|
|
|
|
DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
|
|
|
|
DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
|
|
|
|
DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
|
|
|
|
DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
|
|
|
|
DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
|
|
|
|
DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
|
|
|
|
DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
|
|
|
|
DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
|
|
|
|
DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
|
|
|
|
DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
|
|
|
|
DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
|
|
|
|
#endif
|
2009-07-28 01:59:34 +00:00
|
|
|
#endif
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(CLONE_VM, CLONE_VM);
|
|
|
|
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
|
2005-09-28 14:35:31 +00:00
|
|
|
|
|
|
|
#ifndef CONFIG_PPC64
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
|
2005-09-28 14:35:31 +00:00
|
|
|
#endif /* ! CONFIG_PPC64 */
|
2005-09-26 06:04:21 +00:00
|
|
|
|
|
|
|
/* About the CPU features table */
|
|
|
|
DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
|
|
|
|
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
|
2006-08-11 05:07:08 +00:00
|
|
|
DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
|
2005-09-26 06:04:21 +00:00
|
|
|
|
2005-09-28 14:35:31 +00:00
|
|
|
DEFINE(pbe_address, offsetof(struct pbe, address));
|
|
|
|
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
|
|
|
|
DEFINE(pbe_next, offsetof(struct pbe, next));
|
2005-09-26 06:04:21 +00:00
|
|
|
|
2007-05-03 12:31:38 +00:00
|
|
|
#ifndef CONFIG_PPC64
|
2005-10-11 12:08:12 +00:00
|
|
|
DEFINE(TASK_SIZE, TASK_SIZE);
|
2005-09-28 14:35:31 +00:00
|
|
|
DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
|
2005-11-11 10:15:21 +00:00
|
|
|
#endif /* ! CONFIG_PPC64 */
|
2005-09-26 06:04:21 +00:00
|
|
|
|
2005-11-11 10:15:21 +00:00
|
|
|
/* datapage offsets for use by vdso */
|
|
|
|
DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
|
|
|
|
DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
|
|
|
|
DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
|
|
|
|
DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
|
|
|
|
DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
|
|
|
|
DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
|
|
|
|
DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
|
|
|
|
DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
|
|
|
|
DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
|
|
|
|
DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
|
2008-10-27 23:56:03 +00:00
|
|
|
DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
|
2007-11-20 01:24:45 +00:00
|
|
|
DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
|
|
|
|
DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
|
|
|
|
DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
|
|
|
|
DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
|
2005-11-11 10:15:21 +00:00
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
|
|
|
|
DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
|
|
|
|
DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
|
|
|
|
DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
|
2005-11-14 03:55:58 +00:00
|
|
|
DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
|
|
|
|
DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
|
2005-11-11 10:15:21 +00:00
|
|
|
DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
|
|
|
|
DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
|
|
|
|
#else
|
|
|
|
DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
|
|
|
|
DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
|
2005-11-14 03:55:58 +00:00
|
|
|
DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
|
|
|
|
DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
|
2005-11-11 10:15:21 +00:00
|
|
|
#endif
|
|
|
|
/* timeval/timezone offsets for use by vdso */
|
2005-09-26 06:04:21 +00:00
|
|
|
DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
|
|
|
|
DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
|
2005-11-11 10:15:21 +00:00
|
|
|
|
|
|
|
/* Other bits used by the vdso */
|
|
|
|
DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
|
|
|
|
DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
|
|
|
|
DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
|
2008-02-07 22:24:52 +00:00
|
|
|
DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
|
2005-11-11 10:15:21 +00:00
|
|
|
|
2007-01-01 18:45:34 +00:00
|
|
|
#ifdef CONFIG_BUG
|
|
|
|
DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
|
|
|
|
#endif
|
2007-08-20 04:58:36 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_PPC_ISERIES
|
|
|
|
/* the assembler miscalculates the VSID values */
|
|
|
|
DEFINE(PAGE_OFFSET_ESID, GET_ESID(PAGE_OFFSET));
|
|
|
|
DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET));
|
|
|
|
DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START));
|
|
|
|
DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
|
2008-04-10 06:39:18 +00:00
|
|
|
|
|
|
|
/* alpaca */
|
|
|
|
DEFINE(ALPACA_SIZE, sizeof(struct alpaca));
|
2007-08-20 04:58:36 +00:00
|
|
|
#endif
|
2007-09-18 07:22:59 +00:00
|
|
|
|
|
|
|
DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
|
2008-09-24 16:01:24 +00:00
|
|
|
DEFINE(PTE_SIZE, sizeof(pte_t));
|
2007-12-06 19:11:04 +00:00
|
|
|
|
2008-04-17 04:28:09 +00:00
|
|
|
#ifdef CONFIG_KVM
|
|
|
|
DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
|
|
|
|
DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
|
|
|
|
DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
|
|
|
|
DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr));
|
|
|
|
DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));
|
|
|
|
DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
|
|
|
|
DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
|
|
|
|
DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
|
2008-07-25 18:54:53 +00:00
|
|
|
DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
|
2008-04-17 04:28:09 +00:00
|
|
|
|
2010-04-15 22:11:42 +00:00
|
|
|
/* book3s */
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
2009-10-30 05:47:18 +00:00
|
|
|
DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip));
|
|
|
|
DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr));
|
|
|
|
DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
|
|
|
|
DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem));
|
|
|
|
DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter));
|
|
|
|
DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler));
|
2010-01-08 01:58:06 +00:00
|
|
|
DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall));
|
2009-10-30 05:47:18 +00:00
|
|
|
DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
|
2010-04-15 22:11:44 +00:00
|
|
|
DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
|
|
|
|
offsetof(struct kvmppc_vcpu_book3s, vcpu));
|
|
|
|
DEFINE(SVCPU_CR, offsetof(struct kvmppc_book3s_shadow_vcpu, cr));
|
|
|
|
DEFINE(SVCPU_XER, offsetof(struct kvmppc_book3s_shadow_vcpu, xer));
|
|
|
|
DEFINE(SVCPU_CTR, offsetof(struct kvmppc_book3s_shadow_vcpu, ctr));
|
|
|
|
DEFINE(SVCPU_LR, offsetof(struct kvmppc_book3s_shadow_vcpu, lr));
|
|
|
|
DEFINE(SVCPU_PC, offsetof(struct kvmppc_book3s_shadow_vcpu, pc));
|
|
|
|
DEFINE(SVCPU_R0, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[0]));
|
|
|
|
DEFINE(SVCPU_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[1]));
|
|
|
|
DEFINE(SVCPU_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[2]));
|
|
|
|
DEFINE(SVCPU_R3, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[3]));
|
|
|
|
DEFINE(SVCPU_R4, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[4]));
|
|
|
|
DEFINE(SVCPU_R5, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[5]));
|
|
|
|
DEFINE(SVCPU_R6, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[6]));
|
|
|
|
DEFINE(SVCPU_R7, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[7]));
|
|
|
|
DEFINE(SVCPU_R8, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[8]));
|
|
|
|
DEFINE(SVCPU_R9, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[9]));
|
|
|
|
DEFINE(SVCPU_R10, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[10]));
|
|
|
|
DEFINE(SVCPU_R11, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[11]));
|
|
|
|
DEFINE(SVCPU_R12, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[12]));
|
|
|
|
DEFINE(SVCPU_R13, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[13]));
|
|
|
|
DEFINE(SVCPU_HOST_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r1));
|
|
|
|
DEFINE(SVCPU_HOST_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r2));
|
|
|
|
DEFINE(SVCPU_VMHANDLER, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
vmhandler));
|
|
|
|
DEFINE(SVCPU_SCRATCH0, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
scratch0));
|
|
|
|
DEFINE(SVCPU_SCRATCH1, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
scratch1));
|
|
|
|
DEFINE(SVCPU_IN_GUEST, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
in_guest));
|
|
|
|
DEFINE(SVCPU_FAULT_DSISR, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
fault_dsisr));
|
|
|
|
DEFINE(SVCPU_FAULT_DAR, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
fault_dar));
|
|
|
|
DEFINE(SVCPU_LAST_INST, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
last_inst));
|
|
|
|
DEFINE(SVCPU_SHADOW_SRR1, offsetof(struct kvmppc_book3s_shadow_vcpu,
|
|
|
|
shadow_srr1));
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
|
|
|
DEFINE(SVCPU_SR, offsetof(struct kvmppc_book3s_shadow_vcpu, sr));
|
|
|
|
#endif
|
2010-01-08 01:58:03 +00:00
|
|
|
#else
|
|
|
|
DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
|
|
|
|
DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
|
2010-04-15 22:11:44 +00:00
|
|
|
DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
|
|
|
|
DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
|
|
|
|
DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
|
|
|
|
DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
|
|
|
|
DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
|
|
|
|
DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
|
2010-04-15 22:11:42 +00:00
|
|
|
#endif /* CONFIG_PPC_BOOK3S */
|
2008-04-17 04:28:09 +00:00
|
|
|
#endif
|
2008-12-11 01:55:41 +00:00
|
|
|
#ifdef CONFIG_44x
|
|
|
|
DEFINE(PGD_T_LOG2, PGD_T_LOG2);
|
|
|
|
DEFINE(PTE_T_LOG2, PTE_T_LOG2);
|
|
|
|
#endif
|
2010-05-13 19:38:21 +00:00
|
|
|
#ifdef CONFIG_FSL_BOOKE
|
|
|
|
DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
|
|
|
|
DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
|
|
|
|
DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
|
|
|
|
DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
|
|
|
|
DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
|
|
|
|
DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
|
|
|
|
#endif
|
2008-04-17 04:28:09 +00:00
|
|
|
|
2008-12-02 21:51:57 +00:00
|
|
|
#ifdef CONFIG_KVM_EXIT_TIMING
|
|
|
|
DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
|
|
|
|
arch.timing_exit.tv32.tbu));
|
|
|
|
DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
|
|
|
|
arch.timing_exit.tv32.tbl));
|
|
|
|
DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
|
|
|
|
arch.timing_last_enter.tv32.tbu));
|
|
|
|
DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
|
|
|
|
arch.timing_last_enter.tv32.tbl));
|
|
|
|
#endif
|
|
|
|
|
2005-09-26 06:04:21 +00:00
|
|
|
return 0;
|
|
|
|
}
|