2015-09-30 23:02:27 +00:00
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/*
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* Device Tree Source for the Porter board
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*
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* Copyright (C) 2015 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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2016-01-21 22:36:01 +00:00
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/*
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* SSI-AK4642
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*
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2016-02-11 21:49:52 +00:00
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* JP3: 2-1: AK4642
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* 2-3: ADV7511
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2016-01-21 22:36:01 +00:00
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*
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* This command is required before playback/capture:
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*
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* amixer set "LINEOUT Mixer DACL" on
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*/
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2015-09-30 23:02:27 +00:00
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/dts-v1/;
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#include "r8a7791.dtsi"
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2015-10-06 23:05:41 +00:00
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#include <dt-bindings/gpio/gpio.h>
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2015-09-30 23:02:27 +00:00
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/ {
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model = "Porter";
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compatible = "renesas,porter", "renesas,r8a7791";
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aliases {
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serial0 = &scif0;
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};
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chosen {
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2015-10-05 22:51:01 +00:00
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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2015-12-08 17:54:17 +00:00
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stdout-path = "serial0:115200n8";
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2015-09-30 23:02:27 +00:00
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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2015-10-06 23:05:41 +00:00
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2016-05-20 07:10:11 +00:00
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vcc_sdhi0: regulator-vcc-sdhi0 {
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2015-10-06 23:05:41 +00:00
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2016-05-20 07:10:11 +00:00
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vccq_sdhi0: regulator-vccq-sdhi0 {
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2015-10-06 23:05:41 +00:00
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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2016-05-20 07:10:11 +00:00
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vcc_sdhi2: regulator-vcc-sdhi2 {
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2015-10-06 23:05:41 +00:00
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2016-05-20 07:10:11 +00:00
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vccq_sdhi2: regulator-vccq-sdhi2 {
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2015-10-06 23:05:41 +00:00
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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2015-12-24 22:45:30 +00:00
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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x3_clk: x3-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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x16_clk: x16-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <74250000>;
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};
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2016-01-21 22:36:01 +00:00
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2016-03-17 23:17:57 +00:00
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x14_clk: audio_clock {
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2016-01-21 22:36:01 +00:00
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <11289600>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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simple-audio-card,bitclock-master = <&soundcodec>;
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simple-audio-card,frame-master = <&soundcodec>;
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simple-audio-card,cpu {
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sound-dai = <&rcar_sound>;
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};
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soundcodec: simple-audio-card,codec {
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sound-dai = <&ak4642>;
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clocks = <&x14_clk>;
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};
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};
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2015-09-30 23:02:27 +00:00
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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2016-06-10 13:00:57 +00:00
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scif0_pins: scif0 {
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2016-03-17 22:55:31 +00:00
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groups = "scif0_data_d";
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function = "scif0";
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2015-09-30 23:02:27 +00:00
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};
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2015-10-05 22:51:01 +00:00
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ether_pins: ether {
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2016-03-17 22:55:31 +00:00
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groups = "eth_link", "eth_mdio", "eth_rmii";
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function = "eth";
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2015-10-05 22:51:01 +00:00
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};
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phy1_pins: phy1 {
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2016-03-17 22:55:31 +00:00
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groups = "intc_irq0";
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function = "intc";
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2015-10-05 22:51:01 +00:00
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};
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2015-10-06 23:05:41 +00:00
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sdhi0_pins: sd0 {
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2016-03-17 22:55:31 +00:00
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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2015-10-06 23:05:41 +00:00
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};
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sdhi2_pins: sd2 {
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2016-03-17 22:55:31 +00:00
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groups = "sdhi2_data4", "sdhi2_ctrl";
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function = "sdhi2";
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2015-10-06 23:05:41 +00:00
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};
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2015-10-08 21:44:18 +00:00
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2016-06-10 13:00:58 +00:00
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qspi_pins: qspi {
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2016-03-17 22:55:31 +00:00
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groups = "qspi_ctrl", "qspi_data4";
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function = "qspi";
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2015-10-09 21:40:31 +00:00
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};
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2015-10-08 21:44:18 +00:00
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i2c2_pins: i2c2 {
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2016-03-17 22:55:31 +00:00
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groups = "i2c2";
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function = "i2c2";
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2015-10-08 21:44:18 +00:00
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};
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2015-10-08 21:45:49 +00:00
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2015-10-12 22:12:18 +00:00
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usb0_pins: usb0 {
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2016-03-17 22:55:31 +00:00
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groups = "usb0";
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function = "usb0";
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2015-10-12 22:12:18 +00:00
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};
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usb1_pins: usb1 {
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2016-03-17 22:55:31 +00:00
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groups = "usb1";
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function = "usb1";
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2015-10-12 22:12:18 +00:00
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};
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2015-10-08 21:45:49 +00:00
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vin0_pins: vin0 {
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2016-03-17 22:55:31 +00:00
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groups = "vin0_data8", "vin0_clk";
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function = "vin0";
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2015-10-08 21:45:49 +00:00
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};
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2015-10-27 21:03:22 +00:00
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can0_pins: can0 {
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2016-03-17 22:55:31 +00:00
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groups = "can0_data";
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function = "can0";
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2015-10-27 21:03:22 +00:00
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};
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2015-12-24 22:45:30 +00:00
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du_pins: du {
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2016-03-17 22:55:31 +00:00
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groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
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function = "du";
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2015-12-24 22:45:30 +00:00
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};
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2016-01-21 22:36:01 +00:00
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ssi_pins: sound {
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2016-03-17 22:55:31 +00:00
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groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
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function = "ssi";
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2016-01-21 22:36:01 +00:00
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};
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audio_clk_pins: audio_clk {
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2016-03-17 22:55:31 +00:00
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groups = "audio_clk_a";
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function = "audio_clk";
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2016-01-21 22:36:01 +00:00
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};
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2015-09-30 23:02:27 +00:00
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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2015-10-05 22:51:01 +00:00
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ðer {
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pinctrl-0 = <ðer_pins &phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "ok";
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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};
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};
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2015-10-06 23:05:41 +00:00
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi2>;
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vqmmc-supply = <&vccq_sdhi2>;
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cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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2015-10-07 22:00:06 +00:00
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2015-10-09 21:40:31 +00:00
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "spansion,s25fl512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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2015-11-20 19:38:54 +00:00
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partitions {
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2015-12-21 10:33:50 +00:00
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compatible = "fixed-partitions";
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2015-11-20 19:38:54 +00:00
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader_prg";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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partition@40000 {
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label = "user_prg";
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reg = <0x00040000 0x00400000>;
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read-only;
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};
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partition@440000 {
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label = "flash_fs";
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reg = <0x00440000 0x03bc0000>;
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};
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2015-10-09 21:40:31 +00:00
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};
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};
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};
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2015-10-08 21:44:18 +00:00
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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2015-10-08 21:45:49 +00:00
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2016-01-21 22:36:01 +00:00
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ak4642: codec@12 {
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compatible = "asahi-kasei,ak4642";
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#sound-dai-cells = <0>;
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reg = <0x12>;
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};
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2015-10-08 21:45:49 +00:00
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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remote = <&vin0>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin0ep>;
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};
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};
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};
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2015-12-24 22:45:30 +00:00
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hdmi@39 {
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compatible = "adi,adv7511w";
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reg = <0x39>;
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interrupt-parent = <&gpio3>;
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interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,input-style = <1>;
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adi,input-justification = "evenly";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_con>;
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};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2015-10-08 21:44:18 +00:00
|
|
|
};
|
|
|
|
|
2015-10-07 22:00:06 +00:00
|
|
|
&sata0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2015-10-08 21:45:49 +00:00
|
|
|
|
|
|
|
/* composite video input */
|
|
|
|
&vin0 {
|
|
|
|
status = "ok";
|
|
|
|
pinctrl-0 = <&vin0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
port {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
vin0ep: endpoint {
|
|
|
|
remote-endpoint = <&adv7180>;
|
|
|
|
bus-width = <8>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2015-10-09 21:41:26 +00:00
|
|
|
|
2015-10-12 22:12:18 +00:00
|
|
|
&pci0 {
|
|
|
|
pinctrl-0 = <&usb0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pci1 {
|
|
|
|
pinctrl-0 = <&usb1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2015-10-14 19:35:46 +00:00
|
|
|
&hsusb {
|
|
|
|
pinctrl-0 = <&usb0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2015-10-12 22:12:18 +00:00
|
|
|
&usbphy {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2015-10-09 21:41:26 +00:00
|
|
|
&pcie_bus_clk {
|
2016-04-06 12:52:53 +00:00
|
|
|
clock-frequency = <100000000>;
|
2015-10-09 21:41:26 +00:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pciec {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2015-10-27 21:03:22 +00:00
|
|
|
|
|
|
|
&can0 {
|
|
|
|
pinctrl-0 = <&can0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
2015-12-24 22:45:30 +00:00
|
|
|
|
|
|
|
&du {
|
|
|
|
pinctrl-0 = <&du_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
clocks = <&mstp7_clks R8A7791_CLK_DU0>,
|
|
|
|
<&mstp7_clks R8A7791_CLK_DU1>,
|
|
|
|
<&mstp7_clks R8A7791_CLK_LVDS0>,
|
|
|
|
<&x3_clk>, <&x16_clk>;
|
|
|
|
clock-names = "du.0", "du.1", "lvds.0",
|
|
|
|
"dclkin.0", "dclkin.1";
|
|
|
|
|
|
|
|
ports {
|
|
|
|
port@1 {
|
|
|
|
endpoint {
|
|
|
|
remote-endpoint = <&adv7511_in>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2016-01-21 22:36:01 +00:00
|
|
|
|
|
|
|
&rcar_sound {
|
|
|
|
pinctrl-0 = <&ssi_pins &audio_clk_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
/* Single DAI */
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
|
|
|
|
rcar_sound,dai {
|
|
|
|
dai0 {
|
|
|
|
playback = <&ssi0>;
|
|
|
|
capture = <&ssi1>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&ssi1 {
|
|
|
|
shared-pin;
|
|
|
|
};
|