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linux/arch/arm/boot/dts/armada-xp-mv78460.dtsi

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ARM: mvebu: Add pinctrl support to Armada XP SoCs This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-13 15:41:48 +00:00
/*
* Device Tree Include file for Marvell Armada XP family SoC
*
* Copyright (C) 2012 Marvell
*
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Contains definitions specific to the Armada XP MV78460 SoC that are not
* common to all Armada XP SoCs.
*/
/include/ "armada-xp.dtsi"
/ {
model = "Marvell Armada XP MV78460 SoC";
compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
};
clk: armada-370-xp: add support for clock framework Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-17 14:22:24 +00:00
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
};
cpu@1 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
};
cpu@2 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <2>;
clocks = <&cpuclk 2>;
};
cpu@3 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <3>;
clocks = <&cpuclk 3>;
};
};
ARM: mvebu: Add pinctrl support to Armada XP SoCs This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-13 15:41:48 +00:00
soc {
pinctrl {
compatible = "marvell,mv78460-pinctrl";
reg = <0xd0018000 0x38>;
arm: mvebu: add pin muxing options for the SDIO interface on Armada XP The SDIO interface is only available on pins MPP30/31/32/33/34/35 on the various Armada XP variants, so we provide a pin muxing option for this in the Armada XP .dtsi files. Even though those muxing options are the same for MV78230, MV78260 and MV78460, we keep them in each .dtsi file, because the number of pins, and therefore the declaration of the pinctrl node, is different for each SoC variant. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-12-21 14:49:06 +00:00
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
ARM: mvebu: Add pinctrl support to Armada XP SoCs This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-13 15:41:48 +00:00
};
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
gpio0: gpio@d0018100 {
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
interrupts = <82>, <83>, <84>, <85>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
};
gpio1: gpio@d0018140 {
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
interrupts = <87>, <88>, <89>, <90>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
};
gpio2: gpio@d0018180 {
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
ngpios = <3>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:26:58 +00:00
interrupts = <91>;
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-19 20:53:01 +00:00
};
arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 10:10:41 +00:00
ethernet@d0034000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0034000 0x2500>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
};
ARM: mvebu: Add pinctrl support to Armada XP SoCs This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-13 15:41:48 +00:00
};
};
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