2005-04-16 22:20:36 +00:00
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/*
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* drivers/mtd/nand/toto.c
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*
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* Copyright (c) 2003 Texas Instruments
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*
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* Derived from drivers/mtd/autcpu12.c
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*
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* Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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* TI fido board. It supports 32MiB and 64MiB cards
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*
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2005-11-07 11:15:49 +00:00
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* $Id: toto.c,v 1.5 2005/11/07 11:14:31 gleixner Exp $
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2005-04-16 22:20:36 +00:00
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*/
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/sizes.h>
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#include <asm/arch/toto.h>
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#include <asm/arch-omap1510/hardware.h>
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#include <asm/arch/gpio.h>
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/*
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* MTD structure for TOTO board
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*/
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static struct mtd_info *toto_mtd = NULL;
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static unsigned long toto_io_base = OMAP_FLASH_1_BASE;
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#define CONFIG_NAND_WORKAROUND 1
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#define NAND_NCE 0x4000
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#define NAND_CLE 0x1000
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#define NAND_ALE 0x0002
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#define NAND_MASK (NAND_CLE | NAND_ALE | NAND_NCE)
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#define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0)
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#define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE)
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#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */
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#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2)
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#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0)
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#else
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#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0)
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#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE)
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#endif
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#define T_NAND_CTL_SETNCE(iob) gpiosetout(NAND_NCE, 0)
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#define T_NAND_CTL_CLRNCE(iob) gpiosetout(NAND_NCE, NAND_NCE)
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2005-11-07 11:15:49 +00:00
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2005-04-16 22:20:36 +00:00
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/*
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* Define partitions for flash devices
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*/
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static struct mtd_partition partition_info64M[] = {
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{ .name = "toto kernel partition 1",
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.offset = 0,
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.size = 2 * SZ_1M },
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{ .name = "toto file sys partition 2",
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.offset = 2 * SZ_1M,
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.size = 14 * SZ_1M },
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{ .name = "toto user partition 3",
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.offset = 16 * SZ_1M,
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.size = 16 * SZ_1M },
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{ .name = "toto devboard extra partition 4",
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.offset = 32 * SZ_1M,
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.size = 32 * SZ_1M },
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};
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static struct mtd_partition partition_info32M[] = {
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{ .name = "toto kernel partition 1",
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.offset = 0,
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.size = 2 * SZ_1M },
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{ .name = "toto file sys partition 2",
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.offset = 2 * SZ_1M,
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.size = 14 * SZ_1M },
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{ .name = "toto user partition 3",
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.offset = 16 * SZ_1M,
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.size = 16 * SZ_1M },
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};
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#define NUM_PARTITIONS32M 3
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#define NUM_PARTITIONS64M 4
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2005-11-07 11:15:49 +00:00
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/*
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2005-04-16 22:20:36 +00:00
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* hardware specific access to control-lines
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*/
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static void toto_hwcontrol(struct mtd_info *mtd, int cmd)
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{
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udelay(1); /* hopefully enough time for tc make proceding write to clear */
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switch(cmd){
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case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break;
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case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break;
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case NAND_CTL_SETALE: T_NAND_CTL_SETALE(cmd); break;
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case NAND_CTL_CLRALE: T_NAND_CTL_CLRALE(cmd); break;
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case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break;
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case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break;
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}
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udelay(1); /* allow time to ensure gpio state to over take memory write */
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}
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/*
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* Main initialization routine
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*/
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int __init toto_init (void)
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{
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struct nand_chip *this;
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int err = 0;
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/* Allocate memory for MTD device structure and private data */
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toto_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
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GFP_KERNEL);
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if (!toto_mtd) {
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printk (KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n");
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err = -ENOMEM;
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goto out;
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}
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/* Get pointer to private data */
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this = (struct nand_chip *) (&toto_mtd[1]);
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/* Initialize structures */
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memset((char *) toto_mtd, 0, sizeof(struct mtd_info));
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memset((char *) this, 0, sizeof(struct nand_chip));
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/* Link the private data with the MTD structure */
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toto_mtd->priv = this;
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/* Set address of NAND IO lines */
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this->IO_ADDR_R = toto_io_base;
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this->IO_ADDR_W = toto_io_base;
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this->hwcontrol = toto_hwcontrol;
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this->dev_ready = NULL;
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/* 25 us command delay time */
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2005-11-07 11:15:49 +00:00
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this->chip_delay = 30;
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2005-04-16 22:20:36 +00:00
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this->eccmode = NAND_ECC_SOFT;
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/* Scan to find existance of the device */
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if (nand_scan (toto_mtd, 1)) {
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err = -ENXIO;
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goto out_mtd;
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}
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/* Register the partitions */
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switch(toto_mtd->size){
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2005-11-07 11:15:49 +00:00
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case SZ_64M: add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); break;
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case SZ_32M: add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); break;
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2005-04-16 22:20:36 +00:00
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default: {
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2005-11-07 11:15:49 +00:00
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printk (KERN_WARNING "Unsupported Nand device\n");
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2005-04-16 22:20:36 +00:00
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err = -ENXIO;
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goto out_buf;
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}
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}
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gpioreserve(NAND_MASK); /* claim our gpios */
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archflashwp(0,0); /* open up flash for writing */
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goto out;
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2005-11-07 11:15:49 +00:00
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2005-04-16 22:20:36 +00:00
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out_buf:
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2005-11-07 11:15:49 +00:00
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kfree (this->data_buf);
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2005-04-16 22:20:36 +00:00
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out_mtd:
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kfree (toto_mtd);
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out:
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return err;
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}
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module_init(toto_init);
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/*
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* Clean up routine
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*/
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static void __exit toto_cleanup (void)
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{
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/* Release resources, unregister device */
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nand_release (toto_mtd);
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/* Free the MTD device structure */
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kfree (toto_mtd);
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/* stop flash writes */
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archflashwp(0,1);
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2005-11-07 11:15:49 +00:00
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2005-04-16 22:20:36 +00:00
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/* release gpios to system */
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gpiorelease(NAND_MASK);
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}
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module_exit(toto_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Richard Woodruff <r-woodruff2@ti.com>");
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MODULE_DESCRIPTION("Glue layer for NAND flash on toto board");
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