linux/arch/arm/boot/dts/ep7209.dtsi

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 */

/dts-v1/;

#include "skeleton.dtsi"

#include <dt-bindings/clock/clps711x-clock.h>

/ {
	model = "Cirrus Logic EP7209";
	compatible = "cirrus,ep7209";

	aliases {
		gpio0 = &porta;
		gpio1 = &portb;
		gpio3 = &portd;
		gpio4 = &porte;
		serial0 = &uart1;
		serial1 = &uart2;
		spi0 = &spi;
		timer0 = &timer1;
		timer1 = &timer2;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			device_type = "cpu";
			compatible = "arm,arm720t";
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&intc>;
		ranges;

		clks: clks@80000000 {
			#clock-cells = <1>;
			compatible = "cirrus,ep7209-clk";
			reg = <0x80000000 0xc000>;
			startup-frequency = <73728000>;
		};

		intc: intc@80000000 {
			compatible = "cirrus,ep7209-intc";
			reg = <0x80000000 0x4000>;
			interrupt-controller;
			#interrupt-cells = <1>;
		};

		porta: gpio@80000000 {
			compatible = "cirrus,ep7209-gpio";
			reg = <0x80000000 0x1 0x80000040 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		portb: gpio@80000001 {
			compatible = "cirrus,ep7209-gpio";
			reg = <0x80000001 0x1 0x80000041 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		portd: gpio@80000003 {
			compatible = "cirrus,ep7209-gpio";
			reg = <0x80000003 0x1 0x80000043 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		porte: gpio@80000083 {
			compatible = "cirrus,ep7209-gpio";
			reg = <0x80000083 0x1 0x800000c3 0x1>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		syscon1: syscon@80000100 {
			compatible = "cirrus,ep7209-syscon1", "syscon";
			reg = <0x80000100 0x80>;
		};

		bus: bus@80000180 {
			#address-cells = <2>;
			#size-cells = <1>;
			compatible = "cirrus,ep7209-bus", "simple-bus";
			clocks = <&clks CLPS711X_CLK_BUS>;
			reg = <0x80000180 0x80>;
			ranges = <
				0 0 0x00000000 0x10000000
				1 0 0x10000000 0x10000000
				2 0 0x20000000 0x10000000
				3 0 0x30000000 0x10000000
				4 0 0x40000000 0x10000000
				5 0 0x50000000 0x10000000
				6 0 0x60000000 0x0000c000
				7 0 0x70000000 0x00000080
			>;
		};

		fb: fb@800002c0 {
			compatible = "cirrus,ep7209-fb";
			reg = <0x800002c0 0xd44>, <0x60000000 0xc000>;
			clocks = <&clks CLPS711X_CLK_BUS>;
			status = "disabled";
		};

		timer1: timer@80000300 {
			compatible = "cirrus,ep7209-timer";
			reg = <0x80000300 0x4>;
			clocks = <&clks CLPS711X_CLK_TIMER1>;
			interrupts = <8>;
		};

		timer2: timer@80000340 {
			compatible = "cirrus,ep7209-timer";
			reg = <0x80000340 0x4>;
			clocks = <&clks CLPS711X_CLK_TIMER2>;
			interrupts = <9>;
		};

		pwm: pwm@80000400 {
			compatible = "cirrus,ep7209-pwm";
			reg = <0x80000400 0x4>;
			clocks = <&clks CLPS711X_CLK_PWM>;
			#pwm-cells = <1>;
		};

		uart1: uart@80000480 {
			compatible = "cirrus,ep7209-uart";
			reg = <0x80000480 0x80>;
			interrupts = <12 13>;
			clocks = <&clks CLPS711X_CLK_UART>;
			syscon = <&syscon1>;
		};

		spi: spi@80000500 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "cirrus,ep7209-spi";
			reg = <0x80000500 0x4>;
			interrupts = <15>;
			clocks = <&clks CLPS711X_CLK_SPI>;
			status = "disabled";
		};

		syscon2: syscon@80001100 {
			compatible = "cirrus,ep7209-syscon2", "syscon";
			reg = <0x80001100 0x80>;
		};

		uart2: uart@80001480 {
			compatible = "cirrus,ep7209-uart";
			reg = <0x80001480 0x80>;
			interrupts = <28 29>;
			clocks = <&clks CLPS711X_CLK_UART>;
			syscon = <&syscon2>;
		};

		dai: dai@80002000 {
			#sound-dai-cells = <0>;
			compatible = "cirrus,ep7209-dai";
			reg = <0x80002000 0x604>;
			clocks = <&clks CLPS711X_CLK_PLL>;
			clock-names = "pll";
			interrupts = <32>;
			status = "disabled";
		};

		syscon3: syscon@80002200 {
			compatible = "cirrus,ep7209-syscon3", "syscon";
			reg = <0x80002200 0x40>;
		};
	};

	mctrl: mctrl {
		compatible = "cirrus,ep7209-mctrl-gpio";
		gpio-controller;
		#gpio-cells = <2>;
	};
};