2019-04-05 14:00:15 +03:00
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_PM_H__
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#define __INTEL_PM_H__
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_crtc_state;
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2022-09-08 22:16:45 +03:00
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struct intel_plane_state;
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2019-04-05 14:00:15 +03:00
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void intel_init_clock_gating(struct drm_i915_private *dev_priv);
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void intel_suspend_hw(struct drm_i915_private *dev_priv);
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int ilk_wm_max_level(const struct drm_i915_private *dev_priv);
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void intel_init_pm(struct drm_i915_private *dev_priv);
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void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv);
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void intel_pm_setup(struct drm_i915_private *dev_priv);
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void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
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void vlv_wm_sanitize(struct drm_i915_private *dev_priv);
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2019-11-27 21:05:51 +02:00
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bool ilk_disable_lp_wm(struct drm_i915_private *dev_priv);
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2022-09-08 22:16:45 +03:00
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bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state);
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void intel_print_wm_latency(struct drm_i915_private *dev_priv,
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const char *name, const u16 wm[]);
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2019-04-05 14:00:15 +03:00
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2019-06-06 15:22:00 +03:00
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bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable);
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2019-04-29 15:29:37 +03:00
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2019-04-05 14:00:15 +03:00
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#endif /* __INTEL_PM_H__ */
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