2021-02-08 09:57:22 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Early cpufeature override framework
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*
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* Copyright (C) 2020 Google LLC
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* Author: Marc Zyngier <maz@kernel.org>
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*/
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#include <linux/ctype.h>
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#include <linux/kernel.h>
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#include <linux/libfdt.h>
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#include <asm/cacheflush.h>
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2021-02-08 09:57:23 +00:00
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#include <asm/cpufeature.h>
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2021-02-08 09:57:22 +00:00
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#include <asm/setup.h>
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#define FTR_DESC_NAME_LEN 20
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#define FTR_DESC_FIELD_LEN 10
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2021-02-08 09:57:25 +00:00
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#define FTR_ALIAS_NAME_LEN 30
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2022-02-24 12:49:52 +00:00
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#define FTR_ALIAS_OPTION_LEN 116
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2021-02-08 09:57:22 +00:00
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2022-06-30 17:04:53 +01:00
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static u64 __boot_status __initdata;
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2021-02-08 09:57:22 +00:00
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struct ftr_set_desc {
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char name[FTR_DESC_NAME_LEN];
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struct arm64_ftr_override *override;
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struct {
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char name[FTR_DESC_FIELD_LEN];
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u8 shift;
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2022-06-30 17:04:56 +01:00
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u8 width;
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2021-04-08 14:10:08 +01:00
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bool (*filter)(u64 val);
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2021-02-08 09:57:22 +00:00
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} fields[];
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};
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2022-06-30 17:04:56 +01:00
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#define FIELD(n, s, f) { .name = n, .shift = s, .width = 4, .filter = f }
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2021-04-08 14:10:09 +01:00
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static bool __init mmfr1_vh_filter(u64 val)
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{
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/*
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* If we ever reach this point while running VHE, we're
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* guaranteed to be on one of these funky, VHE-stuck CPUs. If
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* the user was trying to force nVHE on us, proceed with
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* attitude adjustment.
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*/
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2022-06-30 17:04:53 +01:00
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return !(__boot_status == (BOOT_CPU_FLAG_E2H | BOOT_CPU_MODE_EL2) &&
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val == 0);
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2021-04-08 14:10:09 +01:00
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}
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2021-02-08 09:57:23 +00:00
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static const struct ftr_set_desc mmfr1 __initconst = {
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.name = "id_aa64mmfr1",
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.override = &id_aa64mmfr1_override,
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.fields = {
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2022-09-05 23:54:07 +01:00
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FIELD("vh", ID_AA64MMFR1_EL1_VH_SHIFT, mmfr1_vh_filter),
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{}
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},
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};
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2022-06-30 17:04:59 +01:00
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static bool __init pfr0_sve_filter(u64 val)
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{
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/*
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* Disabling SVE also means disabling all the features that
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* are associated with it. The easiest way to do it is just to
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* override id_aa64zfr0_el1 to be 0.
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*/
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if (!val) {
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id_aa64zfr0_override.val = 0;
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id_aa64zfr0_override.mask = GENMASK(63, 0);
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}
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return true;
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}
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static const struct ftr_set_desc pfr0 __initconst = {
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.name = "id_aa64pfr0",
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.override = &id_aa64pfr0_override,
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.fields = {
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2022-09-05 23:54:03 +01:00
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FIELD("sve", ID_AA64PFR0_EL1_SVE_SHIFT, pfr0_sve_filter),
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2021-02-08 09:57:23 +00:00
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{}
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},
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};
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2022-06-30 17:04:58 +01:00
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static bool __init pfr1_sme_filter(u64 val)
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{
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/*
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* Similarly to SVE, disabling SME also means disabling all
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* the features that are associated with it. Just set
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* id_aa64smfr0_el1 to 0 and don't look back.
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*/
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if (!val) {
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id_aa64smfr0_override.val = 0;
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id_aa64smfr0_override.mask = GENMASK(63, 0);
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}
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return true;
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}
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2021-02-08 09:57:29 +00:00
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static const struct ftr_set_desc pfr1 __initconst = {
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.name = "id_aa64pfr1",
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.override = &id_aa64pfr1_override,
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.fields = {
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2022-09-05 23:54:04 +01:00
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FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ),
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FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL),
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FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter),
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2021-02-08 09:57:29 +00:00
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{}
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},
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};
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2021-02-08 09:57:31 +00:00
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static const struct ftr_set_desc isar1 __initconst = {
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.name = "id_aa64isar1",
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.override = &id_aa64isar1_override,
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.fields = {
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2022-07-25 10:59:15 +01:00
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FIELD("gpi", ID_AA64ISAR1_EL1_GPI_SHIFT, NULL),
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FIELD("gpa", ID_AA64ISAR1_EL1_GPA_SHIFT, NULL),
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FIELD("api", ID_AA64ISAR1_EL1_API_SHIFT, NULL),
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FIELD("apa", ID_AA64ISAR1_EL1_APA_SHIFT, NULL),
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2021-02-08 09:57:31 +00:00
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{}
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},
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};
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2022-02-24 12:49:52 +00:00
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static const struct ftr_set_desc isar2 __initconst = {
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.name = "id_aa64isar2",
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.override = &id_aa64isar2_override,
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.fields = {
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2022-07-25 10:59:15 +01:00
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FIELD("gpa3", ID_AA64ISAR2_EL1_GPA3_SHIFT, NULL),
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FIELD("apa3", ID_AA64ISAR2_EL1_APA3_SHIFT, NULL),
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2022-02-24 12:49:52 +00:00
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{}
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},
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};
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2022-06-30 17:05:00 +01:00
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static const struct ftr_set_desc smfr0 __initconst = {
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.name = "id_aa64smfr0",
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.override = &id_aa64smfr0_override,
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.fields = {
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/* FA64 is a one bit field... :-/ */
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2022-07-25 10:59:15 +01:00
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{ "fa64", ID_AA64SMFR0_EL1_FA64_SHIFT, 1, },
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2022-02-24 12:49:52 +00:00
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{}
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},
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};
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2021-02-08 09:57:28 +00:00
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extern struct arm64_ftr_override kaslr_feature_override;
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static const struct ftr_set_desc kaslr __initconst = {
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.name = "kaslr",
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#ifdef CONFIG_RANDOMIZE_BASE
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.override = &kaslr_feature_override,
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#endif
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.fields = {
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2022-06-30 17:04:56 +01:00
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FIELD("disabled", 0, NULL),
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2021-02-08 09:57:28 +00:00
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{}
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},
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};
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2021-02-08 09:57:22 +00:00
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static const struct ftr_set_desc * const regs[] __initconst = {
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2021-02-08 09:57:23 +00:00
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&mmfr1,
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&pfr0,
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2021-02-08 09:57:29 +00:00
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&pfr1,
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2021-02-08 09:57:31 +00:00
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&isar1,
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2022-02-24 12:49:52 +00:00
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&isar2,
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2022-06-30 17:05:00 +01:00
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&smfr0,
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2021-02-08 09:57:28 +00:00
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&kaslr,
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2021-02-08 09:57:22 +00:00
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};
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2021-02-08 09:57:25 +00:00
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static const struct {
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char alias[FTR_ALIAS_NAME_LEN];
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char feature[FTR_ALIAS_OPTION_LEN];
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} aliases[] __initconst = {
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2021-02-08 09:57:26 +00:00
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{ "kvm-arm.mode=nvhe", "id_aa64mmfr1.vh=0" },
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{ "kvm-arm.mode=protected", "id_aa64mmfr1.vh=0" },
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2022-06-30 17:04:59 +01:00
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{ "arm64.nosve", "id_aa64pfr0.sve=0 id_aa64pfr1.sme=0" },
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2022-06-30 17:04:58 +01:00
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{ "arm64.nosme", "id_aa64pfr1.sme=0" },
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2021-02-08 09:57:29 +00:00
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{ "arm64.nobti", "id_aa64pfr1.bt=0" },
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2021-02-08 09:57:31 +00:00
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{ "arm64.nopauth",
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"id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "
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2022-02-24 12:49:52 +00:00
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"id_aa64isar1.api=0 id_aa64isar1.apa=0 "
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"id_aa64isar2.gpa3=0 id_aa64isar2.apa3=0" },
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2021-08-03 15:08:22 +08:00
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{ "arm64.nomte", "id_aa64pfr1.mte=0" },
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2021-02-08 09:57:28 +00:00
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{ "nokaslr", "kaslr.disabled=1" },
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2021-02-08 09:57:25 +00:00
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};
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2021-02-08 09:57:22 +00:00
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static int __init find_field(const char *cmdline,
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const struct ftr_set_desc *reg, int f, u64 *v)
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{
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char opt[FTR_DESC_NAME_LEN + FTR_DESC_FIELD_LEN + 2];
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int len;
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len = snprintf(opt, ARRAY_SIZE(opt), "%s.%s=",
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reg->name, reg->fields[f].name);
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if (!parameqn(cmdline, opt, len))
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return -1;
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return kstrtou64(cmdline + len, 0, v);
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}
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static void __init match_options(const char *cmdline)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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int f;
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if (!regs[i]->override)
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continue;
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for (f = 0; strlen(regs[i]->fields[f].name); f++) {
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u64 shift = regs[i]->fields[f].shift;
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2022-06-30 17:04:56 +01:00
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u64 width = regs[i]->fields[f].width ?: 4;
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u64 mask = GENMASK_ULL(shift + width - 1, shift);
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2021-02-08 09:57:22 +00:00
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u64 v;
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if (find_field(cmdline, regs[i], f, &v))
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continue;
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2021-04-08 14:10:08 +01:00
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/*
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* If an override gets filtered out, advertise
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2022-06-30 17:04:56 +01:00
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* it by setting the value to the all-ones while
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2021-04-08 14:10:08 +01:00
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* clearing the mask... Yes, this is fragile.
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*/
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if (regs[i]->fields[f].filter &&
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!regs[i]->fields[f].filter(v)) {
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regs[i]->override->val |= mask;
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regs[i]->override->mask &= ~mask;
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continue;
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}
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2021-02-08 09:57:22 +00:00
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regs[i]->override->val &= ~mask;
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regs[i]->override->val |= (v << shift) & mask;
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regs[i]->override->mask |= mask;
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return;
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}
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}
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}
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2021-02-08 09:57:25 +00:00
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static __init void __parse_cmdline(const char *cmdline, bool parse_aliases)
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2021-02-08 09:57:22 +00:00
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{
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do {
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char buf[256];
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size_t len;
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int i;
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cmdline = skip_spaces(cmdline);
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for (len = 0; cmdline[len] && !isspace(cmdline[len]); len++);
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if (!len)
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return;
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len = min(len, ARRAY_SIZE(buf) - 1);
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strncpy(buf, cmdline, len);
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buf[len] = 0;
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if (strcmp(buf, "--") == 0)
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return;
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cmdline += len;
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match_options(buf);
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2021-02-08 09:57:25 +00:00
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for (i = 0; parse_aliases && i < ARRAY_SIZE(aliases); i++)
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if (parameq(buf, aliases[i].alias))
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__parse_cmdline(aliases[i].feature, false);
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2021-02-08 09:57:22 +00:00
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} while (1);
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}
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2021-03-03 13:49:26 +00:00
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static __init const u8 *get_bootargs_cmdline(void)
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2021-02-08 09:57:22 +00:00
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{
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2021-03-03 13:49:26 +00:00
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const u8 *prop;
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void *fdt;
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int node;
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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fdt = get_early_fdt_ptr();
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if (!fdt)
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return NULL;
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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node = fdt_path_offset(fdt, "/chosen");
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if (node < 0)
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return NULL;
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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prop = fdt_getprop(fdt, node, "bootargs", NULL);
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if (!prop)
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return NULL;
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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return strlen(prop) ? prop : NULL;
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}
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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static __init void parse_cmdline(void)
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{
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const u8 *prop = get_bootargs_cmdline();
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2021-03-03 13:49:27 +00:00
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if (IS_ENABLED(CONFIG_CMDLINE_FORCE) || !prop)
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2021-03-03 13:49:26 +00:00
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__parse_cmdline(CONFIG_CMDLINE, true);
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2021-02-08 09:57:22 +00:00
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2021-03-03 13:49:26 +00:00
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if (!IS_ENABLED(CONFIG_CMDLINE_FORCE) && prop)
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__parse_cmdline(prop, true);
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2021-02-08 09:57:22 +00:00
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}
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/* Keep checkers quiet */
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2022-07-13 15:09:49 +01:00
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void init_feature_override(u64 boot_status);
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2021-02-08 09:57:22 +00:00
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2022-07-13 15:09:49 +01:00
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asmlinkage void __init init_feature_override(u64 boot_status)
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2021-02-08 09:57:22 +00:00
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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if (regs[i]->override) {
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regs[i]->override->val = 0;
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regs[i]->override->mask = 0;
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}
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}
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2022-06-30 17:04:53 +01:00
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__boot_status = boot_status;
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2021-02-08 09:57:22 +00:00
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parse_cmdline();
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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if (regs[i]->override)
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arm64: Rename arm64-internal cache maintenance functions
Although naming across the codebase isn't that consistent, it
tends to follow certain patterns. Moreover, the term "flush"
isn't defined in the Arm Architecture reference manual, and might
be interpreted to mean clean, invalidate, or both for a cache.
Rename arm64-internal functions to make the naming internally
consistent, as well as making it consistent with the Arm ARM, by
specifying whether it applies to the instruction, data, or both
caches, whether the operation is a clean, invalidate, or both.
Also specify which point the operation applies to, i.e., to the
point of unification (PoU), coherency (PoC), or persistence
(PoP).
This commit applies the following sed transformation to all files
under arch/arm64:
"s/\b__flush_cache_range\b/caches_clean_inval_pou_macro/g;"\
"s/\b__flush_icache_range\b/caches_clean_inval_pou/g;"\
"s/\binvalidate_icache_range\b/icache_inval_pou/g;"\
"s/\b__flush_dcache_area\b/dcache_clean_inval_poc/g;"\
"s/\b__inval_dcache_area\b/dcache_inval_poc/g;"\
"s/__clean_dcache_area_poc\b/dcache_clean_poc/g;"\
"s/\b__clean_dcache_area_pop\b/dcache_clean_pop/g;"\
"s/\b__clean_dcache_area_pou\b/dcache_clean_pou/g;"\
"s/\b__flush_cache_user_range\b/caches_clean_inval_user_pou/g;"\
"s/\b__flush_icache_all\b/icache_inval_all_pou/g;"
Note that __clean_dcache_area_poc is deliberately missing a word
boundary check at the beginning in order to match the efistub
symbols in image-vars.h.
Also note that, despite its name, __flush_icache_range operates
on both instruction and data caches. The name change here
reflects that.
No functional change intended.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-19-tabba@google.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-05-24 09:30:01 +01:00
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dcache_clean_inval_poc((unsigned long)regs[i]->override,
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2021-05-24 09:29:55 +01:00
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(unsigned long)regs[i]->override +
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2021-02-08 09:57:22 +00:00
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sizeof(*regs[i]->override));
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}
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}
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