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00f6ebbd0177a4cb15b353bbd4eaee6372fdbbc2
linux/drivers/phy/xilinx/Kconfig

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phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the high speed peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This patch adds driver for that ZynqMP GT core. Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-29 15:00:53 +03:00
# SPDX-License-Identifier: GPL-2.0-only
#
# PHY drivers for Xilinx platforms
#
config PHY_XILINX_ZYNQMP
tristate "Xilinx ZynqMP PHY driver"
depends on ARCH_ZYNQMP || COMPILE_TEST
select GENERIC_PHY
help
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.
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