2019-05-29 07:12:41 -07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2011-10-31 18:52:22 -05:00
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/*
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* DMA implementation for Hexagon
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*
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2013-04-08 18:30:12 -05:00
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* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
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2011-10-31 18:52:22 -05:00
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*/
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2020-09-22 15:36:11 +02:00
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#include <linux/dma-map-ops.h>
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2018-10-30 15:09:49 -07:00
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#include <linux/memblock.h>
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2013-04-08 18:30:12 -05:00
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#include <asm/page.h>
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2011-10-31 18:52:22 -05:00
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2019-11-07 18:03:11 +01:00
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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2011-10-31 18:52:22 -05:00
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{
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2018-08-20 13:54:29 +02:00
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void *addr = phys_to_virt(paddr);
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2011-10-31 18:52:22 -05:00
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switch (dir) {
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case DMA_TO_DEVICE:
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hexagon_clean_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_FROM_DEVICE:
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hexagon_inv_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_BIDIRECTIONAL:
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flush_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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default:
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BUG();
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}
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}
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2021-06-23 16:11:21 +02:00
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/*
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* Our max_low_pfn should have been backed off by 16MB in mm/init.c to create
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* DMA coherent space. Use that for the pool.
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*/
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static int __init hexagon_dma_init(void)
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{
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return dma_init_global_coherent(PFN_PHYS(max_low_pfn),
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hexagon_coherent_pool_size);
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}
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core_initcall(hexagon_dma_init);
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