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std.Target: Remove Cpu.Arch.dxil and ObjectFormat.dxcontainer.
See: https://devblogs.microsoft.com/directx/directx-adopting-spir-v Since we never hooked up the (experimental) DirectX LLVM backend, we've never actually supported targeting DXIL in Zig. With Microsoft moving away from DXIL, that seems very unlikely to change.
This commit is contained in:
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b2c53eb0d7
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18
lib/compiler/aro/aro/target.zig
vendored
18
lib/compiler/aro/aro/target.zig
vendored
@ -482,7 +482,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
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.spirv,
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.spirv32,
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.loongarch32,
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.dxil,
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.xtensa,
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=> {}, // Already 32 bit
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@ -509,7 +508,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
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.arc,
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.avr,
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.csky,
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.dxil,
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.hexagon,
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.kalimba,
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.lanai,
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@ -578,7 +576,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
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.bpfel => "bpfel",
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.bpfeb => "bpfeb",
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.csky => "csky",
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.dxil => "dxil",
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.hexagon => "hexagon",
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.loongarch32 => "loongarch32",
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.loongarch64 => "loongarch64",
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@ -702,21 +699,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
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.cygnus => "cygnus",
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.simulator => "simulator",
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.macabi => "macabi",
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.pixel => "pixel",
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.vertex => "vertex",
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.geometry => "geometry",
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.hull => "hull",
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.domain => "domain",
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.compute => "compute",
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.library => "library",
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.raygeneration => "raygeneration",
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.intersection => "intersection",
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.anyhit => "anyhit",
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.closesthit => "closesthit",
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.miss => "miss",
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.callable => "callable",
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.mesh => "mesh",
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.amplification => "amplification",
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.ohos => "openhos",
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};
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writer.writeAll(llvm_abi) catch unreachable;
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@ -673,26 +673,26 @@ pub const Abi = enum {
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cygnus,
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simulator,
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macabi,
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pixel,
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vertex,
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geometry,
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hull,
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domain,
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compute,
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library,
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raygeneration,
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intersection,
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anyhit,
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closesthit,
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miss,
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callable,
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mesh,
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amplification,
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ohos,
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// LLVM tags deliberately omitted:
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// - gnuf64
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// - amplification
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// - anyhit
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// - callable
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// - closesthit
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// - compute
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// - coreclr
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// - domain
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// - geometry
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// - gnuf64
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// - hull
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// - intersection
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// - library
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// - mesh
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// - miss
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// - pixel
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// - raygeneration
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// - vertex
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pub fn default(arch: Cpu.Arch, os: Os) Abi {
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return if (arch.isWasm()) .musl else switch (os.tag) {
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@ -788,8 +788,6 @@ pub const ObjectFormat = enum {
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c,
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/// The Common Object File Format used by Windows and UEFI.
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coff,
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/// The DirectX Container format containing either DXIL or DXBC.
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dxcontainer,
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/// The Executable and Linkable Format used by many Unixes.
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elf,
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/// The Generalized Object File Format used by z/OS.
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@ -811,11 +809,13 @@ pub const ObjectFormat = enum {
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/// The eXtended Common Object File Format used by AIX.
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xcoff,
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// LLVM tags deliberately omitted:
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// - dxcontainer
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pub fn fileExt(of: ObjectFormat, arch: Cpu.Arch) [:0]const u8 {
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return switch (of) {
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.c => ".c",
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.coff => ".obj",
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.dxcontainer => ".dxil",
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.elf, .goff, .macho, .wasm, .xcoff => ".o",
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.hex => ".ihex",
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.nvptx => ".ptx",
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@ -833,7 +833,6 @@ pub const ObjectFormat = enum {
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.uefi, .windows => .coff,
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.zos => .goff,
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else => switch (arch) {
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.dxil => .dxcontainer,
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.nvptx, .nvptx64 => .nvptx,
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.spirv, .spirv32, .spirv64 => .spirv,
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.wasm32, .wasm64 => .wasm,
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@ -873,7 +872,6 @@ pub fn toElfMachine(target: Target) std.elf.EM {
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.xcore => .XCORE,
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.xtensa => .XTENSA,
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.dxil,
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.nvptx,
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.nvptx64,
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.spirv,
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@ -907,7 +905,6 @@ pub fn toCoffMachine(target: Target) std.coff.MachineType {
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.bpfel,
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.bpfeb,
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.csky,
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.dxil,
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.hexagon,
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.kalimba,
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.lanai,
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@ -1133,7 +1130,6 @@ pub const Cpu = struct {
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bpfel,
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bpfeb,
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csky,
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dxil,
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hexagon,
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kalimba,
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lanai,
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@ -1172,6 +1168,7 @@ pub const Cpu = struct {
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// - aarch64_32
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// - amdil
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// - amdil64
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// - dxil
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// - le32
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// - le64
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// - r600
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@ -1344,7 +1341,6 @@ pub const Cpu = struct {
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.spirv,
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.spirv32,
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.spirv64,
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.dxil,
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.loongarch32,
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.loongarch64,
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.arc,
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@ -1817,7 +1813,6 @@ pub const DynamicLinker = struct {
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.kalimba,
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.lanai,
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.ve,
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.dxil,
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.loongarch32,
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.xtensa,
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=> none,
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@ -1913,7 +1908,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
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.sparc,
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.spirv32,
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.loongarch32,
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.dxil,
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.xtensa,
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=> 32,
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@ -2415,7 +2409,6 @@ pub fn cTypeAlignment(target: Target, c_type: CType) u16 {
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.csky,
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.x86,
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.xcore,
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.dxil,
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.loongarch32,
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.kalimba,
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.spu_2,
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@ -2519,7 +2512,6 @@ pub fn cTypePreferredAlignment(target: Target, c_type: CType) u16 {
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.csky,
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.xcore,
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.dxil,
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.loongarch32,
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.kalimba,
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.spu_2,
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@ -233,7 +233,6 @@ pub fn binNameAlloc(allocator: Allocator, options: BinNameOptions) error{OutOfMe
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}),
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},
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.nvptx => return std.fmt.allocPrint(allocator, "{s}.ptx", .{root_name}),
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.dxcontainer => return std.fmt.allocPrint(allocator, "{s}.dxil", .{root_name}),
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}
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}
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@ -254,23 +254,6 @@ fn libCGenericName(target: std.Target) [:0]const u8 {
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.simulator,
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.macabi,
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=> unreachable,
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.pixel,
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.vertex,
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.geometry,
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.hull,
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.domain,
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.compute,
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.library,
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.raygeneration,
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.intersection,
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.anyhit,
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.closesthit,
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.miss,
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.callable,
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.mesh,
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.amplification,
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=> unreachable,
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}
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}
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@ -440,7 +440,7 @@ pub fn resolve(options: Options) ResolveError!Config {
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.windows, .uefi => .code_view,
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else => .{ .dwarf = .@"32" },
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},
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.spirv, .nvptx, .dxcontainer, .hex, .raw, .plan9 => .strip,
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.spirv, .nvptx, .hex, .raw, .plan9 => .strip,
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};
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};
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@ -1703,7 +1703,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
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.spirv32,
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.ve,
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.spirv64,
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.dxil,
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.loongarch32,
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.loongarch64,
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.xtensa,
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@ -3010,7 +3010,6 @@ pub fn atomicPtrAlignment(
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.wasm32,
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.csky,
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.spirv32,
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.dxil,
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.loongarch32,
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.xtensa,
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=> 32,
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@ -51,7 +51,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
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.bpfel => "bpfel",
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.bpfeb => "bpfeb",
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.csky => "csky",
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.dxil => "dxil",
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.hexagon => "hexagon",
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.loongarch32 => "loongarch32",
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.loongarch64 => "loongarch64",
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@ -182,21 +181,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
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.cygnus => "cygnus",
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.simulator => "simulator",
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.macabi => "macabi",
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.pixel => "pixel",
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.vertex => "vertex",
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.geometry => "geometry",
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.hull => "hull",
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.domain => "domain",
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.compute => "compute",
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.library => "library",
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.raygeneration => "raygeneration",
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.intersection => "intersection",
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.anyhit => "anyhit",
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.closesthit => "closesthit",
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.miss => "miss",
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.callable => "callable",
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.mesh => "mesh",
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.amplification => "amplification",
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.ohos => "ohos",
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};
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try llvm_triple.appendSlice(llvm_abi);
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@ -263,7 +247,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
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.bpfel => .bpfel,
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.bpfeb => .bpfeb,
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.csky => .csky,
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.dxil => .dxil,
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.hexagon => .hexagon,
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.loongarch32 => .loongarch32,
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.loongarch64 => .loongarch64,
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@ -12726,7 +12709,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
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.spirv,
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.spirv32,
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.spirv64,
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.dxil,
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=> {},
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// LLVM does does not have a backend for these.
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@ -932,7 +932,6 @@ pub const File = struct {
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.xcoff => @panic("TODO implement xcoff object format"),
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.hex => @panic("TODO implement hex object format"),
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.raw => @panic("TODO implement raw object format"),
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.dxcontainer => @panic("TODO implement dxcontainer object format"),
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};
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}
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@ -104,7 +104,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
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=> return false,
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.coff,
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.dxcontainer,
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.elf,
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.goff,
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.hex,
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@ -161,7 +160,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
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=> true,
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// An LLVM backend exists but we don't currently support using it.
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.dxil,
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.spirv,
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.spirv32,
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.spirv64,
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