std.Target: Remove Cpu.Arch.dxil and ObjectFormat.dxcontainer.

See: https://devblogs.microsoft.com/directx/directx-adopting-spir-v

Since we never hooked up the (experimental) DirectX LLVM backend, we've never
actually supported targeting DXIL in Zig. With Microsoft moving away from DXIL,
that seems very unlikely to change.
This commit is contained in:
Alex Rønne Petersen 2024-09-20 10:26:49 +02:00 committed by Andrew Kelley
parent b2c53eb0d7
commit d1901c744c
10 changed files with 21 additions and 88 deletions

View File

@ -482,7 +482,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
.spirv,
.spirv32,
.loongarch32,
.dxil,
.xtensa,
=> {}, // Already 32 bit
@ -509,7 +508,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
.arc,
.avr,
.csky,
.dxil,
.hexagon,
.kalimba,
.lanai,
@ -578,7 +576,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
.bpfel => "bpfel",
.bpfeb => "bpfeb",
.csky => "csky",
.dxil => "dxil",
.hexagon => "hexagon",
.loongarch32 => "loongarch32",
.loongarch64 => "loongarch64",
@ -702,21 +699,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
.cygnus => "cygnus",
.simulator => "simulator",
.macabi => "macabi",
.pixel => "pixel",
.vertex => "vertex",
.geometry => "geometry",
.hull => "hull",
.domain => "domain",
.compute => "compute",
.library => "library",
.raygeneration => "raygeneration",
.intersection => "intersection",
.anyhit => "anyhit",
.closesthit => "closesthit",
.miss => "miss",
.callable => "callable",
.mesh => "mesh",
.amplification => "amplification",
.ohos => "openhos",
};
writer.writeAll(llvm_abi) catch unreachable;

View File

@ -673,26 +673,26 @@ pub const Abi = enum {
cygnus,
simulator,
macabi,
pixel,
vertex,
geometry,
hull,
domain,
compute,
library,
raygeneration,
intersection,
anyhit,
closesthit,
miss,
callable,
mesh,
amplification,
ohos,
// LLVM tags deliberately omitted:
// - gnuf64
// - amplification
// - anyhit
// - callable
// - closesthit
// - compute
// - coreclr
// - domain
// - geometry
// - gnuf64
// - hull
// - intersection
// - library
// - mesh
// - miss
// - pixel
// - raygeneration
// - vertex
pub fn default(arch: Cpu.Arch, os: Os) Abi {
return if (arch.isWasm()) .musl else switch (os.tag) {
@ -788,8 +788,6 @@ pub const ObjectFormat = enum {
c,
/// The Common Object File Format used by Windows and UEFI.
coff,
/// The DirectX Container format containing either DXIL or DXBC.
dxcontainer,
/// The Executable and Linkable Format used by many Unixes.
elf,
/// The Generalized Object File Format used by z/OS.
@ -811,11 +809,13 @@ pub const ObjectFormat = enum {
/// The eXtended Common Object File Format used by AIX.
xcoff,
// LLVM tags deliberately omitted:
// - dxcontainer
pub fn fileExt(of: ObjectFormat, arch: Cpu.Arch) [:0]const u8 {
return switch (of) {
.c => ".c",
.coff => ".obj",
.dxcontainer => ".dxil",
.elf, .goff, .macho, .wasm, .xcoff => ".o",
.hex => ".ihex",
.nvptx => ".ptx",
@ -833,7 +833,6 @@ pub const ObjectFormat = enum {
.uefi, .windows => .coff,
.zos => .goff,
else => switch (arch) {
.dxil => .dxcontainer,
.nvptx, .nvptx64 => .nvptx,
.spirv, .spirv32, .spirv64 => .spirv,
.wasm32, .wasm64 => .wasm,
@ -873,7 +872,6 @@ pub fn toElfMachine(target: Target) std.elf.EM {
.xcore => .XCORE,
.xtensa => .XTENSA,
.dxil,
.nvptx,
.nvptx64,
.spirv,
@ -907,7 +905,6 @@ pub fn toCoffMachine(target: Target) std.coff.MachineType {
.bpfel,
.bpfeb,
.csky,
.dxil,
.hexagon,
.kalimba,
.lanai,
@ -1133,7 +1130,6 @@ pub const Cpu = struct {
bpfel,
bpfeb,
csky,
dxil,
hexagon,
kalimba,
lanai,
@ -1172,6 +1168,7 @@ pub const Cpu = struct {
// - aarch64_32
// - amdil
// - amdil64
// - dxil
// - le32
// - le64
// - r600
@ -1344,7 +1341,6 @@ pub const Cpu = struct {
.spirv,
.spirv32,
.spirv64,
.dxil,
.loongarch32,
.loongarch64,
.arc,
@ -1817,7 +1813,6 @@ pub const DynamicLinker = struct {
.kalimba,
.lanai,
.ve,
.dxil,
.loongarch32,
.xtensa,
=> none,
@ -1913,7 +1908,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
.sparc,
.spirv32,
.loongarch32,
.dxil,
.xtensa,
=> 32,
@ -2415,7 +2409,6 @@ pub fn cTypeAlignment(target: Target, c_type: CType) u16 {
.csky,
.x86,
.xcore,
.dxil,
.loongarch32,
.kalimba,
.spu_2,
@ -2519,7 +2512,6 @@ pub fn cTypePreferredAlignment(target: Target, c_type: CType) u16 {
.csky,
.xcore,
.dxil,
.loongarch32,
.kalimba,
.spu_2,

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@ -233,7 +233,6 @@ pub fn binNameAlloc(allocator: Allocator, options: BinNameOptions) error{OutOfMe
}),
},
.nvptx => return std.fmt.allocPrint(allocator, "{s}.ptx", .{root_name}),
.dxcontainer => return std.fmt.allocPrint(allocator, "{s}.dxil", .{root_name}),
}
}

View File

@ -254,23 +254,6 @@ fn libCGenericName(target: std.Target) [:0]const u8 {
.simulator,
.macabi,
=> unreachable,
.pixel,
.vertex,
.geometry,
.hull,
.domain,
.compute,
.library,
.raygeneration,
.intersection,
.anyhit,
.closesthit,
.miss,
.callable,
.mesh,
.amplification,
=> unreachable,
}
}

View File

@ -440,7 +440,7 @@ pub fn resolve(options: Options) ResolveError!Config {
.windows, .uefi => .code_view,
else => .{ .dwarf = .@"32" },
},
.spirv, .nvptx, .dxcontainer, .hex, .raw, .plan9 => .strip,
.spirv, .nvptx, .hex, .raw, .plan9 => .strip,
};
};

View File

@ -1703,7 +1703,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
.spirv32,
.ve,
.spirv64,
.dxil,
.loongarch32,
.loongarch64,
.xtensa,

View File

@ -3010,7 +3010,6 @@ pub fn atomicPtrAlignment(
.wasm32,
.csky,
.spirv32,
.dxil,
.loongarch32,
.xtensa,
=> 32,

View File

@ -51,7 +51,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
.bpfel => "bpfel",
.bpfeb => "bpfeb",
.csky => "csky",
.dxil => "dxil",
.hexagon => "hexagon",
.loongarch32 => "loongarch32",
.loongarch64 => "loongarch64",
@ -182,21 +181,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
.cygnus => "cygnus",
.simulator => "simulator",
.macabi => "macabi",
.pixel => "pixel",
.vertex => "vertex",
.geometry => "geometry",
.hull => "hull",
.domain => "domain",
.compute => "compute",
.library => "library",
.raygeneration => "raygeneration",
.intersection => "intersection",
.anyhit => "anyhit",
.closesthit => "closesthit",
.miss => "miss",
.callable => "callable",
.mesh => "mesh",
.amplification => "amplification",
.ohos => "ohos",
};
try llvm_triple.appendSlice(llvm_abi);
@ -263,7 +247,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
.bpfel => .bpfel,
.bpfeb => .bpfeb,
.csky => .csky,
.dxil => .dxil,
.hexagon => .hexagon,
.loongarch32 => .loongarch32,
.loongarch64 => .loongarch64,
@ -12726,7 +12709,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
.spirv,
.spirv32,
.spirv64,
.dxil,
=> {},
// LLVM does does not have a backend for these.

View File

@ -932,7 +932,6 @@ pub const File = struct {
.xcoff => @panic("TODO implement xcoff object format"),
.hex => @panic("TODO implement hex object format"),
.raw => @panic("TODO implement raw object format"),
.dxcontainer => @panic("TODO implement dxcontainer object format"),
};
}

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@ -104,7 +104,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
=> return false,
.coff,
.dxcontainer,
.elf,
.goff,
.hex,
@ -161,7 +160,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
=> true,
// An LLVM backend exists but we don't currently support using it.
.dxil,
.spirv,
.spirv32,
.spirv64,