From baf60426d48adbd938406f07bbbd0dfdf012943b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Mon, 28 Oct 2024 23:42:47 +0100 Subject: [PATCH] std.Target: Rename amdgpu module to amdgcn. This was an inconsistency left over from c825b567b26c475e058e074e5d22af006854fab6. --- CMakeLists.txt | 2 +- lib/compiler_rt/atomics.zig | 2 +- lib/std/Target.zig | 11 +++++------ lib/std/Target/{amdgpu.zig => amdgcn.zig} | 0 tools/update_clang_options.zig | 2 +- tools/update_cpu_features.zig | 2 +- 6 files changed, 9 insertions(+), 10 deletions(-) rename lib/std/Target/{amdgpu.zig => amdgcn.zig} (100%) diff --git a/CMakeLists.txt b/CMakeLists.txt index be92fb9f9c..ca20a702bc 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -376,7 +376,7 @@ set(ZIG_STAGE2_SOURCES lib/std/Target.zig lib/std/Target/Query.zig lib/std/Target/aarch64.zig - lib/std/Target/amdgpu.zig + lib/std/Target/amdgcn.zig lib/std/Target/arm.zig lib/std/Target/avr.zig lib/std/Target/bpf.zig diff --git a/lib/compiler_rt/atomics.zig b/lib/compiler_rt/atomics.zig index db1e9b4b70..2cec398732 100644 --- a/lib/compiler_rt/atomics.zig +++ b/lib/compiler_rt/atomics.zig @@ -42,7 +42,7 @@ const largest_atomic_size = switch (arch) { // Objects smaller than this threshold are implemented in terms of compare-exchange // of a larger value. const smallest_atomic_fetch_exch_size = switch (arch) { - // On AMDGPU, there are no instructions for atomic operations other than load and store + // On AMDGCN, there are no instructions for atomic operations other than load and store // (as of LLVM 15), and so these need to be implemented in terms of atomic CAS. .amdgcn => @sizeOf(u32), else => @sizeOf(u8), diff --git a/lib/std/Target.zig b/lib/std/Target.zig index eef52c889f..9e194c72ce 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -719,7 +719,7 @@ pub const Os = struct { pub const aarch64 = @import("Target/aarch64.zig"); pub const arc = @import("Target/arc.zig"); -pub const amdgpu = @import("Target/amdgpu.zig"); +pub const amdgcn = @import("Target/amdgcn.zig"); pub const arm = @import("Target/arm.zig"); pub const avr = @import("Target/avr.zig"); pub const bpf = @import("Target/bpf.zig"); @@ -1591,7 +1591,6 @@ pub const Cpu = struct { .loongarch32, .loongarch64 => "loongarch", .mips, .mipsel, .mips64, .mips64el => "mips", .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", - .amdgcn => "amdgpu", .riscv32, .riscv64 => "riscv", .sparc, .sparc64 => "sparc", .s390x => "s390x", @@ -1620,7 +1619,7 @@ pub const Cpu = struct { .mips, .mipsel, .mips64, .mips64el => &mips.all_features, .msp430 => &msp430.all_features, .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features, - .amdgcn => &amdgpu.all_features, + .amdgcn => &amdgcn.all_features, .riscv32, .riscv64 => &riscv.all_features, .sparc, .sparc64 => &sparc.all_features, .spirv, .spirv32, .spirv64 => &spirv.all_features, @@ -1652,7 +1651,7 @@ pub const Cpu = struct { .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu), .msp430 => comptime allCpusFromDecls(msp430.cpu), .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu), - .amdgcn => comptime allCpusFromDecls(amdgpu.cpu), + .amdgcn => comptime allCpusFromDecls(amdgcn.cpu), .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu), .sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu), .spirv, .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), @@ -1890,7 +1889,7 @@ pub const Cpu = struct { }; }; return switch (arch) { - .amdgcn => &amdgpu.cpu.gfx600, + .amdgcn => &amdgcn.cpu.gfx600, .arc => &arc.cpu.generic, .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, .aarch64, .aarch64_be => &aarch64.cpu.generic, @@ -1939,7 +1938,7 @@ pub const Cpu = struct { /// `Os.Tag.freestanding`. pub fn baseline(arch: Arch, os: Os) *const Model { return switch (arch) { - .amdgcn => &amdgpu.cpu.gfx906, + .amdgcn => &amdgcn.cpu.gfx906, .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline, .aarch64 => switch (os.tag) { .bridgeos, .driverkit, .macos => &aarch64.cpu.apple_m1, diff --git a/lib/std/Target/amdgpu.zig b/lib/std/Target/amdgcn.zig similarity index 100% rename from lib/std/Target/amdgpu.zig rename to lib/std/Target/amdgcn.zig diff --git a/tools/update_clang_options.zig b/tools/update_clang_options.zig index 3d32e4c7e1..637c9a5eaf 100644 --- a/tools/update_clang_options.zig +++ b/tools/update_clang_options.zig @@ -576,7 +576,7 @@ fn knownOption(name: []const u8) ?[]const u8 { const cpu_targets = struct { pub const aarch64 = std.Target.aarch64; - pub const amdgpu = std.Target.amdgpu; + pub const amdgcn = std.Target.amdgcn; pub const arc = std.Target.arc; pub const arm = std.Target.arm; pub const avr = std.Target.avr; diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig index 2390a00575..07d66213ff 100644 --- a/tools/update_cpu_features.zig +++ b/tools/update_cpu_features.zig @@ -390,7 +390,7 @@ const llvm_targets = [_]LlvmTarget{ }, }, .{ - .zig_name = "amdgpu", + .zig_name = "amdgcn", .llvm_name = "AMDGPU", .td_name = "AMDGPU.td", .feature_overrides = &.{