Merge pull request #20975 from squeek502/cpu-features-update

update_cpu_features: Fixes and updates

lib/std/Target/arm.zig

@@ -86,6 +86,7 @@ pub const Feature = enum {
     has_v9_2a,
     has_v9_3a,
     has_v9_4a,
+    has_v9_5a,
     has_v9a,
     hwdiv,
     hwdiv_arm,
@@ -754,6 +755,13 @@ pub const all_features = blk: {
             .has_v9_3a,
         }),
     };
+    result[@intFromEnum(Feature.has_v9_5a)] = .{
+        .llvm_name = "v9.5a",
+        .description = "Support ARM v9.5a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .has_v9_4a,
+        }),
+    };
     result[@intFromEnum(Feature.has_v9a)] = .{
         .llvm_name = "v9a",
         .description = "Support ARM v9a instructions",
@@ -1582,20 +1590,13 @@ pub const all_features = blk: {
             .db,
             .dsp,
             .fp_armv8,
+            .has_v9_5a,
             .mp,
             .ras,
             .trustzone,
-            .v9_5a,
             .virtualization,
         }),
     };
-    result[@intFromEnum(Feature.v9_5a)] = .{
-        .llvm_name = "v9.5a",
-        .description = "Support ARM v9.5a instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .has_v9_4a,
-        }),
-    };
     result[@intFromEnum(Feature.v9a)] = .{
         .llvm_name = "armv9-a",
         .description = "ARMv9a architecture",

lib/std/Target/riscv.zig

@@ -78,6 +78,7 @@ pub const Feature = enum {
     svnapot,
     svpbmt,
     tagged_globals,
+    unaligned_scalar_mem,
     use_postra_scheduler,
     v,
     ventana_veyron,
@@ -584,6 +585,11 @@ pub const all_features = blk: {
         .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{
+        .llvm_name = "unaligned-scalar-mem",
+        .description = "Has reasonably performant unaligned scalar loads and stores",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.use_postra_scheduler)] = .{
         .llvm_name = "use-postra-scheduler",
         .description = "Schedule again after register allocation",

tools/update_cpu_features.zig

@@ -809,6 +809,10 @@ const llvm_targets = [_]LlvmTarget{
                 .llvm_name = "v9.4a",
                 .zig_name = "has_v9_4a",
             },
+            .{
+                .llvm_name = "v9.5a",
+                .zig_name = "has_v9_5a",
+            },
         },
         // LLVM removed support for v2 and v3 but zig wants to support targeting old hardware
         .extra_features = &.{
@@ -990,6 +994,7 @@ const llvm_targets = [_]LlvmTarget{
             "icelake_client",
             "icelake_server",
             "graniterapids_d",
+            "arrowlake_s",
         },
     },
     .{