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Merge pull request #69061 from DeeJayLSP/update_cvtt

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Update cvtt to GIT 2022
This commit is contained in:
Rémi Verschelde 2022-11-23 23:11:54 +01:00 committed by GitHub
commit 73dc0fd73e
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 8 deletions
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2
thirdparty/README.md vendored
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@ -51,7 +51,7 @@ Files extracted from upstream source:
## cvtt
- Upstream: https://github.com/elasota/ConvectionKernels
- Version: git (dc2dbbe0ae2cf2be06ef56d1021e2222a56c7fe2, 2021)
- Version: git (350416daa4e98f1c17ffc273b134d0120a2ef230, 2022)
- License: MIT
Files extracted from upstream source:

14
thirdparty/cvtt/ConvectionKernels_BC67.cpp vendored
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@ -726,10 +726,10 @@ namespace cvtt
if (carry)
{
uint32_t bitMask = (1 << carry) - 1;
for (int i = 0; i < 4; i++)
for (int i = 0; i < entriesRemaining; i++)
{
m_vector[i] >>= carry;
if (i != 3)
if (i != entriesRemaining - 1)
m_vector[i] |= (m_vector[i + 1] & bitMask) << (32 - carry);
}
}
@ -3058,14 +3058,11 @@ void cvtt::Internal::BC6HComputer::SignExtendSingle(int &v, int bits)
void cvtt::Internal::BC6HComputer::UnpackOne(PixelBlockF16 &output, const uint8_t *pBC, bool isSigned)
{
UnpackingVector pv;
pv.Init(pBC);
int numModeBits = 2;
int modeBits = pv.Unpack(2);
int modeBits = pBC[0] & 0x3;
if (modeBits != 0 && modeBits != 1)
{
modeBits |= pv.Unpack(3) << 2;
modeBits = pBC[0] & 0x1f;
numModeBits += 3;
}
@ -3102,6 +3099,9 @@ void cvtt::Internal::BC6HComputer::UnpackOne(PixelBlockF16 &output, const uint8_
for (int ch = 0; ch < 3; ch++)
eps[subset][epi][ch] = 0;
UnpackingVector pv;
pv.Init(pBC);
{
uint32_t header[3];
uint16_t codedEPs[2][2][3];