From 5963669eac04a6afd86d9e7027338eb0c6b5f3f9 Mon Sep 17 00:00:00 2001
From: Brian <4408242+PennRobotics@users.noreply.github.com>
Date: Mon, 24 Jun 2024 16:38:10 +0200
Subject: [PATCH] add support for Arm stack limit register instructions

---
 .../data/languages/ARMTHUMBinstructions.sinc  | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
index f94bfa260c..6f84312090 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
@@ -2858,6 +2858,45 @@ control: "control" 			is epsilon {}
   Rd0811 = zext((altStackMode << 1) | notPrivileged);
 }
 
+@endif
+@if defined(CORTEX)
+
+define pcodeop setMainStackPointerLimit;
+
+msplim: "msplim" 		    is epsilon {}
+
+:msr^ItCond msplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=10 & msplim
+{
+  build ItCond;
+  setMainStackPointerLimit(Rn0003);
+}
+
+define pcodeop setProcStackPointerLimit;
+
+psplim: "psplim" 		is epsilon {}
+
+:msr^ItCond psplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=11 & psplim
+{
+  build ItCond;
+  setProcStackPointerLimit(Rn0003);
+}
+
+define pcodeop getMainStackPointerLimit;
+
+:mrs^ItCond Rd0811,msplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=10 & msplim
+{
+  build ItCond;
+  Rd0811 = getMainStackPointerLimit();
+}
+
+define pcodeop getProcessStackPointerLimit;
+
+:mrs^ItCond Rd0811,psplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=11 & psplim
+{
+  build ItCond;
+  Rd0811 = getProcessStackPointerLimit();
+}
+
 @endif
 
 :mrs^ItCond Rd0811,cpsr 		is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=0 & cpsr