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9a6e91d08e
If 'dev_pm_opp_set_supported_hw()' fails, 'opp_data->opp_node' refcount will be decremented 2 times. One, just a few lines above, and another one in the error handling path. Fix it by simply moving the 'of_node_put' call of the normal path. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
269 lines
6.6 KiB
C
269 lines
6.6 KiB
C
/*
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* TI CPUFreq/OPP hw-supported driver
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*
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* Copyright (C) 2016-2017 Texas Instruments, Inc.
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* Dave Gerlach <d-gerlach@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/cpu.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/pm_opp.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define REVISION_MASK 0xF
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#define REVISION_SHIFT 28
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#define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
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#define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
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#define DRA7_EFUSE_HAS_OD_MPU_OPP 11
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#define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
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#define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
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#define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
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#define DRA7_EFUSE_OD_MPU_OPP BIT(1)
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#define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
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#define VERSION_COUNT 2
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struct ti_cpufreq_data;
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struct ti_cpufreq_soc_data {
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unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
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unsigned long efuse);
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unsigned long efuse_fallback;
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unsigned long efuse_offset;
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unsigned long efuse_mask;
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unsigned long efuse_shift;
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unsigned long rev_offset;
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};
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struct ti_cpufreq_data {
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struct device *cpu_dev;
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struct device_node *opp_node;
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struct regmap *syscon;
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const struct ti_cpufreq_soc_data *soc_data;
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};
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static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
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unsigned long efuse)
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{
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if (!efuse)
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efuse = opp_data->soc_data->efuse_fallback;
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/* AM335x and AM437x use "OPP disable" bits, so invert */
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return ~efuse;
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}
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static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
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unsigned long efuse)
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{
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unsigned long calculated_efuse = DRA7_EFUSE_NOM_MPU_OPP;
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/*
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* The efuse on dra7 and am57 parts contains a specific
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* value indicating the highest available OPP.
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*/
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switch (efuse) {
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case DRA7_EFUSE_HAS_ALL_MPU_OPP:
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case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
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calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
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case DRA7_EFUSE_HAS_OD_MPU_OPP:
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calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
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}
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return calculated_efuse;
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}
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static struct ti_cpufreq_soc_data am3x_soc_data = {
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.efuse_xlate = amx3_efuse_xlate,
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.efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
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.efuse_offset = 0x07fc,
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.efuse_mask = 0x1fff,
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.rev_offset = 0x600,
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};
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static struct ti_cpufreq_soc_data am4x_soc_data = {
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.efuse_xlate = amx3_efuse_xlate,
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.efuse_fallback = AM43XX_600M_ARM_MPU_MAX_FREQ,
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.efuse_offset = 0x0610,
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.efuse_mask = 0x3f,
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.rev_offset = 0x600,
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};
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static struct ti_cpufreq_soc_data dra7_soc_data = {
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.efuse_xlate = dra7_efuse_xlate,
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.efuse_offset = 0x020c,
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.efuse_mask = 0xf80000,
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.efuse_shift = 19,
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.rev_offset = 0x204,
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};
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/**
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* ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
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* @opp_data: pointer to ti_cpufreq_data context
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* @efuse_value: Set to the value parsed from efuse
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*
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* Returns error code if efuse not read properly.
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*/
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static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
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u32 *efuse_value)
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{
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struct device *dev = opp_data->cpu_dev;
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u32 efuse;
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int ret;
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ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
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&efuse);
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if (ret) {
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dev_err(dev,
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"Failed to read the efuse value from syscon: %d\n",
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ret);
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return ret;
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}
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efuse = (efuse & opp_data->soc_data->efuse_mask);
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efuse >>= opp_data->soc_data->efuse_shift;
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*efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse);
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return 0;
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}
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/**
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* ti_cpufreq_get_rev() - Parse and return rev value present on SoC
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* @opp_data: pointer to ti_cpufreq_data context
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* @revision_value: Set to the value parsed from revision register
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*
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* Returns error code if revision not read properly.
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*/
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static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
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u32 *revision_value)
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{
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struct device *dev = opp_data->cpu_dev;
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u32 revision;
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int ret;
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ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
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&revision);
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if (ret) {
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dev_err(dev,
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"Failed to read the revision number from syscon: %d\n",
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ret);
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return ret;
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}
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*revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
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return 0;
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}
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static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_data)
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{
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struct device *dev = opp_data->cpu_dev;
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struct device_node *np = opp_data->opp_node;
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opp_data->syscon = syscon_regmap_lookup_by_phandle(np,
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"syscon");
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if (IS_ERR(opp_data->syscon)) {
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dev_err(dev,
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"\"syscon\" is missing, cannot use OPPv2 table.\n");
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return PTR_ERR(opp_data->syscon);
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}
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return 0;
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}
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static const struct of_device_id ti_cpufreq_of_match[] = {
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{ .compatible = "ti,am33xx", .data = &am3x_soc_data, },
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{ .compatible = "ti,am4372", .data = &am4x_soc_data, },
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{ .compatible = "ti,dra7", .data = &dra7_soc_data },
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{},
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};
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static int ti_cpufreq_init(void)
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{
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u32 version[VERSION_COUNT];
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struct device_node *np;
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const struct of_device_id *match;
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struct ti_cpufreq_data *opp_data;
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int ret;
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np = of_find_node_by_path("/");
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match = of_match_node(ti_cpufreq_of_match, np);
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if (!match)
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return -ENODEV;
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opp_data = kzalloc(sizeof(*opp_data), GFP_KERNEL);
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if (!opp_data)
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return -ENOMEM;
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opp_data->soc_data = match->data;
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opp_data->cpu_dev = get_cpu_device(0);
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if (!opp_data->cpu_dev) {
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pr_err("%s: Failed to get device for CPU0\n", __func__);
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return -ENODEV;
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}
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opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev);
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if (!opp_data->opp_node) {
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dev_info(opp_data->cpu_dev,
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"OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n");
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goto register_cpufreq_dt;
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}
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ret = ti_cpufreq_setup_syscon_register(opp_data);
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if (ret)
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goto fail_put_node;
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/*
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* OPPs determine whether or not they are supported based on
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* two metrics:
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* 0 - SoC Revision
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* 1 - eFuse value
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*/
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ret = ti_cpufreq_get_rev(opp_data, &version[0]);
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if (ret)
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goto fail_put_node;
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ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
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if (ret)
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goto fail_put_node;
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ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
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version, VERSION_COUNT));
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if (ret) {
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dev_err(opp_data->cpu_dev,
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"Failed to set supported hardware\n");
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goto fail_put_node;
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}
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of_node_put(opp_data->opp_node);
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register_cpufreq_dt:
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platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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return 0;
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fail_put_node:
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of_node_put(opp_data->opp_node);
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return ret;
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}
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device_initcall(ti_cpufreq_init);
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