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ff2e27ae0b
linux/arch/arm/mach-cns3xxx
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Russell King ff2e27ae0b ARM: GIC: consolidate gic_cpu_base_addr to common GIC code 
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:42 +00:00
..
include/mach ARM: 6476/1: Use shared GIC entry macros on CNS3XXX 2010-12-07 09:20:24 +00:00
cns3420vb.c arm: remove machine_desc.io_pg_offst and .phys_io 2010-10-20 00:27:46 -04:00
core.c ARM: GIC: consolidate gic_cpu_base_addr to common GIC code 2010-12-14 19:21:42 +00:00
core.h ARM: GIC: consolidate gic_cpu_base_addr to common GIC code 2010-12-14 19:21:42 +00:00
devices.c ARM: cns3xxx: Add support for AHCI controllers 2010-06-08 17:37:09 +04:00
devices.h ARM: cns3xxx: Add support for AHCI controllers 2010-06-08 17:37:09 +04:00
Kconfig ARM: cns3xxx: Add CNS3420 Validation Board support 2010-05-02 21:55:49 +04:00
Makefile ARM: cns3xxx: Add support for SDHCI controllers 2010-06-08 17:37:09 +04:00
Makefile.boot
pcie.c ARM: cns3xxx: Fix build with CONFIG_PCI=y 2010-11-29 19:19:15 +03:00
pm.c ARM: cns3xxx: Use IO memory accessors everywhere 2010-06-08 17:31:29 +04:00