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For reading flash content we use MMIO but it's possible to read only first 16 MiB this way. It's simply an arch design/limitation. To support flash sizes bigger than 16 MiB implement indirect access using ChipCommon registers. This has been tested using MX25L25635F. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
392 lines
9.7 KiB
C
392 lines
9.7 KiB
C
#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/mtd/mtd.h>
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#include <linux/platform_device.h>
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#include <linux/bcma/bcma.h>
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#include "bcm47xxsflash.h"
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Serial flash driver for BCMA bus");
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static const char * const probes[] = { "bcm47xxpart", NULL };
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/**************************************************
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* Various helpers
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**************************************************/
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static void bcm47xxsflash_cmd(struct bcm47xxsflash *b47s, u32 opcode)
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{
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int i;
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b47s->cc_write(b47s, BCMA_CC_FLASHCTL, BCMA_CC_FLASHCTL_START | opcode);
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for (i = 0; i < 1000; i++) {
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if (!(b47s->cc_read(b47s, BCMA_CC_FLASHCTL) &
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BCMA_CC_FLASHCTL_BUSY))
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return;
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cpu_relax();
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}
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pr_err("Control command failed (timeout)!\n");
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}
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static int bcm47xxsflash_poll(struct bcm47xxsflash *b47s, int timeout)
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{
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unsigned long deadline = jiffies + timeout;
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do {
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switch (b47s->type) {
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case BCM47XXSFLASH_TYPE_ST:
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bcm47xxsflash_cmd(b47s, OPCODE_ST_RDSR);
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if (!(b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
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SR_ST_WIP))
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return 0;
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break;
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case BCM47XXSFLASH_TYPE_ATMEL:
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bcm47xxsflash_cmd(b47s, OPCODE_AT_STATUS);
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if (b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
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SR_AT_READY)
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return 0;
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break;
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}
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cpu_relax();
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udelay(1);
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} while (!time_after_eq(jiffies, deadline));
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pr_err("Timeout waiting for flash to be ready!\n");
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return -EBUSY;
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}
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/**************************************************
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* MTD ops
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**************************************************/
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static int bcm47xxsflash_erase(struct mtd_info *mtd, struct erase_info *erase)
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{
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struct bcm47xxsflash *b47s = mtd->priv;
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int err;
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switch (b47s->type) {
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case BCM47XXSFLASH_TYPE_ST:
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bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr);
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/* Newer flashes have "sub-sectors" which can be erased
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* independently with a new command: ST_SSE. The ST_SE command
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* erases 64KB just as before.
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*/
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if (b47s->blocksize < (64 * 1024))
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bcm47xxsflash_cmd(b47s, OPCODE_ST_SSE);
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else
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bcm47xxsflash_cmd(b47s, OPCODE_ST_SE);
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break;
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case BCM47XXSFLASH_TYPE_ATMEL:
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr << 1);
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bcm47xxsflash_cmd(b47s, OPCODE_AT_PAGE_ERASE);
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break;
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}
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err = bcm47xxsflash_poll(b47s, HZ);
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if (err)
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erase->state = MTD_ERASE_FAILED;
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else
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erase->state = MTD_ERASE_DONE;
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if (erase->callback)
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erase->callback(erase);
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return err;
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}
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static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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struct bcm47xxsflash *b47s = mtd->priv;
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size_t orig_len = len;
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/* Check address range */
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if ((from + len) > mtd->size)
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return -EINVAL;
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/* Read as much as possible using fast MMIO window */
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if (from < BCM47XXSFLASH_WINDOW_SZ) {
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size_t memcpy_len;
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memcpy_len = min(len, (size_t)(BCM47XXSFLASH_WINDOW_SZ - from));
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memcpy_fromio(buf, b47s->window + from, memcpy_len);
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from += memcpy_len;
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len -= memcpy_len;
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buf += memcpy_len;
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}
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/* Use indirect access for content out of the window */
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for (; len; len--) {
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, from++);
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bcm47xxsflash_cmd(b47s, OPCODE_ST_READ4B);
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*buf++ = b47s->cc_read(b47s, BCMA_CC_FLASHDATA);
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}
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*retlen = orig_len;
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return orig_len;
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}
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static int bcm47xxsflash_write_st(struct mtd_info *mtd, u32 offset, size_t len,
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const u_char *buf)
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{
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struct bcm47xxsflash *b47s = mtd->priv;
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int written = 0;
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/* Enable writes */
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bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
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/* Write first byte */
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, offset);
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b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
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/* Program page */
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if (b47s->bcma_cc->core->id.rev < 20) {
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bcm47xxsflash_cmd(b47s, OPCODE_ST_PP);
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return 1; /* 1B written */
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}
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/* Program page and set CSA (on newer chips we can continue writing) */
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bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | OPCODE_ST_PP);
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offset++;
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len--;
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written++;
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while (len > 0) {
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/* Page boundary, another function call is needed */
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if ((offset & 0xFF) == 0)
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break;
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bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | *buf++);
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offset++;
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len--;
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written++;
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}
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/* All done, drop CSA & poll */
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b47s->cc_write(b47s, BCMA_CC_FLASHCTL, 0);
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udelay(1);
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if (bcm47xxsflash_poll(b47s, HZ / 10))
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pr_err("Flash rejected dropping CSA\n");
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return written;
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}
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static int bcm47xxsflash_write_at(struct mtd_info *mtd, u32 offset, size_t len,
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const u_char *buf)
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{
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struct bcm47xxsflash *b47s = mtd->priv;
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u32 mask = b47s->blocksize - 1;
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u32 page = (offset & ~mask) << 1;
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u32 byte = offset & mask;
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int written = 0;
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/* If we don't overwrite whole page, read it to the buffer first */
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if (byte || (len < b47s->blocksize)) {
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int err;
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
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bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_LOAD);
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/* 250 us for AT45DB321B */
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err = bcm47xxsflash_poll(b47s, HZ / 1000);
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if (err) {
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pr_err("Timeout reading page 0x%X info buffer\n", page);
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return err;
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}
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}
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/* Change buffer content with our data */
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while (len > 0) {
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/* Page boundary, another function call is needed */
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if (byte == b47s->blocksize)
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break;
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, byte++);
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b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
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bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_WRITE);
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len--;
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written++;
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}
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/* Program page with the buffer content */
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b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
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bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_PROGRAM);
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return written;
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}
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static int bcm47xxsflash_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const u_char *buf)
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{
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struct bcm47xxsflash *b47s = mtd->priv;
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int written;
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/* Writing functions can return without writing all passed data, for
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* example when the hardware is too old or when we git page boundary.
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*/
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while (len > 0) {
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switch (b47s->type) {
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case BCM47XXSFLASH_TYPE_ST:
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written = bcm47xxsflash_write_st(mtd, to, len, buf);
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break;
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case BCM47XXSFLASH_TYPE_ATMEL:
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written = bcm47xxsflash_write_at(mtd, to, len, buf);
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break;
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default:
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BUG_ON(1);
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}
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if (written < 0) {
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pr_err("Error writing at offset 0x%llX\n", to);
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return written;
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}
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to += (loff_t)written;
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len -= written;
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*retlen += written;
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buf += written;
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}
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return 0;
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}
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static void bcm47xxsflash_fill_mtd(struct bcm47xxsflash *b47s,
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struct device *dev)
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{
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struct mtd_info *mtd = &b47s->mtd;
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mtd->priv = b47s;
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mtd->dev.parent = dev;
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mtd->name = "bcm47xxsflash";
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mtd->type = MTD_NORFLASH;
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mtd->flags = MTD_CAP_NORFLASH;
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mtd->size = b47s->size;
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mtd->erasesize = b47s->blocksize;
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mtd->writesize = 1;
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mtd->writebufsize = 1;
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mtd->_erase = bcm47xxsflash_erase;
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mtd->_read = bcm47xxsflash_read;
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mtd->_write = bcm47xxsflash_write;
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}
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/**************************************************
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* BCMA
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**************************************************/
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static int bcm47xxsflash_bcma_cc_read(struct bcm47xxsflash *b47s, u16 offset)
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{
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return bcma_cc_read32(b47s->bcma_cc, offset);
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}
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static void bcm47xxsflash_bcma_cc_write(struct bcm47xxsflash *b47s, u16 offset,
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u32 value)
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{
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bcma_cc_write32(b47s->bcma_cc, offset, value);
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}
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static int bcm47xxsflash_bcma_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bcma_sflash *sflash = dev_get_platdata(dev);
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struct bcm47xxsflash *b47s;
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struct resource *res;
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int err;
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b47s = devm_kzalloc(dev, sizeof(*b47s), GFP_KERNEL);
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if (!b47s)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "invalid resource\n");
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return -EINVAL;
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}
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if (!devm_request_mem_region(dev, res->start, resource_size(res),
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res->name)) {
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dev_err(dev, "can't request region for resource %pR\n", res);
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return -EBUSY;
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}
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b47s->bcma_cc = container_of(sflash, struct bcma_drv_cc, sflash);
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b47s->cc_read = bcm47xxsflash_bcma_cc_read;
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b47s->cc_write = bcm47xxsflash_bcma_cc_write;
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/*
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* On old MIPS devices cache was magically invalidated when needed,
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* allowing us to use cached access and gain some performance. Trying
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* the same on ARM based BCM53573 results in flash corruptions, we need
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* to use uncached access for it.
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*
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* It may be arch specific, but right now there is only 1 ARM SoC using
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* this driver, so let's follow Broadcom's reference code and check
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* ChipCommon revision.
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*/
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if (b47s->bcma_cc->core->id.rev == 54)
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b47s->window = ioremap_nocache(res->start, resource_size(res));
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else
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b47s->window = ioremap_cache(res->start, resource_size(res));
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if (!b47s->window) {
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dev_err(dev, "ioremap failed for resource %pR\n", res);
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return -ENOMEM;
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}
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switch (b47s->bcma_cc->capabilities & BCMA_CC_CAP_FLASHT) {
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case BCMA_CC_FLASHT_STSER:
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b47s->type = BCM47XXSFLASH_TYPE_ST;
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break;
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case BCMA_CC_FLASHT_ATSER:
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b47s->type = BCM47XXSFLASH_TYPE_ATMEL;
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break;
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}
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b47s->blocksize = sflash->blocksize;
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b47s->numblocks = sflash->numblocks;
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b47s->size = sflash->size;
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bcm47xxsflash_fill_mtd(b47s, &pdev->dev);
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platform_set_drvdata(pdev, b47s);
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err = mtd_device_parse_register(&b47s->mtd, probes, NULL, NULL, 0);
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if (err) {
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pr_err("Failed to register MTD device: %d\n", err);
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iounmap(b47s->window);
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return err;
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}
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if (bcm47xxsflash_poll(b47s, HZ / 10))
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pr_warn("Serial flash busy\n");
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return 0;
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}
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static int bcm47xxsflash_bcma_remove(struct platform_device *pdev)
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{
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struct bcm47xxsflash *b47s = platform_get_drvdata(pdev);
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mtd_device_unregister(&b47s->mtd);
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iounmap(b47s->window);
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return 0;
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}
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static struct platform_driver bcma_sflash_driver = {
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.probe = bcm47xxsflash_bcma_probe,
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.remove = bcm47xxsflash_bcma_remove,
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.driver = {
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.name = "bcma_sflash",
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},
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};
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/**************************************************
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* Init
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**************************************************/
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module_platform_driver(bcma_sflash_driver);
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