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0d84438d98
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
369 lines
10 KiB
C
369 lines
10 KiB
C
/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*/
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#ifndef __ASM_SPARC_FLOPPY_H
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#define __ASM_SPARC_FLOPPY_H
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/idprom.h>
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#include <asm/machines.h>
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#include <asm/oplib.h>
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#include <asm/auxio.h>
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#include <asm/irq.h>
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/* We don't need no stinkin' I/O port allocation crap. */
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#undef release_region
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#undef request_region
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#define release_region(X, Y) do { } while(0)
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#define request_region(X, Y, Z) (1)
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/* References:
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* 1) Netbsd Sun floppy driver.
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* 2) NCR 82077 controller manual
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* 3) Intel 82077 controller manual
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*/
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struct sun_flpy_controller {
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volatile unsigned char status_82072; /* Main Status reg. */
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#define dcr_82072 status_82072 /* Digital Control reg. */
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#define status1_82077 status_82072 /* Auxiliary Status reg. 1 */
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volatile unsigned char data_82072; /* Data fifo. */
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#define status2_82077 data_82072 /* Auxiliary Status reg. 2 */
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volatile unsigned char dor_82077; /* Digital Output reg. */
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volatile unsigned char tapectl_82077; /* What the? Tape control reg? */
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volatile unsigned char status_82077; /* Main Status Register. */
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#define drs_82077 status_82077 /* Digital Rate Select reg. */
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volatile unsigned char data_82077; /* Data fifo. */
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volatile unsigned char ___unused;
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volatile unsigned char dir_82077; /* Digital Input reg. */
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#define dcr_82077 dir_82077 /* Config Control reg. */
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};
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/* You'll only ever find one controller on a SparcStation anyways. */
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static struct sun_flpy_controller *sun_fdc = NULL;
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volatile unsigned char *fdc_status;
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struct sun_floppy_ops {
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unsigned char (*fd_inb)(int port);
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void (*fd_outb)(unsigned char value, int port);
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};
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static struct sun_floppy_ops sun_fdops;
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#define fd_inb(port) sun_fdops.fd_inb(port)
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#define fd_outb(value,port) sun_fdops.fd_outb(value,port)
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#define fd_enable_dma() sun_fd_enable_dma()
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#define fd_disable_dma() sun_fd_disable_dma()
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#define fd_request_dma() (0) /* nothing... */
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#define fd_free_dma() /* nothing... */
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#define fd_clear_dma_ff() /* nothing... */
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#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode)
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#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr)
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#define fd_set_dma_count(count) sun_fd_set_dma_count(count)
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#define fd_enable_irq() /* nothing... */
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#define fd_disable_irq() /* nothing... */
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#define fd_cacheflush(addr, size) /* nothing... */
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#define fd_request_irq() sun_fd_request_irq()
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#define fd_free_irq() /* nothing... */
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#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */
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#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size))
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#define fd_dma_mem_free(addr,size) (vfree((void *)(addr)))
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#endif
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#define FLOPPY_MOTOR_MASK 0x10
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/* XXX This isn't really correct. XXX */
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#define get_dma_residue(x) (0)
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#define FLOPPY0_TYPE 4
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#define FLOPPY1_TYPE 0
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/* Super paranoid... */
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#undef HAVE_DISABLE_HLT
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/* Here is where we catch the floppy driver trying to initialize,
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* therefore this is where we call the PROM device tree probing
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* routine etc. on the Sparc.
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*/
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#define FDC1 sun_floppy_init()
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#define N_FDC 1
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#define N_DRIVE 8
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/* No 64k boundary crossing problems on the Sparc. */
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#define CROSS_64KB(a,s) (0)
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/* Routines unique to each controller type on a Sun. */
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static unsigned char sun_82072_fd_inb(int port)
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{
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udelay(5);
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switch(port & 7) {
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default:
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printk("floppy: Asked to read unknown port %d\n", port);
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panic("floppy: Port bolixed.");
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case 4: /* FD_STATUS */
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return sun_fdc->status_82072 & ~STATUS_DMA;
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case 5: /* FD_DATA */
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return sun_fdc->data_82072;
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case 7: /* FD_DIR */
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return (get_auxio() & AUXIO_FLPY_DCHG)? 0x80: 0;
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};
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panic("sun_82072_fd_inb: How did I get here?");
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}
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static void sun_82072_fd_outb(unsigned char value, int port)
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{
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udelay(5);
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switch(port & 7) {
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default:
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printk("floppy: Asked to write to unknown port %d\n", port);
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panic("floppy: Port bolixed.");
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case 2: /* FD_DOR */
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/* Oh geese, 82072 on the Sun has no DOR register,
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* the functionality is implemented via the AUXIO
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* I/O register. So we must emulate the behavior.
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*
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* ASSUMPTIONS: There will only ever be one floppy
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* drive attached to a Sun controller
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* and it will be at drive zero.
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*/
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{
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unsigned bits = 0;
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if (value & 0x10) bits |= AUXIO_FLPY_DSEL;
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if ((value & 0x80) == 0) bits |= AUXIO_FLPY_EJCT;
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set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT));
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}
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break;
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case 5: /* FD_DATA */
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sun_fdc->data_82072 = value;
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break;
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case 7: /* FD_DCR */
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sun_fdc->dcr_82072 = value;
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break;
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case 4: /* FD_STATUS */
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sun_fdc->status_82072 = value;
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break;
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};
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return;
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}
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static unsigned char sun_82077_fd_inb(int port)
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{
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udelay(5);
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switch(port & 7) {
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default:
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printk("floppy: Asked to read unknown port %d\n", port);
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panic("floppy: Port bolixed.");
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case 4: /* FD_STATUS */
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return sun_fdc->status_82077 & ~STATUS_DMA;
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case 5: /* FD_DATA */
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return sun_fdc->data_82077;
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case 7: /* FD_DIR */
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/* XXX: Is DCL on 0x80 in sun4m? */
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return sun_fdc->dir_82077;
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};
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panic("sun_82072_fd_inb: How did I get here?");
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}
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static void sun_82077_fd_outb(unsigned char value, int port)
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{
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udelay(5);
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switch(port & 7) {
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default:
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printk("floppy: Asked to write to unknown port %d\n", port);
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panic("floppy: Port bolixed.");
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case 2: /* FD_DOR */
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/* Happily, the 82077 has a real DOR register. */
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sun_fdc->dor_82077 = value;
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break;
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case 5: /* FD_DATA */
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sun_fdc->data_82077 = value;
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break;
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case 7: /* FD_DCR */
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sun_fdc->dcr_82077 = value;
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break;
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case 4: /* FD_STATUS */
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sun_fdc->status_82077 = value;
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break;
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};
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return;
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}
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/* For pseudo-dma (Sun floppy drives have no real DMA available to
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* them so we must eat the data fifo bytes directly ourselves) we have
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* three state variables. doing_pdma tells our inline low-level
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* assembly floppy interrupt entry point whether it should sit and eat
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* bytes from the fifo or just transfer control up to the higher level
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* floppy interrupt c-code. I tried very hard but I could not get the
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* pseudo-dma to work in c-code without getting many overruns and
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* underruns. If non-zero, doing_pdma encodes the direction of
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* the transfer for debugging. 1=read 2=write
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*/
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char *pdma_vaddr;
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unsigned long pdma_size;
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volatile int doing_pdma = 0;
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/* This is software state */
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char *pdma_base = NULL;
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unsigned long pdma_areasize;
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/* Common routines to all controller types on the Sparc. */
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static __inline__ void virtual_dma_init(void)
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{
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/* nothing... */
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}
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static __inline__ void sun_fd_disable_dma(void)
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{
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doing_pdma = 0;
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if (pdma_base) {
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mmu_unlockarea(pdma_base, pdma_areasize);
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pdma_base = NULL;
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}
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}
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static __inline__ void sun_fd_set_dma_mode(int mode)
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{
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switch(mode) {
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case DMA_MODE_READ:
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doing_pdma = 1;
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break;
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case DMA_MODE_WRITE:
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doing_pdma = 2;
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break;
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default:
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printk("Unknown dma mode %d\n", mode);
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panic("floppy: Giving up...");
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}
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}
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static __inline__ void sun_fd_set_dma_addr(char *buffer)
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{
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pdma_vaddr = buffer;
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}
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static __inline__ void sun_fd_set_dma_count(int length)
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{
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pdma_size = length;
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}
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static __inline__ void sun_fd_enable_dma(void)
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{
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pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
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pdma_base = pdma_vaddr;
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pdma_areasize = pdma_size;
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}
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/* Our low-level entry point in arch/sparc/kernel/entry.S */
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irqreturn_t floppy_hardint(int irq, void *unused);
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static int sun_fd_request_irq(void)
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{
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static int once = 0;
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int error;
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if(!once) {
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once = 1;
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error = request_fast_irq(FLOPPY_IRQ, floppy_hardint,
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IRQF_DISABLED, "floppy");
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return ((error == 0) ? 0 : -1);
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} else return 0;
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}
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static struct linux_prom_registers fd_regs[2];
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static int sun_floppy_init(void)
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{
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char state[128];
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int tnode, fd_node, num_regs;
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struct resource r;
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use_virtual_dma = 1;
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FLOPPY_IRQ = 11;
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/* Forget it if we aren't on a machine that could possibly
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* ever have a floppy drive.
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*/
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if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) ||
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((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) ||
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(idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) {
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/* We certainly don't have a floppy controller. */
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goto no_sun_fdc;
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}
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/* Well, try to find one. */
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tnode = prom_getchild(prom_root_node);
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fd_node = prom_searchsiblings(tnode, "obio");
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if(fd_node != 0) {
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tnode = prom_getchild(fd_node);
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fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo");
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} else {
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fd_node = prom_searchsiblings(tnode, "fd");
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}
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if(fd_node == 0) {
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goto no_sun_fdc;
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}
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/* The sun4m lets us know if the controller is actually usable. */
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if(sparc_cpu_model == sun4m &&
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prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {
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if(!strcmp(state, "disabled")) {
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goto no_sun_fdc;
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}
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}
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num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs));
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num_regs = (num_regs / sizeof(fd_regs[0]));
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prom_apply_obio_ranges(fd_regs, num_regs);
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memset(&r, 0, sizeof(r));
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r.flags = fd_regs[0].which_io;
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r.start = fd_regs[0].phys_addr;
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sun_fdc = (struct sun_flpy_controller *)
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sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
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/* Last minute sanity check... */
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if(sun_fdc->status_82072 == 0xff) {
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sun_fdc = NULL;
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goto no_sun_fdc;
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}
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if(sparc_cpu_model == sun4c) {
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sun_fdops.fd_inb = sun_82072_fd_inb;
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sun_fdops.fd_outb = sun_82072_fd_outb;
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fdc_status = &sun_fdc->status_82072;
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/* printk("AUXIO @0x%lx\n", auxio_register); */ /* P3 */
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} else {
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sun_fdops.fd_inb = sun_82077_fd_inb;
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sun_fdops.fd_outb = sun_82077_fd_outb;
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fdc_status = &sun_fdc->status_82077;
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/* printk("DOR @0x%p\n", &sun_fdc->dor_82077); */ /* P3 */
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}
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/* Success... */
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allowed_drive_mask = 0x01;
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return (int) sun_fdc;
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no_sun_fdc:
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return -1;
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}
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static int sparc_eject(void)
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{
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set_dor(0x00, 0xff, 0x90);
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udelay(500);
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set_dor(0x00, 0x6f, 0x00);
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udelay(500);
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return 0;
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}
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#define fd_eject(drive) sparc_eject()
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#define EXTRA_FLOPPY_PARAMS
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#endif /* !(__ASM_SPARC_FLOPPY_H) */
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