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So far, the CIDR and EXID registers were in the DBGU interface. This device has disappeared with the SAMA5D2 family. These registers are exposed through a new device called chipid. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> [nicolas.ferre@atmel.com: remove useless warnings] Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> [arnd@arndb.de: suggest to use static functions to reduce scope] Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
143 lines
3.2 KiB
C
143 lines
3.2 KiB
C
/*
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* Copyright (C) 2015 Atmel
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*
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* Alexandre Belloni <alexandre.belloni@free-electrons.com
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* Boris Brezillon <boris.brezillon@free-electrons.com
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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*/
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#define pr_fmt(fmt) "AT91: " fmt
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include "soc.h"
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#define AT91_DBGU_CIDR 0x40
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#define AT91_DBGU_EXID 0x44
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#define AT91_CHIPID_CIDR 0x00
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#define AT91_CHIPID_EXID 0x04
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#define AT91_CIDR_VERSION(x) ((x) & 0x1f)
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#define AT91_CIDR_EXT BIT(31)
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#define AT91_CIDR_MATCH_MASK 0x7fffffe0
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static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
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{
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struct device_node *np;
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void __iomem *regs;
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np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
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if (!np)
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np = of_find_compatible_node(NULL, NULL,
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"atmel,at91sam9260-dbgu");
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if (!np)
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return -ENODEV;
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regs = of_iomap(np, 0);
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of_node_put(np);
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if (!regs) {
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pr_warn("Could not map DBGU iomem range");
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return -ENXIO;
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}
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*cidr = readl(regs + AT91_DBGU_CIDR);
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*exid = readl(regs + AT91_DBGU_EXID);
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iounmap(regs);
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return 0;
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}
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static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
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{
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struct device_node *np;
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void __iomem *regs;
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
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if (!np)
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return -ENODEV;
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regs = of_iomap(np, 0);
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of_node_put(np);
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if (!regs) {
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pr_warn("Could not map DBGU iomem range");
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return -ENXIO;
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}
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*cidr = readl(regs + AT91_CHIPID_CIDR);
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*exid = readl(regs + AT91_CHIPID_EXID);
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iounmap(regs);
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return 0;
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}
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struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
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{
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struct soc_device_attribute *soc_dev_attr;
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const struct at91_soc *soc;
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struct soc_device *soc_dev;
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u32 cidr, exid;
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int ret;
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/*
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* With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
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* in the dbgu device but in the chipid device whose purpose is only
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* to expose these two registers.
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*/
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ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
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if (ret)
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ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
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if (ret) {
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if (ret == -ENODEV)
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pr_warn("Could not find identification node");
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return NULL;
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}
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for (soc = socs; soc->name; soc++) {
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if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
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continue;
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if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
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break;
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}
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if (!soc->name) {
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pr_warn("Could not find matching SoC description\n");
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return NULL;
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}
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return NULL;
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soc_dev_attr->family = soc->family;
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soc_dev_attr->soc_id = soc->name;
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
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AT91_CIDR_VERSION(cidr));
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr);
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pr_warn("Could not register SoC device\n");
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return NULL;
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}
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if (soc->family)
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pr_info("Detected SoC family: %s\n", soc->family);
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pr_info("Detected SoC: %s, revision %X\n", soc->name,
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AT91_CIDR_VERSION(cidr));
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return soc_dev;
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}
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