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533b4f3a78
We should return a negative error code upon failure in riscv_hartid_to_cpuid() instead of NR_CPUS. This is also aligned with all uses of riscv_hartid_to_cpuid() which expect negative error code upon failure. Fixes:6825c7a80f
("RISC-V: Add logical CPU indexing for RISC-V") Fixes:f99fb607fb
("RISC-V: Use Linux logical CPU number instead of hartid") Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
266 lines
5.4 KiB
C
266 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SMP initialisation and IPI support
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* Based on arch/arm64/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2015 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#include <linux/cpu.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/delay.h>
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#include <linux/irq_work.h>
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#include <asm/sbi.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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enum ipi_message_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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IPI_IRQ_WORK,
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IPI_TIMER,
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IPI_MAX
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};
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unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
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[0 ... NR_CPUS-1] = INVALID_HARTID
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};
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void __init smp_setup_processor_id(void)
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{
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cpuid_to_hartid_map(0) = boot_cpu_hartid;
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}
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/* A collection of single bit ipi messages. */
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static struct {
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unsigned long stats[IPI_MAX] ____cacheline_aligned;
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unsigned long bits ____cacheline_aligned;
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} ipi_data[NR_CPUS] __cacheline_aligned;
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int riscv_hartid_to_cpuid(int hartid)
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{
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int i;
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for (i = 0; i < NR_CPUS; i++)
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if (cpuid_to_hartid_map(i) == hartid)
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return i;
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pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
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return -ENOENT;
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}
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void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
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{
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int cpu;
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cpumask_clear(out);
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for_each_cpu(cpu, in)
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cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
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}
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EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == cpuid_to_hartid_map(cpu);
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}
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/* Unsupported */
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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static void ipi_stop(void)
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{
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set_cpu_online(smp_processor_id(), false);
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while (1)
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wait_for_interrupt();
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}
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static const struct riscv_ipi_ops *ipi_ops __ro_after_init;
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void riscv_set_ipi_ops(const struct riscv_ipi_ops *ops)
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{
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ipi_ops = ops;
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}
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EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
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void riscv_clear_ipi(void)
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{
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if (ipi_ops && ipi_ops->ipi_clear)
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ipi_ops->ipi_clear();
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csr_clear(CSR_IP, IE_SIE);
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}
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EXPORT_SYMBOL_GPL(riscv_clear_ipi);
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static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
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{
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int cpu;
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smp_mb__before_atomic();
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for_each_cpu(cpu, mask)
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set_bit(op, &ipi_data[cpu].bits);
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smp_mb__after_atomic();
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if (ipi_ops && ipi_ops->ipi_inject)
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ipi_ops->ipi_inject(mask);
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else
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pr_warn("SMP: IPI inject method not available\n");
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}
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static void send_ipi_single(int cpu, enum ipi_message_type op)
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{
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smp_mb__before_atomic();
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set_bit(op, &ipi_data[cpu].bits);
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smp_mb__after_atomic();
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if (ipi_ops && ipi_ops->ipi_inject)
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ipi_ops->ipi_inject(cpumask_of(cpu));
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else
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pr_warn("SMP: IPI inject method not available\n");
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}
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#ifdef CONFIG_IRQ_WORK
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void arch_irq_work_raise(void)
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{
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send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
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}
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#endif
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void handle_IPI(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
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unsigned long *stats = ipi_data[smp_processor_id()].stats;
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irq_enter();
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riscv_clear_ipi();
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while (true) {
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unsigned long ops;
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/* Order bit clearing and data access. */
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mb();
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ops = xchg(pending_ipis, 0);
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if (ops == 0)
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goto done;
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if (ops & (1 << IPI_RESCHEDULE)) {
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stats[IPI_RESCHEDULE]++;
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scheduler_ipi();
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}
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if (ops & (1 << IPI_CALL_FUNC)) {
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stats[IPI_CALL_FUNC]++;
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generic_smp_call_function_interrupt();
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}
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if (ops & (1 << IPI_CPU_STOP)) {
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stats[IPI_CPU_STOP]++;
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ipi_stop();
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}
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if (ops & (1 << IPI_IRQ_WORK)) {
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stats[IPI_IRQ_WORK]++;
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irq_work_run();
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}
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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
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if (ops & (1 << IPI_TIMER)) {
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stats[IPI_TIMER]++;
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tick_receive_broadcast();
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}
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#endif
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BUG_ON((ops >> IPI_MAX) != 0);
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/* Order data access and bit testing. */
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mb();
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}
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done:
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irq_exit();
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set_irq_regs(old_regs);
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}
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static const char * const ipi_names[] = {
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[IPI_RESCHEDULE] = "Rescheduling interrupts",
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[IPI_CALL_FUNC] = "Function call interrupts",
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[IPI_CPU_STOP] = "CPU stop interrupts",
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[IPI_IRQ_WORK] = "IRQ work interrupts",
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[IPI_TIMER] = "Timer broadcast interrupts",
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};
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void show_ipi_stats(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < IPI_MAX; i++) {
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seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
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prec >= 4 ? " " : "");
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for_each_online_cpu(cpu)
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seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
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seq_printf(p, " %s\n", ipi_names[i]);
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}
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}
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void arch_send_call_function_ipi_mask(struct cpumask *mask)
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{
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send_ipi_mask(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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send_ipi_single(cpu, IPI_CALL_FUNC);
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}
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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
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void tick_broadcast(const struct cpumask *mask)
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{
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send_ipi_mask(mask, IPI_TIMER);
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}
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#endif
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void smp_send_stop(void)
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{
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unsigned long timeout;
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if (num_online_cpus() > 1) {
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cpumask_t mask;
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cpumask_copy(&mask, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &mask);
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if (system_state <= SYSTEM_RUNNING)
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pr_crit("SMP: stopping secondary CPUs\n");
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send_ipi_mask(&mask, IPI_CPU_STOP);
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}
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/* Wait up to one second for other CPUs to stop */
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timeout = USEC_PER_SEC;
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while (num_online_cpus() > 1 && timeout--)
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udelay(1);
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if (num_online_cpus() > 1)
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pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
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cpumask_pr_args(cpu_online_mask));
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}
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void smp_send_reschedule(int cpu)
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{
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send_ipi_single(cpu, IPI_RESCHEDULE);
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}
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EXPORT_SYMBOL_GPL(smp_send_reschedule);
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