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After "5918045c4ed4 drm/scheduler: rework job destruction", lima started to leak memory due to buffers not being destroyed after job execution in the drm scheduler. This started happening because the drm scheduler only destroyed buffers after cancelling the job timeout handler, and for lima this handler was never started as lima specified a MAX_SCHEDULE_TIMEOUT timeout. Lima seems to run well in its current state with a real timeout, so to make it more aligned with the other drivers from now on, let's use a real default timeout. This also fixes the observed memory leaks. The 500ms value was chosen as it is the current value for all other embedded gpu drivers using drm sched. Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190520224229.21111-1-nunes.erico@gmail.com
360 lines
8.3 KiB
C
360 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
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#include <linux/kthread.h>
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#include <linux/slab.h>
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#include <linux/xarray.h>
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#include "lima_drv.h"
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#include "lima_sched.h"
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#include "lima_vm.h"
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#include "lima_mmu.h"
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#include "lima_l2_cache.h"
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#include "lima_object.h"
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struct lima_fence {
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struct dma_fence base;
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struct lima_sched_pipe *pipe;
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};
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static struct kmem_cache *lima_fence_slab;
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static int lima_fence_slab_refcnt;
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int lima_sched_slab_init(void)
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{
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if (!lima_fence_slab) {
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lima_fence_slab = kmem_cache_create(
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"lima_fence", sizeof(struct lima_fence), 0,
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SLAB_HWCACHE_ALIGN, NULL);
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if (!lima_fence_slab)
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return -ENOMEM;
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}
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lima_fence_slab_refcnt++;
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return 0;
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}
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void lima_sched_slab_fini(void)
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{
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if (!--lima_fence_slab_refcnt) {
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kmem_cache_destroy(lima_fence_slab);
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lima_fence_slab = NULL;
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}
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}
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static inline struct lima_fence *to_lima_fence(struct dma_fence *fence)
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{
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return container_of(fence, struct lima_fence, base);
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}
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static const char *lima_fence_get_driver_name(struct dma_fence *fence)
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{
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return "lima";
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}
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static const char *lima_fence_get_timeline_name(struct dma_fence *fence)
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{
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struct lima_fence *f = to_lima_fence(fence);
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return f->pipe->base.name;
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}
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static void lima_fence_release_rcu(struct rcu_head *rcu)
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{
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struct dma_fence *f = container_of(rcu, struct dma_fence, rcu);
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struct lima_fence *fence = to_lima_fence(f);
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kmem_cache_free(lima_fence_slab, fence);
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}
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static void lima_fence_release(struct dma_fence *fence)
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{
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struct lima_fence *f = to_lima_fence(fence);
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call_rcu(&f->base.rcu, lima_fence_release_rcu);
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}
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static const struct dma_fence_ops lima_fence_ops = {
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.get_driver_name = lima_fence_get_driver_name,
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.get_timeline_name = lima_fence_get_timeline_name,
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.release = lima_fence_release,
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};
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static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe)
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{
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struct lima_fence *fence;
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fence = kmem_cache_zalloc(lima_fence_slab, GFP_KERNEL);
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if (!fence)
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return NULL;
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fence->pipe = pipe;
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dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock,
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pipe->fence_context, ++pipe->fence_seqno);
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return fence;
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}
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static inline struct lima_sched_task *to_lima_task(struct drm_sched_job *job)
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{
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return container_of(job, struct lima_sched_task, base);
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}
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static inline struct lima_sched_pipe *to_lima_pipe(struct drm_gpu_scheduler *sched)
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{
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return container_of(sched, struct lima_sched_pipe, base);
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}
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int lima_sched_task_init(struct lima_sched_task *task,
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struct lima_sched_context *context,
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struct lima_bo **bos, int num_bos,
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struct lima_vm *vm)
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{
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int err, i;
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task->bos = kmemdup(bos, sizeof(*bos) * num_bos, GFP_KERNEL);
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if (!task->bos)
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return -ENOMEM;
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for (i = 0; i < num_bos; i++)
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drm_gem_object_get(&bos[i]->gem);
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err = drm_sched_job_init(&task->base, &context->base, vm);
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if (err) {
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kfree(task->bos);
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return err;
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}
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task->num_bos = num_bos;
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task->vm = lima_vm_get(vm);
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xa_init_flags(&task->deps, XA_FLAGS_ALLOC);
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return 0;
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}
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void lima_sched_task_fini(struct lima_sched_task *task)
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{
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struct dma_fence *fence;
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unsigned long index;
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int i;
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drm_sched_job_cleanup(&task->base);
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xa_for_each(&task->deps, index, fence) {
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dma_fence_put(fence);
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}
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xa_destroy(&task->deps);
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if (task->bos) {
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for (i = 0; i < task->num_bos; i++)
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drm_gem_object_put_unlocked(&task->bos[i]->gem);
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kfree(task->bos);
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}
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lima_vm_put(task->vm);
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}
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int lima_sched_context_init(struct lima_sched_pipe *pipe,
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struct lima_sched_context *context,
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atomic_t *guilty)
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{
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struct drm_sched_rq *rq = pipe->base.sched_rq + DRM_SCHED_PRIORITY_NORMAL;
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return drm_sched_entity_init(&context->base, &rq, 1, guilty);
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}
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void lima_sched_context_fini(struct lima_sched_pipe *pipe,
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struct lima_sched_context *context)
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{
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drm_sched_entity_fini(&context->base);
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}
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struct dma_fence *lima_sched_context_queue_task(struct lima_sched_context *context,
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struct lima_sched_task *task)
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{
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struct dma_fence *fence = dma_fence_get(&task->base.s_fence->finished);
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drm_sched_entity_push_job(&task->base, &context->base);
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return fence;
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}
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static struct dma_fence *lima_sched_dependency(struct drm_sched_job *job,
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struct drm_sched_entity *entity)
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{
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struct lima_sched_task *task = to_lima_task(job);
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if (!xa_empty(&task->deps))
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return xa_erase(&task->deps, task->last_dep++);
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return NULL;
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}
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static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job)
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{
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struct lima_sched_task *task = to_lima_task(job);
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struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);
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struct lima_fence *fence;
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struct dma_fence *ret;
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struct lima_vm *vm = NULL, *last_vm = NULL;
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int i;
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/* after GPU reset */
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if (job->s_fence->finished.error < 0)
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return NULL;
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fence = lima_fence_create(pipe);
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if (!fence)
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return NULL;
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task->fence = &fence->base;
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/* for caller usage of the fence, otherwise irq handler
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* may consume the fence before caller use it
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*/
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ret = dma_fence_get(task->fence);
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pipe->current_task = task;
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/* this is needed for MMU to work correctly, otherwise GP/PP
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* will hang or page fault for unknown reason after running for
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* a while.
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*
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* Need to investigate:
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* 1. is it related to TLB
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* 2. how much performance will be affected by L2 cache flush
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* 3. can we reduce the calling of this function because all
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* GP/PP use the same L2 cache on mali400
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*
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* TODO:
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* 1. move this to task fini to save some wait time?
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* 2. when GP/PP use different l2 cache, need PP wait GP l2
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* cache flush?
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*/
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for (i = 0; i < pipe->num_l2_cache; i++)
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lima_l2_cache_flush(pipe->l2_cache[i]);
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if (task->vm != pipe->current_vm) {
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vm = lima_vm_get(task->vm);
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last_vm = pipe->current_vm;
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pipe->current_vm = task->vm;
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}
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if (pipe->bcast_mmu)
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lima_mmu_switch_vm(pipe->bcast_mmu, vm);
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else {
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for (i = 0; i < pipe->num_mmu; i++)
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lima_mmu_switch_vm(pipe->mmu[i], vm);
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}
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if (last_vm)
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lima_vm_put(last_vm);
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pipe->error = false;
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pipe->task_run(pipe, task);
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return task->fence;
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}
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static void lima_sched_handle_error_task(struct lima_sched_pipe *pipe,
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struct lima_sched_task *task)
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{
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drm_sched_stop(&pipe->base, &task->base);
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if (task)
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drm_sched_increase_karma(&task->base);
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pipe->task_error(pipe);
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if (pipe->bcast_mmu)
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lima_mmu_page_fault_resume(pipe->bcast_mmu);
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else {
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int i;
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for (i = 0; i < pipe->num_mmu; i++)
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lima_mmu_page_fault_resume(pipe->mmu[i]);
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}
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if (pipe->current_vm)
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lima_vm_put(pipe->current_vm);
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pipe->current_vm = NULL;
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pipe->current_task = NULL;
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drm_sched_resubmit_jobs(&pipe->base);
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drm_sched_start(&pipe->base, true);
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}
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static void lima_sched_timedout_job(struct drm_sched_job *job)
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{
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struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);
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struct lima_sched_task *task = to_lima_task(job);
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DRM_ERROR("lima job timeout\n");
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lima_sched_handle_error_task(pipe, task);
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}
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static void lima_sched_free_job(struct drm_sched_job *job)
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{
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struct lima_sched_task *task = to_lima_task(job);
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struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);
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struct lima_vm *vm = task->vm;
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struct lima_bo **bos = task->bos;
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int i;
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dma_fence_put(task->fence);
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for (i = 0; i < task->num_bos; i++)
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lima_vm_bo_del(vm, bos[i]);
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lima_sched_task_fini(task);
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kmem_cache_free(pipe->task_slab, task);
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}
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static const struct drm_sched_backend_ops lima_sched_ops = {
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.dependency = lima_sched_dependency,
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.run_job = lima_sched_run_job,
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.timedout_job = lima_sched_timedout_job,
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.free_job = lima_sched_free_job,
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};
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static void lima_sched_error_work(struct work_struct *work)
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{
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struct lima_sched_pipe *pipe =
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container_of(work, struct lima_sched_pipe, error_work);
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struct lima_sched_task *task = pipe->current_task;
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lima_sched_handle_error_task(pipe, task);
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}
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int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name)
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{
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unsigned int timeout = lima_sched_timeout_ms > 0 ?
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lima_sched_timeout_ms : 500;
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pipe->fence_context = dma_fence_context_alloc(1);
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spin_lock_init(&pipe->fence_lock);
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INIT_WORK(&pipe->error_work, lima_sched_error_work);
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return drm_sched_init(&pipe->base, &lima_sched_ops, 1, 0,
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msecs_to_jiffies(timeout), name);
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}
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void lima_sched_pipe_fini(struct lima_sched_pipe *pipe)
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{
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drm_sched_fini(&pipe->base);
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}
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void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe)
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{
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if (pipe->error)
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schedule_work(&pipe->error_work);
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else {
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struct lima_sched_task *task = pipe->current_task;
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pipe->task_fini(pipe);
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dma_fence_signal(task->fence);
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}
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}
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