Geert Uytterhoeven f7bb887fb8 clk: renesas: r8a7795: Correct lvds clock parent ... According to the latest information, the parent clock of the LVDS module clock is the S0D4 clock, not the S2D1 clock. Note that this change has no influence on actual operation, as the rcar-du LVDS encoder driver doesn't use the parent clock's rate. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>		2016-06-21 09:21:05 +02:00
..
clk-div6.c
clk-div6.h	clk: renesas: div6: use RENESAS for #define	2016-03-15 18:13:02 -07:00
clk-emev2.c
clk-mstp.c	clk: renesas: mstp: Use always-on governor for Clock Domain	2016-04-28 10:32:51 +02:00
clk-r8a73a4.c
clk-r8a7740.c
clk-r8a7778.c
clk-r8a7779.c
clk-rcar-gen2.c
clk-rz.c
clk-sh73a0.c
Kconfig	clk: renesas: Add R8A7792 support	2016-06-21 09:19:41 +02:00
Makefile	clk: renesas: Add R8A7792 support	2016-06-21 09:19:41 +02:00
r8a7795-cpg-mssr.c	clk: renesas: r8a7795: Correct lvds clock parent	2016-06-21 09:21:05 +02:00
r8a7796-cpg-mssr.c	clk: renesas: cpg-mssr: Add support for R-Car M3-W	2016-06-06 11:58:35 +02:00
rcar-gen3-cpg.c	clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code	2016-06-06 11:58:31 +02:00
rcar-gen3-cpg.h	clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code	2016-06-06 11:58:31 +02:00
renesas-cpg-mssr.c	clk: renesas: cpg-mssr: Add support for R-Car M3-W	2016-06-06 11:58:35 +02:00
renesas-cpg-mssr.h	clk: renesas: cpg-mssr: Add support for R-Car M3-W	2016-06-06 11:58:35 +02:00