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b59544649d
This change makes it possible to limit the number of descriptors down to 48 per ring. The reason for this change is to address a variation on hardware errata 10 for 82546GB in which descriptors will be lost if more than 32 descriptors are fetched and the PCI-X MRBC is 512. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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e1000_ethtool.c | ||
e1000_hw.c | ||
e1000_hw.h | ||
e1000_main.c | ||
e1000_osdep.h | ||
e1000_param.c | ||
e1000.h | ||
Makefile |