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25c74b10ba
This patch registers exception handlers for tracing to a trace IDT. To implemented it in set_intr_gate(), this patch does followings. - Register the exception handlers to the trace IDT by prepending "trace_" to the handler's names. - Also, newly introduce trace_page_fault() to add tracepoints in a subsequent patch. Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com> Link: http://lkml.kernel.org/r/52716DEC.5050204@hds.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
278 lines
7.8 KiB
C
278 lines
7.8 KiB
C
#ifndef _ASM_X86_SEGMENT_H
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#define _ASM_X86_SEGMENT_H
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#include <linux/const.h>
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/* Constructor for a conventional segment GDT (or LDT) entry */
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/* This is a macro so it can be used in initializers */
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#define GDT_ENTRY(flags, base, limit) \
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((((base) & _AC(0xff000000,ULL)) << (56-24)) | \
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(((flags) & _AC(0x0000f0ff,ULL)) << 40) | \
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(((limit) & _AC(0x000f0000,ULL)) << (48-16)) | \
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(((base) & _AC(0x00ffffff,ULL)) << 16) | \
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(((limit) & _AC(0x0000ffff,ULL))))
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/* Simple and small GDT entries for booting only */
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#define GDT_ENTRY_BOOT_CS 2
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#define __BOOT_CS (GDT_ENTRY_BOOT_CS * 8)
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#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
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#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
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#define GDT_ENTRY_BOOT_TSS (GDT_ENTRY_BOOT_CS + 2)
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#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS * 8)
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#ifdef CONFIG_X86_32
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/*
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* The layout of the per-CPU GDT under Linux:
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*
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* 0 - null
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* 1 - reserved
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* 2 - reserved
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* 3 - reserved
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*
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* 4 - unused <==== new cacheline
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* 5 - unused
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*
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* ------- start of TLS (Thread-Local Storage) segments:
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*
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* 6 - TLS segment #1 [ glibc's TLS segment ]
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* 7 - TLS segment #2 [ Wine's %fs Win32 segment ]
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* 8 - TLS segment #3
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* 9 - reserved
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* 10 - reserved
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* 11 - reserved
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*
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* ------- start of kernel segments:
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*
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* 12 - kernel code segment <==== new cacheline
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* 13 - kernel data segment
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* 14 - default user CS
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* 15 - default user DS
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* 16 - TSS
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* 17 - LDT
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* 18 - PNPBIOS support (16->32 gate)
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* 19 - PNPBIOS support
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* 20 - PNPBIOS support
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* 21 - PNPBIOS support
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* 22 - PNPBIOS support
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* 23 - APM BIOS support
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* 24 - APM BIOS support
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* 25 - APM BIOS support
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*
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* 26 - ESPFIX small SS
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* 27 - per-cpu [ offset to per-cpu data area ]
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* 28 - stack_canary-20 [ for stack protector ]
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* 29 - unused
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* 30 - unused
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* 31 - TSS for double fault handler
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*/
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#define GDT_ENTRY_TLS_MIN 6
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#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
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#define GDT_ENTRY_DEFAULT_USER_CS 14
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#define GDT_ENTRY_DEFAULT_USER_DS 15
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#define GDT_ENTRY_KERNEL_BASE (12)
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#define GDT_ENTRY_KERNEL_CS (GDT_ENTRY_KERNEL_BASE+0)
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#define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE+1)
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#define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE+4)
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#define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE+5)
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#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE+6)
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#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE+11)
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#define GDT_ENTRY_ESPFIX_SS (GDT_ENTRY_KERNEL_BASE+14)
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#define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS*8)
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#define GDT_ENTRY_PERCPU (GDT_ENTRY_KERNEL_BASE+15)
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#ifdef CONFIG_SMP
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#define __KERNEL_PERCPU (GDT_ENTRY_PERCPU * 8)
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#else
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#define __KERNEL_PERCPU 0
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#endif
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#define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE+16)
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#ifdef CONFIG_CC_STACKPROTECTOR
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#define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY*8)
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#else
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#define __KERNEL_STACK_CANARY 0
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#endif
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#define GDT_ENTRY_DOUBLEFAULT_TSS 31
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/*
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* The GDT has 32 entries
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*/
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#define GDT_ENTRIES 32
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/* The PnP BIOS entries in the GDT */
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#define GDT_ENTRY_PNPBIOS_CS32 (GDT_ENTRY_PNPBIOS_BASE + 0)
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#define GDT_ENTRY_PNPBIOS_CS16 (GDT_ENTRY_PNPBIOS_BASE + 1)
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#define GDT_ENTRY_PNPBIOS_DS (GDT_ENTRY_PNPBIOS_BASE + 2)
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#define GDT_ENTRY_PNPBIOS_TS1 (GDT_ENTRY_PNPBIOS_BASE + 3)
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#define GDT_ENTRY_PNPBIOS_TS2 (GDT_ENTRY_PNPBIOS_BASE + 4)
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/* The PnP BIOS selectors */
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#define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32 * 8) /* segment for calling fn */
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#define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16 * 8) /* code segment for BIOS */
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#define PNP_DS (GDT_ENTRY_PNPBIOS_DS * 8) /* data segment for BIOS */
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#define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1 * 8) /* transfer data segment */
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#define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2 * 8) /* another data segment */
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/* Bottom two bits of selector give the ring privilege level */
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#define SEGMENT_RPL_MASK 0x3
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/* Bit 2 is table indicator (LDT/GDT) */
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#define SEGMENT_TI_MASK 0x4
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/* User mode is privilege level 3 */
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#define USER_RPL 0x3
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/* LDT segment has TI set, GDT has it cleared */
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#define SEGMENT_LDT 0x4
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#define SEGMENT_GDT 0x0
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/*
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* Matching rules for certain types of segments.
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*/
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/* Matches PNP_CS32 and PNP_CS16 (they must be consecutive) */
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#define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == GDT_ENTRY_PNPBIOS_BASE * 8)
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#else
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#include <asm/cache.h>
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#define GDT_ENTRY_KERNEL32_CS 1
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#define GDT_ENTRY_KERNEL_CS 2
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#define GDT_ENTRY_KERNEL_DS 3
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#define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS * 8)
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/*
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* we cannot use the same code segment descriptor for user and kernel
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* -- not even in the long flat mode, because of different DPL /kkeil
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* The segment offset needs to contain a RPL. Grr. -AK
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* GDT layout to get 64bit syscall right (sysret hardcodes gdt offsets)
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*/
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#define GDT_ENTRY_DEFAULT_USER32_CS 4
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#define GDT_ENTRY_DEFAULT_USER_DS 5
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#define GDT_ENTRY_DEFAULT_USER_CS 6
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#define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS*8+3)
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#define __USER32_DS __USER_DS
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#define GDT_ENTRY_TSS 8 /* needs two entries */
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#define GDT_ENTRY_LDT 10 /* needs two entries */
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#define GDT_ENTRY_TLS_MIN 12
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#define GDT_ENTRY_TLS_MAX 14
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#define GDT_ENTRY_PER_CPU 15 /* Abused to load per CPU data from limit */
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#define __PER_CPU_SEG (GDT_ENTRY_PER_CPU * 8 + 3)
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/* TLS indexes for 64bit - hardcoded in arch_prctl */
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#define FS_TLS 0
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#define GS_TLS 1
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#define GS_TLS_SEL ((GDT_ENTRY_TLS_MIN+GS_TLS)*8 + 3)
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#define FS_TLS_SEL ((GDT_ENTRY_TLS_MIN+FS_TLS)*8 + 3)
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#define GDT_ENTRIES 16
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#endif
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#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
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#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
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#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8+3)
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#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8+3)
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#ifndef CONFIG_PARAVIRT
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#define get_kernel_rpl() 0
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#endif
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/* User mode is privilege level 3 */
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#define USER_RPL 0x3
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/* LDT segment has TI set, GDT has it cleared */
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#define SEGMENT_LDT 0x4
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#define SEGMENT_GDT 0x0
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/* Bottom two bits of selector give the ring privilege level */
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#define SEGMENT_RPL_MASK 0x3
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/* Bit 2 is table indicator (LDT/GDT) */
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#define SEGMENT_TI_MASK 0x4
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#define IDT_ENTRIES 256
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#define NUM_EXCEPTION_VECTORS 32
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/* Bitmask of exception vectors which push an error code on the stack */
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#define EXCEPTION_ERRCODE_MASK 0x00027d00
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#define GDT_SIZE (GDT_ENTRIES * 8)
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#define GDT_ENTRY_TLS_ENTRIES 3
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#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8)
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][2+2+5];
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#ifdef CONFIG_TRACING
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#define trace_early_idt_handlers early_idt_handlers
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#endif
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/*
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* Load a segment. Fall back on loading the zero
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* segment if something goes wrong..
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*/
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#define loadsegment(seg, value) \
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do { \
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unsigned short __val = (value); \
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\
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asm volatile(" \n" \
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"1: movl %k0,%%" #seg " \n" \
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\
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".section .fixup,\"ax\" \n" \
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"2: xorl %k0,%k0 \n" \
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" jmp 1b \n" \
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".previous \n" \
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\
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_ASM_EXTABLE(1b, 2b) \
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\
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: "+r" (__val) : : "memory"); \
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} while (0)
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/*
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* Save a segment register away
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*/
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#define savesegment(seg, value) \
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asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
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/*
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* x86_32 user gs accessors.
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*/
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#ifdef CONFIG_X86_32
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#ifdef CONFIG_X86_32_LAZY_GS
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#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
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#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
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#define task_user_gs(tsk) ((tsk)->thread.gs)
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#define lazy_save_gs(v) savesegment(gs, (v))
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#define lazy_load_gs(v) loadsegment(gs, (v))
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#else /* X86_32_LAZY_GS */
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#define get_user_gs(regs) (u16)((regs)->gs)
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#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
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#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
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#define lazy_save_gs(v) do { } while (0)
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#define lazy_load_gs(v) do { } while (0)
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#endif /* X86_32_LAZY_GS */
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#endif /* X86_32 */
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static inline unsigned long get_limit(unsigned long segment)
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{
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unsigned long __limit;
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asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
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return __limit + 1;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_X86_SEGMENT_H */
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