Dan Williams 8f401ec1c8 cxl/region: Recycle region ids ... At region creation time the next region-id is atomically cached so that there is predictability of region device names. If that region is destroyed and then a new one is created the region id increments. That ends up looking like a memory leak, or is otherwise surprising that identifiers roll forward even after destroying all previously created regions. Try to reuse rather than free old region ids at region release time. While this fixes a cosmetic issue, the needlessly advancing memory region-id gives the appearance of a memory leak, hence the "Fixes" tag, but no "Cc: stable" tag. Cc: Ben Widawsky <bwidawsk@kernel.org> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Fixes: 779dd20cfb ("cxl/region: Add region creation support") Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Vishal Verma <vishal.l.verma@intel.com> Link: https://lore.kernel.org/r/166752186062.947915.13200195701224993317.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2022-11-04 16:03:43 -07:00
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core	cxl/region: Recycle region ids	2022-11-04 16:03:43 -07:00
acpi.c	cxl/acpi: Minimize granularity for x1 interleaves	2022-08-01 15:36:33 -07:00
cxl.h	cxl/region: Fix 'distance' calculation with passthrough ports	2022-11-04 16:01:24 -07:00
cxlmem.h	cxl/region: Attach endpoint decoders	2022-07-25 12:18:07 -07:00
cxlpci.h	cxl/port: Read CDAT table	2022-07-19 15:38:05 -07:00
Kconfig	cxl/region: Allocate HPA capacity to regions	2022-07-25 12:18:06 -07:00
Makefile	PM: CXL: Disable suspend	2022-04-22 16:09:42 -07:00
mem.c	cxl/mem: Enumerate port targets before adding endpoints	2022-07-21 17:19:25 -07:00
pci.c	cxl/pci: Create PCI DOE mailbox's for memory devices	2022-07-19 15:38:04 -07:00
pmem.c	cxl/pmem: Fix cxl_pmem_region and cxl_memdev leak	2022-11-04 15:58:35 -07:00
port.c	cxl/port: Read CDAT table	2022-07-19 15:38:05 -07:00