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df9eba8c9f
Julias Lawall discovered that pata_at91 wasn't freeing a memory region allocated with kzalloc() on init failure paths. Upon review, pata_at91 also seems to be doing unnecessary explicit resource releases for managed resources too. Convert memory allocation to managed one and drop unnecessary explicit resource releases. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Julia Lawall <julia@diku.dk> Cc: Sergey Matyukevich <geomatsi@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
359 lines
8.6 KiB
C
359 lines
8.6 KiB
C
/*
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* PATA driver for AT91SAM9260 Static Memory Controller
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* with CompactFlash interface in True IDE mode
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*
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* Copyright (C) 2009 Matyukevich Sergey
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*
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* Based on:
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* * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
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* * pata_at32 driver by Kristoffer Nyborg Gregertsen
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* * at91_ide driver by Stanislaw Gruszka
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <scsi/scsi_host.h>
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#include <linux/ata.h>
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#include <linux/clk.h>
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#include <linux/libata.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <mach/at91sam9_smc.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#define DRV_NAME "pata_at91"
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#define DRV_VERSION "0.1"
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#define CF_IDE_OFFSET 0x00c00000
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#define CF_ALT_IDE_OFFSET 0x00e00000
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#define CF_IDE_RES_SIZE 0x08
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struct at91_ide_info {
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unsigned long mode;
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unsigned int cs;
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struct clk *mck;
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void __iomem *ide_addr;
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void __iomem *alt_addr;
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};
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static const struct ata_timing initial_timing =
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{XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
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static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
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{
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unsigned long mul;
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/*
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* cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
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* x * (f / 1_000_000_000) =
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* x * ((f * 65536) / 1_000_000_000) / 65536 =
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* x * (((f / 10_000) * 65536) / 100_000) / 65536 =
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*/
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mul = (mck_hz / 10000) << 16;
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mul /= 100000;
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return (ns * mul + 65536) >> 16; /* rounding */
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}
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static void set_smc_mode(struct at91_ide_info *info)
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{
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at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
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return;
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}
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static void set_smc_timing(struct device *dev,
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struct at91_ide_info *info, const struct ata_timing *ata)
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{
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unsigned long read_cycle, write_cycle, active, recover;
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unsigned long nrd_setup, nrd_pulse, nrd_recover;
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unsigned long nwe_setup, nwe_pulse;
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unsigned long ncs_write_setup, ncs_write_pulse;
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unsigned long ncs_read_setup, ncs_read_pulse;
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unsigned long mck_hz;
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read_cycle = ata->cyc8b;
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nrd_setup = ata->setup;
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nrd_pulse = ata->act8b;
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nrd_recover = ata->rec8b;
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mck_hz = clk_get_rate(info->mck);
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read_cycle = calc_mck_cycles(read_cycle, mck_hz);
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nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
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nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
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nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
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active = nrd_setup + nrd_pulse;
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recover = read_cycle - active;
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/* Need at least two cycles recovery */
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if (recover < 2)
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read_cycle = active + 2;
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/* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
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ncs_read_setup = 1;
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ncs_read_pulse = read_cycle - 2;
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/* Write timings same as read timings */
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write_cycle = read_cycle;
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nwe_setup = nrd_setup;
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nwe_pulse = nrd_pulse;
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ncs_write_setup = ncs_read_setup;
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ncs_write_pulse = ncs_read_pulse;
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dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
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nrd_setup, nrd_pulse, read_cycle);
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dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
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nwe_setup, nwe_pulse, write_cycle);
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dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
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ncs_read_setup, ncs_read_pulse);
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dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
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ncs_write_setup, ncs_write_pulse);
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at91_sys_write(AT91_SMC_SETUP(info->cs),
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AT91_SMC_NWESETUP_(nwe_setup) |
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AT91_SMC_NRDSETUP_(nrd_setup) |
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AT91_SMC_NCS_WRSETUP_(ncs_write_setup) |
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AT91_SMC_NCS_RDSETUP_(ncs_read_setup));
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at91_sys_write(AT91_SMC_PULSE(info->cs),
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AT91_SMC_NWEPULSE_(nwe_pulse) |
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AT91_SMC_NRDPULSE_(nrd_pulse) |
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AT91_SMC_NCS_WRPULSE_(ncs_write_pulse) |
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AT91_SMC_NCS_RDPULSE_(ncs_read_pulse));
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at91_sys_write(AT91_SMC_CYCLE(info->cs),
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AT91_SMC_NWECYCLE_(write_cycle) |
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AT91_SMC_NRDCYCLE_(read_cycle));
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return;
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}
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static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct at91_ide_info *info = ap->host->private_data;
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struct ata_timing timing;
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int ret;
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/* Compute ATA timing and set it to SMC */
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ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
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if (ret) {
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dev_warn(ap->dev, "Failed to compute ATA timing %d, \
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set PIO_0 timing\n", ret);
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set_smc_timing(ap->dev, info, &initial_timing);
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} else {
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set_smc_timing(ap->dev, info, &timing);
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}
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/* Setup SMC mode */
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set_smc_mode(info);
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return;
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}
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static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
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unsigned char *buf, unsigned int buflen, int rw)
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{
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struct at91_ide_info *info = dev->link->ap->host->private_data;
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unsigned int consumed;
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unsigned long flags;
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unsigned int mode;
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local_irq_save(flags);
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mode = at91_sys_read(AT91_SMC_MODE(info->cs));
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/* set 16bit mode before writing data */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
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consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
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/* restore 8bit mode after data is written */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
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local_irq_restore(flags);
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return consumed;
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}
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static struct scsi_host_template pata_at91_sht = {
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ATA_PIO_SHT(DRV_NAME),
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};
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static struct ata_port_operations pata_at91_port_ops = {
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.inherits = &ata_sff_port_ops,
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.sff_data_xfer = pata_at91_data_xfer_noirq,
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.set_piomode = pata_at91_set_piomode,
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.cable_detect = ata_cable_40wire,
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.port_start = ATA_OP_NULL,
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};
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static int __devinit pata_at91_probe(struct platform_device *pdev)
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{
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struct at91_cf_data *board = pdev->dev.platform_data;
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struct device *dev = &pdev->dev;
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struct at91_ide_info *info;
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struct resource *mem_res;
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struct ata_host *host;
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struct ata_port *ap;
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int irq_flags = 0;
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int irq = 0;
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int ret;
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/* get platform resources: IO/CTL memories and irq/rst pins */
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if (pdev->num_resources != 1) {
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dev_err(&pdev->dev, "invalid number of resources\n");
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return -EINVAL;
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}
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mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem_res) {
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dev_err(dev, "failed to get mem resource\n");
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return -EINVAL;
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}
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irq = board->irq_pin;
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/* init ata host */
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host = ata_host_alloc(dev, 1);
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if (!host)
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return -ENOMEM;
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ap = host->ports[0];
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ap->ops = &pata_at91_port_ops;
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ap->flags |= ATA_FLAG_SLAVE_POSS;
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ap->pio_mask = ATA_PIO4;
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if (!irq) {
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ap->flags |= ATA_FLAG_PIO_POLLING;
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ata_port_desc(ap, "no IRQ, using PIO polling");
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}
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info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
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if (!info) {
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dev_err(dev, "failed to allocate memory for private data\n");
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return -ENOMEM;
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}
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info->mck = clk_get(NULL, "mck");
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if (IS_ERR(info->mck)) {
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dev_err(dev, "failed to get access to mck clock\n");
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return -ENODEV;
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}
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info->cs = board->chipselect;
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info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
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AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
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AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
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info->ide_addr = devm_ioremap(dev,
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mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
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if (!info->ide_addr) {
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dev_err(dev, "failed to map IO base\n");
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ret = -ENOMEM;
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goto err_put;
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}
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info->alt_addr = devm_ioremap(dev,
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mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
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if (!info->alt_addr) {
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dev_err(dev, "failed to map CTL base\n");
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ret = -ENOMEM;
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goto err_put;
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}
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ap->ioaddr.cmd_addr = info->ide_addr;
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ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
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ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
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ata_sff_std_ports(&ap->ioaddr);
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ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
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(unsigned long long)mem_res->start + CF_IDE_OFFSET,
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(unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
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host->private_data = info;
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return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0,
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irq ? ata_sff_interrupt : NULL,
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irq_flags, &pata_at91_sht);
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err_put:
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clk_put(info->mck);
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return ret;
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}
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static int __devexit pata_at91_remove(struct platform_device *pdev)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct at91_ide_info *info;
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if (!host)
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return 0;
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info = host->private_data;
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ata_host_detach(host);
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if (!info)
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return 0;
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clk_put(info->mck);
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return 0;
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}
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static struct platform_driver pata_at91_driver = {
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.probe = pata_at91_probe,
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.remove = __devexit_p(pata_at91_remove),
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init pata_at91_init(void)
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{
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return platform_driver_register(&pata_at91_driver);
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}
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static void __exit pata_at91_exit(void)
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{
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platform_driver_unregister(&pata_at91_driver);
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}
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module_init(pata_at91_init);
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module_exit(pata_at91_exit);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
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MODULE_AUTHOR("Matyukevich Sergey");
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MODULE_VERSION(DRV_VERSION);
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